Zero-IF Transceiver LO Division Chain for Reduced VCO Pulling

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Solution Overview

Problem

Modern radio transmitters using zero-IF architecture face significant challenges with VCO pulling, particularly at high harmonic orders, which require complex conversion circuits and are not adequately addressed by existing designs.

Innovation Solution

A radio transmitter circuit comprising a controlled oscillator, divide-by-1.5 circuits, a divide-by-2 circuit, a modulator, and a controller, where the controlled oscillator outputs an oscillation signal that is divided down to achieve a high-order harmonic relation between the local oscillator and oscillation signals, reducing VCO pulling while maintaining design simplicity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a high-order harmonic relation is used between LO and VCO signals to reduce VCO pulling, then VCO pulling severity is reduced, but circuit complexity increases

Engineering Contradiction:
ImproveVCO pulling reductionVSAvoidconversion circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the frequency division function into multiple stages: a first divide-by-1.5 circuit, a second divide-by-1.5 circuit, and a divide-by-2 circuit. This segmentation achieves the high-order harmonic relation (divide-by-4.5) while distributing the complexity across simpler, modular stages rather than requiring a single complex conversion circuit.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent combines multiple frequency division operations (1.5x, 1.5x, and 2x division) into an integrated frequency synthesis path. By merging these division stages with the phase-locked loop architecture, the system achieves high-order harmonic relation without requiring a separate complex conversion circuit, thus reducing overall system complexity.

Inventive Principle:
Principle #5Merging (Combining)

2Device complexity

If traditional frequency division is used to generate LO signal, then circuit design is simple, but VCO pulling is severe

Engineering Contradiction:
Improvecircuit design simplicityVSAvoidVCO pulling severity
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent changes the frequency division ratio parameter from traditional integer division (divide-by-2, divide-by-3) to fractional division (divide-by-1.5). This parameter change enables a higher effective harmonic relation between the VCO and LO signals, reducing VCO pulling while maintaining a relatively simple circuit architecture through the use of standard divide-by-1.5 circuit blocks.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10771296B12.4GHz ISM band zero-IF transceiver and method thereof
Publication Date: 2020.09.08 REALTEK SEMICON CORP
  • US10771296B1 patent drawing
  • US10771296B1 patent drawing
  • US10771296B1 patent drawing

AI summary

A method uses a controlled oscillator to output an oscillation signal in accordance with a control signal. The method operates by using a first divide-by-1.5 circuit to convert the oscillation signal into a first divided-down signal, using a second divide-by-1.5 circuit to convert the first divided-down signal into a second divided-down signal, using a divide-by-2 circuit to convert the second divided-down signal into a LO (local oscillator) signal, using a modulator to modulate the LO signal into a RF (radio frequency) signal in accordance with a baseband signal, and using a controller to establish the control signal in accordance with a relative timing between a reference signal and the oscillation signal.