Zero-Overhead Loop Processor with Hardware Loop Control Circuitry

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Solution Overview

Problem

Conventional loop control systems in processors require additional control instructions for each iteration, leading to reduced efficiency, especially in applications with short loops and high performance requirements.

Innovation Solution

A processor with an instruction stream control circuitry and loop control circuitry that includes loop address detecting and loop end determining circuitry, which initializes and manages loop controls, detects internal instruction fetching addresses, and determines loop exiting conditions, allowing for zero-overhead loop acceleration by eliminating additional control instructions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional loop control instructions are used, then loop functionality is achieved, but execution efficiency deteriorates due to additional control overhead

Engineering Contradiction:
Improveloop execution efficiencyVSAvoidcontrol instruction overhead
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent replaces the mechanical/software-based loop control instruction sequence with a hardware-based loop control circuit. This circuit automatically detects loop boundaries and manages iteration counting through dedicated hardware components (loop start address register, loop end address register, iteration counter, and control logic), eliminating the need for software instructions to perform these control functions and thereby improving execution efficiency.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If additional control instructions are added for loop iteration, then loop control functionality is improved, but power consumption increases

Engineering Contradiction:
Improveloop control functionalityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The loop control circuit is designed to automatically perform loop control operations without requiring software intervention. The hardware circuit self-manages iteration counting, loop boundary detection, and control flow management through its internal components (iteration counter that automatically decrements, comparison logic that automatically checks termination conditions), eliminating the energy cost of executing multiple software control instructions for each loop iteration.

Inventive Principle:
Principle #25Self-service

3Adaptability or versatility

If software-based loop control is used, then programming flexibility is maintained, but execution speed decreases

Engineering Contradiction:
Improveprogramming flexibilityVSAvoidloop execution speed
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

The patent segments the loop control functionality into distinct hardware components: loop start address register, loop end address register, iteration counter, comparison logic, and control signal generation. This segmentation allows the hardware to handle routine loop control operations in parallel with instruction execution, maintaining programming flexibility through configurable registers while achieving superior execution speed through hardware acceleration.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentEP3756089B1Processor achieving zero-overhead loop
Publication Date: 2023.03.15 ALIBABA GROUP HOLDING LTD
  • EP3756089B1 patent drawingFigure 1

AI summary

A processor (100) achieving a zero-overhead loop, the processor (100) comprising an instruction stream control circuitry (110) and a loop control circuitry (120), wherein the loop control circuitry (120) comprises a loop address detecting circuitry (122) and a loop end determining circuitry (124). Eliminating, by means of combining instructions and hardware, additional control instructions required by each loop iteration and achieving loop acceleration with zero overhead, thereby improving the loop execution efficiency.