Zero Pin Serial Interface for IC Post-Package Trimming
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Integrated circuits face challenges in post-package trimming, where existing methods lack efficient mechanisms to adjust and permanently set performance characteristics after packaging, leading to suboptimal operation.
Innovation Solution
A zero pin serial interface is employed, utilizing two pins and a ground pin to transition the integrated circuit between normal operation and instruction reception modes, allowing for performance adjustments and permanent setting through specific command signals, enabling precise trimming of voltage references.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If existing post-package trimming methods are used, then integrated circuits can be adjusted after packaging, but the adjustment mechanism is inefficient and lacks precision
Solution Approach 1:
The patent reuses existing pins (first pin for mode switching, second pin for data I/O) that already serve other functions in the integrated circuit, eliminating the need for dedicated trimming pins. This multi-functional approach reduces device complexity while enabling precise post-package trimming through a unified interface structure.
Solution Approach 2:
The patent employs a state machine that changes operational parameters based on received commands, allowing dynamic adjustment of performance characteristics. By modifying the state machine's operational state through serial commands, the system achieves precise control over voltage references and other performance parameters without requiring complex physical adjustment mechanisms.
2Reliability
If no post-package trimming mechanism is provided, then device complexity is reduced, but operation reliability deteriorates due to suboptimal performance
Solution Approach 1:
The patent utilizes existing pins that already serve primary functions (first pin for power/input, second pin for output) to also handle trimming operations. The first pin switches between normal operation and trimming modes, while the second pin carries both data I/O and trimming commands, eliminating the need for additional dedicated trimming pins and maintaining high reliability without increasing device complexity.
Solution Approach 2:
The patent implements a dynamic state machine that can switch between normal operation mode and trimming mode based on command reception. This dynamic capability allows the circuit to adapt its function based on operational needs, providing reliable post-package trimming while maintaining a simple static pin structure that does not increase device complexity.
3Manufacturing precision
If a zero pin serial interface is implemented, then performance adjustment precision is improved, but the operation process becomes more complex
Solution Approach 1:
The patent segments the trimming operation into distinct phases: mode switching (triggered by first pin signal) and data transmission (through second pin). This segmentation allows complex precision trimming to be broken down into manageable sequential steps, improving precision while maintaining operational simplicity through clear phase separation.
Solution Approach 2:
The patent introduces a state machine as an intermediary that receives serial commands through the existing pin structure and translates them into precise internal adjustments. This intermediary layer handles the complexity of precision trimming operations, allowing the external interface to remain simple while achieving high trimming precision through structured command processing.
Data Source
AI summary
A method for controlling performance of an integrated circuit using a zero-pin serial interface is provided. The method comprises identifying a desired performance characteristic of the circuit, and transmitting a first change mode signal to the circuit on a first pin to cause the circuit to enter an instruction reception mode, with the first pin performing differently during a normal operation mode. The method also comprises transmitting a performance adjusting instruction to the circuit on a second pin when the circuit is in the instruction reception mode, with the second pin performing differently during the normal operation mode, and transmitting a second change mode signal to the circuit on the first pin to cause the circuit to enter the normal operation mode. An output performance of the circuit is compared to the desired performance characteristic, with the output performance being the performance of the circuit during the normal operation mode. The circuit is set to permanently provide the output performance when the output performance is within a desired tolerance of the desired performance characteristic.