Zigzag Cutting Structure for 3D Memory Integration Density
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor memory devices face challenges in increasing data storage capacity effectively, particularly in achieving improved product reliability and integration density.
Innovation Solution
The semiconductor memory device incorporates a cell substrate with a mold structure featuring gate electrodes stacked sequentially, channel structures penetrating the mold, and a cutting structure with alternating line-shaped portions forming a zigzag pattern, which enhances data storage capacity and reliability by optimizing the arrangement of channel structures and cutting structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are arranged three-dimensionally to increase data storage capacity, then storage capacity is improved, but device complexity increases
Solution Approach 1:
The device is divided into a cell substrate and a mold structure that is separated and then bonded together. The mold structure containing the gate electrodes is formed separately on the cell substrate, and then bonded to form the final three-dimensional memory device. This segmentation simplifies the manufacturing process while achieving high-density 3D memory cell arrangement.
Solution Approach 2:
The invention transitions from two-dimensional memory cell arrangement to three-dimensional arrangement by stacking mold structures vertically on the cell substrate. Multiple gate electrode structures are arranged in the vertical dimension, enabling increased storage capacity without proportionally increasing device footprint or complexity.
2Reliability
If cutting structure is used to cut gate electrodes, then reliability is improved, but device complexity increases
Solution Approach 1:
The cutting structure selectively removes or cuts specific portions of the gate electrodes to isolate memory cell blocks. This extraction of unnecessary conductive paths improves device reliability by preventing electrical interference between adjacent memory blocks, while the cutting structure itself is integrated into the existing mold structure without adding significant complexity.
Data Source
Figure 1
Figure 2
Figure 3
AI summary
A semiconductor memory device may include a cell substrate, a mold structure including gate electrodes stacked on the cell substrate, a channel structures (CH1, CH2, CH3) penetrating the mold structure; and a first cutting structure (SLC) cutting some of the gate electrodes. The first cutting structure may include a first portion (SLC1) having a line shape extending in a first direction and a second portion (SLC2) having a line shape extending in a second direction. The first portion and the second portion may be alternately connected to form a zigzag shape. The first cutting structure may include a first side wall and a second side wall opposing the first side wall. A first point of the first side wall connected from the second portion to the first portion and a second point of the second side wall connected from the first portion to the second portion may be in corresponding channel structures among the channel structures.