Zigzag Metal Patterns for Ceramic Substrate Crack Resistance
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Solution Overview
Problem
The risk of ceramic substrate damage due to external forces in semiconductor devices with multiple chips mounted on a ceramic substrate, leading to potential cracking, particularly in regions exposed between metal patterns on the substrate.
Innovation Solution
The semiconductor device incorporates metal patterns on a ceramic substrate where the exposed regions between these patterns extend zigzag along the direction of the metal patterns, dispersing stress and reducing the likelihood of cracking when external forces are applied.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple semiconductor chips are mounted on a ceramic substrate through metal patterns, then the functional integration and electrical connectivity are improved, but the ceramic substrate becomes more susceptible to cracking under external force
Solution Approach 1:
The exposed region of the ceramic substrate is configured to extend in a zigzag pattern rather than a straight line. This curved/angled configuration disperses external forces applied to the substrate, preventing stress concentration that would lead to cracking, while still allowing the metal patterns to provide adequate electrical connectivity between multiple semiconductor chips
2Area of stationary object
If the exposed region between metal patterns extends linearly, then the metal patterns can be arranged in a compact manner, but the linear extension creates stress concentration points that lead to cracking
Solution Approach 1:
The exposed region extends in a zigzag pattern instead of a straight line, transforming the stress distribution pattern. This curved configuration eliminates stress concentration points while maintaining efficient use of substrate area for mounting multiple semiconductor chips with appropriate spacing
Data Source
AI summary
Reduction in reliability of a semiconductor device is suppressed. A semiconductor device includes a plurality of metal patterns formed on a ceramic substrate, and a plurality of semiconductor chips mounted on the plurality of metal patterns. Also, the plurality of metal patterns include metal patterns MPH and MPU which face each other. In addition, a region which is provided between these metal patterns MPH and MPU and which is exposed from the plurality of metal patterns extends so as to zigzag along an extending direction of the metal pattern MPH.


