Zigzag Pixel Block Layout for Image Sensor Transistor Optimization
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Solution Overview
Problem
Image sensors with shared pixel structures face challenges in maintaining high-resolution imaging while minimizing size, as the reduced area for pixel transistors leads to degraded performance and uneven pixel characteristics due to process deviations and overlap capacitance.
Innovation Solution
The image sensor employs a pixel array with pixel blocks arranged in a zigzag form, allowing for increased transistor sizes and reduced driving loads by aligning first and second light receiving circuits in different directions and positioning driving circuits to maximize space for pixel transistors, with an intercoupling circuit that couples floating diffusions and driving circuits to maintain uniform characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If pixel blocks are arranged in a conventional grid form with shared pixel structures, then device integration is improved, but transistor size is reduced and pixel characteristics become uneven
Solution Approach 1:
The patent applies asymmetry by arranging pixel blocks in a zigzag pattern rather than a conventional symmetric grid. Specifically, even-numbered pixel blocks are shifted relative to odd-numbered pixel blocks in the row direction, creating an asymmetric layout that increases the distance between adjacent pixel blocks. This asymmetric arrangement prevents overlap capacitance between pixels in different blocks and allows for larger transistor sizes while maintaining compact overall device area.
2Reliability
If pixel blocks are arranged in a zigzag form, then transistor size is increased and driving loads are reduced, but device area increases
Solution Approach 1:
The patent utilizes the row direction (second direction) as an additional dimension for arranging pixel blocks. By shifting even-numbered pixel blocks relative to odd-numbered ones in the row direction, the patent creates a zigzag pattern that effectively uses two-dimensional space. This dimensional approach increases the distance between adjacent pixels without significantly increasing the overall device area, while still achieving larger transistor sizes and reduced driving loads.
Solution Approach 2:
The patent segments the pixel array into multiple pixel blocks arranged in a zigzag pattern, with each block containing multiple pixel circuits. This segmentation allows independent optimization of each block's transistor size and layout, while the zigzag arrangement between blocks reduces inter-block interference. The segmentation strategy enables larger transistors within blocks while maintaining compact overall device footprint through efficient spatial organization.
3Area of stationary object
If driving circuits are positioned between light receiving circuits, then space utilization is improved, but driving load increases
Solution Approach 1:
The asymmetric zigzag arrangement of pixel blocks creates increased spacing between adjacent blocks. The patent positions driving circuits between light receiving circuits within each pixel block, but the zigzag pattern ensures that driving circuits in adjacent blocks are farther apart. This asymmetric spatial distribution reduces the driving load on inter-block signal lines while still achieving efficient space utilization within each compact pixel block.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the operation characteristics of the image sensor, allowing for high-quality, high-resolution imaging while minimizing driving loads and characteristic degradation, and effectively utilizing space for pixel transistors within a limited area.
Implementation Method 1
a pixel array including a plurality of pixel blocks operable to convert light into electrical signals
Data Source
AI summary
An image sensor may include a pixel array including a plurality of pixel blocks structured to convert light into electrical signals. Each of the plurality of pixel blocks may include a first light receiving circuit including a plurality of unit pixels which share a first floating diffusion; a second light receiving circuit arranged adjacent to the first light receiving circuit in a second direction, and including a plurality of unit pixels which share a second floating diffusion; a first driving circuit and a second driving circuit positioned between the first light receiving circuit and the second light receiving circuit, and aligned in a first direction crossing the second direction; and an intercoupling circuit configured to electrically couple the first floating diffusion, the second floating diffusion, the first driving circuit and the second driving circuit.