Zigzag Wiring for Semiconductor Memory Integration
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As memory devices trend towards higher integration and capacity, the complexity of operation circuits and wirings becomes a bottleneck, limiting the improvement of memory devices in terms of integration and electrical characteristics.
Innovation Solution
A semiconductor memory device with a zigzag-shaped wiring structure that alternately disposes first and second wirings over bit lines, reducing deviations in coupling capacitances and enhancing integration and performance while maintaining lower power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cell size is reduced to increase integration, then capacity increases, but wiring complexity increases and electrical characteristics deteriorate
Solution Approach 1:
The wiring structure uses zigzag-shaped patterns instead of straight lines, allowing the wirings to be arranged more efficiently in the second direction while maintaining extension in the first direction. This curved geometry enables better space utilization and reduced complexity in high-density memory structures
Solution Approach 2:
The wirings are configured to extend primarily in the first direction while being arranged in the second direction through zigzag patterns. This multi-dimensional arrangement allows simultaneous optimization of both directionality and integration density, resolving the complexity issue while maintaining electrical performance
2Quantity of substance
If memory cell size is reduced to increase integration, then capacity increases, but electrical characteristics deteriorate
Solution Approach 1:
The zigzag wiring configuration creates specific local geometric features that control coupling capacitance characteristics. By designing the zigzag pattern with specific parameters, the coupling capacitance between adjacent wirings can be reduced, improving electrical characteristics locally while maintaining overall high integration
3Ease of manufacture
If straight wiring structure is used, then manufacturing is simpler, but coupling capacitance variations increase
Solution Approach 1:
The zigzag wiring pattern introduces controlled curvature to the wiring paths, which systematically reduces coupling capacitance between adjacent wirings. This geometric modification maintains manufacturing feasibility while significantly improving coupling capacitance uniformity across the memory array
Solution Approach 2:
By changing the wiring geometry from straight to zigzag, the physical parameters of the wiring structure are modified to control electromagnetic coupling. The zigzag configuration changes the spatial relationship between adjacent wirings, reducing parasitic capacitance and improving signal integrity
Data Source
AI summary
A semiconductor memory device includes a plurality of bit lines disposed over memory cells along a second direction intersecting with a first direction, and extending in the first direction; and a plurality of s first wirings and a plurality of second wirings alternately disposed along the second direction over the bit lines, and extending in the first direction while being bent into zigzag shapes.