Zipper Power Mesh Transition for Low Resistance
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Solution Overview
Problem
In semiconductor devices, the increased resistance in power mesh due to VIA connections at break points between power meshes in different metal layers degrades frequency and active power, especially as supply voltages are scaled down.
Innovation Solution
A zipper structure is implemented, where full-dense-mesh arrays of power supplies in both top and top-1 metal layers overlap, connected by a single VIA and connector lines, reducing the number of break points and associated resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If VIAs are used to connect power mesh between different metal layers, then electrical connection is achieved, but power mesh resistance increases
Solution Approach 1:
The patent utilizes multiple metal layers (top and top-1 layers) to create overlapping power mesh arrays, transitioning the connection problem from a single-layer vertical VIA approach to a multi-layer dimensional solution. This allows power delivery through multiple parallel paths across layers, reducing reliance on high-resistance VIAs.
Solution Approach 2:
The patent merges power mesh arrays from both top and top-1 metal layers, creating overlapping regions where power can be delivered through multiple concurrent paths. This combining of parallel power delivery paths reduces the overall resistance impact by distributing current through multiple VIAs and connector lines simultaneously.
2Reliability
If multiple VIAs are used at break points to maintain power mesh continuity, then power delivery is maintained, but resistance increases and degrades frequency and active power
Solution Approach 1:
By utilizing both top and top-1 metal layers simultaneously, the patent creates a three-dimensional power mesh structure. This dimensional approach allows power continuity to be achieved through overlapping arrays connected by multiple VIAs distributed across layers, rather than relying on a single high-resistance connection point.
Solution Approach 2:
The patent segments the power mesh into multiple contiguous full-dense-mesh arrays distributed across top and top-1 metal layers. These segmented arrays are connected through multiple VIAs and connector lines, distributing the connection function across many small segments rather than one large connection, thereby reducing overall resistance impact.
3Use of energy by moving object
If supply voltage is scaled down to reduce power consumption, then energy efficiency improves, but the impact of VIA resistance becomes more significant
Solution Approach 1:
The patent combines power delivery paths from multiple metal layers and multiple parallel connector lines to create redundant low-resistance paths. This merging ensures that even with scaled-down voltages, the relative impact of VIA resistance is minimized because current is distributed across many parallel connections rather than concentrated through few high-resistance points.
Data Source
AI summary
A zipper structure includes a first contiguous full-dense-mesh (FDM) array of a first circuit in top metal and a second contiguous FDM array of a second circuit in top-1 metal, a third contiguous FDM array of the second circuit in top metal and a fourth contiguous FDM array of the first circuit in top-1 metal, and a signal line, such that portions of the first contiguous FDM array and the second contiguous FDM array overlap and portions of the third contiguous FDM array and the fourth contiguous FDM array overlap. The Zipper structure facilitates connecting the first contiguous FDM array to the fourth contiguous FDM array by vias and a first connector lines and the second contiguous FDM array to the third contiguous FDM array by vias and a second connector lines, such that portion of the signal line overlaps with the first connector lines and the second connector lines.