Zirconium Oxide High-k Film Stack for Low-Leakage Display Insulation
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Solution Overview
Problem
Existing display devices face challenges in forming dielectric layers with high dielectric constants and low leakage, which are crucial for improving electrical performance and extending device lifespan, due to issues like material incompatibility and interface diffusion leading to current leakage and device failure.
Innovation Solution
A hybrid film stack is formed using a combination of chemical vapor deposition and atomic layer deposition processes, incorporating a zirconium-containing material as the dielectric layer, which provides a high dielectric constant greater than 9, low defect density, and low film leakage, and is used as a capacitor or gate insulating layer in display devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a dielectric layer with high dielectric constant is formed to increase capacitance, then electrical performance is improved, but material incompatibility and interface diffusion cause current leakage and device failure
Solution Approach 1:
An interface layer is introduced between the metal electrode layer and the high-k dielectric material layer to prevent interface diffusion and material incompatibility issues. This intermediary layer acts as a barrier that eliminates harmful interface reactions while maintaining the high capacitance benefit of the high-k dielectric material, thereby resolving the current leakage problem without sacrificing electrical performance.
Solution Approach 2:
The patent employs a composite structure consisting of multiple layers including metal electrode layer, interface layer, high-k dielectric material layer, and capping layer. This composite material approach allows each layer to perform its specific function - the high-k dielectric provides high capacitance while the interface and capping layers prevent leakage, achieving both improved electrical performance and reduced harmful effects.
2Ease of manufacture
If dielectric layers with low film density are formed, then manufacturing is easier, but electrical performance deteriorates and service life is reduced
Solution Approach 1:
The patent utilizes atomic layer deposition (ALD) process to precisely control film formation parameters, achieving optimal film density and quality. By adjusting deposition parameters such as temperature, pressure, and precursor flow rates, the process forms high-quality dielectric layers with appropriate density that balance manufacturing ease with improved device reliability and extended service life.
3Reliability
If capacitor area is increased to improve electrical performance, then capacitance increases, but display resolution is limited by available area
Solution Approach 1:
The patent employs high-k dielectric materials with dielectric constants greater than 9 (such as hafnium oxide, zirconium oxide, or their alloys) to achieve high capacitance in a reduced area. This composite approach allows the capacitor to maintain or improve electrical performance while occupying less display area, thereby enabling higher resolution displays.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The hybrid film stack enhances electrical performance by providing high capacitance and low leakage, improving the reliability and efficiency of display devices by preventing interface diffusion and ensuring stable film properties.
Implementation Method 1
the second layer 508 is a Zr containing material... providing the second layer 508 with high dielectric constant greater than 25
Implementation Method 2
providing good interface control... preventing interface diffusion
Data Source
AI summary
Embodiments of the disclosure generally provide methods of forming a hybrid film stack that may be used as a capacitor layer or a gate insulating layer with a high dielectric constant as well as film qualities for display applications. In one embodiment, a thin film transistor structure include gate, source and drain electrodes formed on a substrate, and an insulating layer formed on a substrate, wherein the insulating layer is a hybrid film stack having a dielectric layer comprising a zirconium containing material disposed on an interface layer formed above or below the gate, source and drain electrodes.