Zn-Barrier TFT Electrodes for Low-Resistance Display Modules
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
High electrical resistance in TFT wiring materials leads to voltage drop, causing flicker phenomena and luminance deviations in display devices, especially in large displays, and using copper for wiring can degrade TFT characteristics due to contamination.
Innovation Solution
A display module design featuring Cu electrodes with Zn-based alloy barrier patterns surrounding the drain and source regions, preventing Cu diffusion and maintaining high electrical conductivity while reducing resistance and flicker issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high electrical resistance material is used for TFT wiring, then voltage drop occurs causing flicker and luminance deviation, but using low resistance copper material causes TFT characteristic degradation due to contamination
Solution Approach 1:
A Zn-based alloy barrier pattern is introduced as an intermediary layer between the Cu drain/source electrodes and the semiconductor pattern. This barrier layer prevents Cu atoms from diffusing into the semiconductor while maintaining electrical conductivity, thus resolving the contradiction between using low-resistance Cu and preventing contamination.
Solution Approach 2:
The patent uses a composite structure combining Cu electrodes with a Zn-based alloy barrier layer. The Cu provides low electrical resistance while the Zn-based alloy prevents contamination, creating a composite material system that achieves both low resistance and contamination prevention.
2Loss of energy
If copper is used for wiring to reduce electrical resistance, then voltage drop and flicker phenomena are reduced, but TFT characteristics are degraded due to copper contamination
Solution Approach 1:
The Zn-based alloy barrier pattern serves as a mediator that allows electrical current to pass through while blocking Cu atom diffusion. This resolves the contradiction by enabling the use of Cu for low voltage drop while preventing the harmful contamination effect.
Solution Approach 2:
The barrier layer is applied locally only at the drain and source regions where Cu electrodes contact the semiconductor, rather than throughout the entire wiring structure. This localized application prevents contamination at critical interfaces while maintaining the overall low resistance property of Cu wiring.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The Zn-based alloy barrier patterns prevent Cu diffusion, maintaining electrical characteristics and reducing voltage loss, thereby improving response speed and preventing flicker and luminance deviations in the display module.
Implementation Method 1
forming a first barrier pattern on the drain region in the first hole and a second barrier pattern on the source region in the second hole, and forming a drain electrode on the first barrier pattern and a source electrode on the second barrier pattern
Data Source
AI summary
A display module and a method for manufacturing the same are provided. The display module manufacturing method includes: forming a semiconductor pattern on a substrate; forming a first insulating layer covering the semiconductor pattern on the substrate; forming a gate electrode on a region of the first insulating layer corresponding to a gate region of the semiconductor pattern; forming a second insulating layer covering the gate electrode on the first insulating layer; forming a first hole passing through the first insulating layer and the second insulating layer to expose a drain region of the semiconductor pattern and forming a second hole passing through the first insulating layer and the second insulating layer to expose a source region of the semiconductor pattern; and forming a first barrier pattern on the drain region in the first hole and a second barrier pattern on the source region in the second hole, and forming a drain electrode on the first barrier pattern and a source electrode on the second barrier pattern.


