ZnO Buried TFT for OLED Fabrication
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Solution Overview
Problem
Conventional methods for fabricating Organic Light Emitting Displays (OLEDs) using Low Temperature Poly-Silicon (LTPS) require complex processes and a high number of masks, making it difficult to achieve high-speed operation and uniform threshold voltage, and are not easily scalable to large-area substrates.
Innovation Solution
The use of a zinc oxide (ZnO) semiconductor layer with a buried structure and a common electrode that shares the drain and anode electrodes, reducing the number of masks needed for fabrication and simplifying the process by eliminating the formation of via holes, and allowing for low-temperature processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If Low Temperature Poly-Silicon (LTPS) is used to form the semiconductor layer, then mobility is improved, but the fabrication process becomes complex and requires high-cost processes such as laser heating treatment
Solution Approach 1:
The patent changes the material parameter from LTPS to zinc oxide semiconductor, which achieves high mobility through different physical mechanisms (oxide semiconductor properties) rather than through complex thermal processing. This material substitution resolves the contradiction by providing high speed performance through intrinsic material properties rather than complex fabrication processes.
2Speed
If LTPS is used to form the semiconductor layer, then mobility is improved, but threshold voltage uniformity deteriorates, requiring separate compensating circuits
Solution Approach 1:
The patent changes the semiconductor material from LTPS to zinc oxide, which inherently provides better threshold voltage uniformity due to its material properties. This eliminates the need for compensating circuits while maintaining high mobility, thus resolving the contradiction between speed and manufacturing precision.
3Reliability
If a planarization layer and contact hole formation process are added to apply TFT to OLED, then electrical connection is achieved, but the number of masks and process complexity increase
Solution Approach 1:
The patent extracts and eliminates the planarization layer and contact hole formation processes from the conventional TFT-OLED integration method. By using zinc oxide semiconductor that can be directly patterned and integrated with the OLED structure, the invention removes these intermediate steps, thereby reducing the number of masks and process complexity while maintaining reliable electrical connection.
Solution Approach 2:
The patent merges the TFT active layer formation with the OLED structure integration by using zinc oxide semiconductor that can serve both functions. This consolidation eliminates the need for separate planarization and contact hole processes, reducing overall device complexity while ensuring proper electrical connection.
4Speed
If conventional LTPS TFT fabrication is used, then high mobility is achieved, but scalability to large-area substrates deteriorates due to difficulty in controlling characteristics
Solution Approach 1:
The patent changes the semiconductor material from LTPS to zinc oxide, which has more favorable properties for large-area fabrication. Zinc oxide can be deposited and processed with better uniformity and control over large substrate areas, enabling scalability while maintaining high mobility characteristics.
Data Source
AI summary
An Organic Light Emitting Display (OLED) and a method of fabricating the OLED includes: a substrate including a pixel region and a non-pixel region; a gate electrode arranged in the non-pixel region of the substrate; a first insulating layer arranged on the substrate having the gate electrode formed thereon, and having an open groove on an upper surface of a region opposite to the gate electrode; a semiconductor layer buried in the groove and including a source region, a channel region and a drain region; and an organic thin film layer arranged in the pixel region of the substrate. A common electrode is arranged between the drain region of the semiconductor layer and the organic thin film layer to electrically couple the drain region to the organic thin film layer.


