ZnO n-type layer reduces leakage in III-V devices

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Solution Overview

Problem

Semiconductor devices with III-V n-type layers suffer from high dislocation density due to lattice mismatch, leading to increased leakage current and contact resistance, which existing technologies have not adequately addressed.

Innovation Solution

Employing a II-VI material, specifically n+ doped ZnO (ZnO:Al), for source and drain regions to tolerate high dislocation density and reduce leakage current, using atomic layer deposition and other processes to form the doped layer with reduced surface damage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If n+ InGaAs is used for source and drain regions, then device structure is achieved, but leakage current increases due to high dislocation density

Engineering Contradiction:

Improveleakage currentVSAvoiddislocation density

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent changes the material parameter from III-V (InGaAs) to II-VI (ZnO) for the n-type layer, which fundamentally alters the dislocation tolerance characteristics. ZnO's wurtzite crystal structure and material properties enable it to withstand high dislocation densities without becoming electrically active, thereby reducing leakage current by more than two orders of magnitude compared to InGaAs

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent creates a composite structure combining Si substrate with III-V active layers and II-VI (ZnO) n-type layers. This composite approach leverages the advantages of each material: Si for CMOS compatibility, III-V for active device function, and ZnO for tolerance to dislocation density, achieving reduced leakage current while maintaining device functionality

Inventive Principle:

Principle #40Composite materials

2Manufacturing precision

If Ge buffer layer is employed to reduce lattice mismatch, then dislocation density decreases, but leakage current remains high

Engineering Contradiction:

Improvelattice mismatchVSAvoidleakage current

Core Design Contradiction:

Manufacturing precisionVSReliability

Solution Approach 1:

The patent changes the n-type layer material parameter from III-V to II-VI (ZnO), which fundamentally alters the relationship between dislocation density and leakage current. Unlike III-V materials where dislocations become electrically active, ZnO's different crystal structure and electronic properties allow it to tolerate high dislocation densities without increasing leakage, making the Ge buffer's lattice matching less critical

Inventive Principle:

Principle #35Parameter changes

3Ease of manufacture

If n+ InGaAs is used for source and drain regions, then device structure is formed, but contact resistance increases

Engineering Contradiction:

Improvecontact resistanceVSAvoiddislocation density

Core Design Contradiction:

Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The patent changes the material parameter from InGaAs to ZnO for the n-type layer, which improves contact resistance. ZnO's material properties, including its ability to achieve high doping concentrations and form good ohmic contacts, result in lower contact resistance compared to InGaAs, while simultaneously tolerating the high dislocation density from Si/III-V lattice mismatch

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS10002929B2Reduction of defect induced leakage in III-V semiconductor devices

Publication Date: 2018.06.19 INTERNATIONAL BUSINESS MACHINE CORPORATION

AI summary

A semiconductor device includes a semiconductor substrate and a p-doped layer formed on the substrate having a dislocation density exceeding 108 cm−2. An n-type layer is formed on or in the p-doped layer. The n-type layer includes a II-VI material configured to tolerate the dislocation density to form an electronic device with reduced leakage current over a device with a III-V n-type layer.