ZnO-Based TFT Channel Layer Plasma Resistance
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Solution Overview
Problem
Conventional amorphous silicon (a-Si) thin film transistors (TFTs) exhibit low electron mobility and performance degradation, making them unsuitable for high-quality displays, while poly-Si TFTs require additional processes and are limited by substrate size and uniformity issues, and ZnO-based TFTs are prone to channel layer damage from plasma exposure, leading to increased carrier concentration and leakage currents.
Innovation Solution
A ZnO-based TFT design with a channel layer formed from a stack of semiconductor layers, including a tin oxide uppermost layer with reduced Zn concentration, and the use of chloride or fluoride to enhance bonding energy and stability against plasma damage, along with a gate insulating layer and passive layer to prevent channel layer damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional a-Si TFTs are used, then manufacturing cost is reduced and large substrate manufacturing is enabled, but electron mobility is low and performance degradation occurs
Solution Approach 1:
The patent changes the material composition parameters of the channel layer by forming a multi-layer structure with different Zn concentrations. The lower layer has higher Zn concentration (0.5-5 nm thick) while the upper layer has lower Zn concentration (2-10 nm thick), optimizing both electron mobility and stability against plasma damage without requiring additional processing equipment
Solution Approach 2:
The patent creates a composite semiconductor structure by stacking two ZnO-based layers with different compositions. This composite channel layer combines the high electron mobility benefit of ZnO with improved plasma resistance, achieving both high performance and reliability while maintaining compatibility with existing a-Si TFT manufacturing processes
2Reliability
If poly-Si TFTs are used, then electron mobility is improved, but additional processes and equipment are required and substrate size is limited
Solution Approach 1:
The patent modifies the Zn concentration parameter within the ZnO-based semiconductor material to achieve high electron mobility without changing the fundamental material system or requiring additional processing steps. The graded Zn concentration profile (higher in lower layer, lower in upper layer) optimizes electron transport while maintaining plasma stability
Solution Approach 2:
The patent uses amorphous ZnO-based materials that can be deposited using low-cost sputtering equipment already available in a-Si TFT production lines, avoiding the need for expensive poly-Si crystallization equipment while achieving comparable or superior electron mobility through compositional optimization
3Reliability
If ZnO-based TFTs are used, then electron mobility is improved and large substrate manufacturing is enabled, but channel layer damage occurs due to plasma exposure
Solution Approach 1:
The patent applies local quality by creating spatial variation in Zn concentration within the channel layer. The lower layer (near the interface with gate insulator) has higher Zn concentration to provide stability, while the upper layer (near the plasma-exposed surface) has lower Zn concentration to reduce oxygen vacancy formation and plasma damage
Solution Approach 2:
The patent performs preliminary action by pre-forming the multi-layer ZnO structure with optimized Zn concentration gradient before plasma exposure during source/drain electrode formation. This pre-optimized structure resists plasma-induced oxygen vacancy formation, preventing carrier concentration increase and leakage current before they can occur
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively suppresses channel layer damage and carrier concentration increases, improving the reliability and performance of ZnO-based TFTs, enabling their use in high-quality displays without the limitations of conventional a-Si and poly-Si TFTs, and allowing for larger substrate sizes.
Implementation Method 1
the use of chloride or fluoride to enhance bonding energy and stability against plasma damage
Data Source
AI summary
A TFT includes a zinc oxide (ZnO)-based channel layer having a plurality of semiconductor layers. An uppermost of the plurality of semiconductor layers has a Zn concentration less than that of a lower semiconductor layer to suppress an oxygen vacancy due to plasma. The uppermost semiconductor layer of the channel layer also has a tin (Sn) oxide, a chloride, a fluoride, or the like, which has a relatively stable bonding energy against plasma. The uppermost semiconductor layer is relatively strong against plasma shock and less decomposed when being exposed to plasma, thereby suppressing an increase in carrier concentration.