Zoned Flash Memory Mapping for Lower Write Amplification

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Solution Overview

Problem

The repetitive write operations in nonvolatile memory devices, particularly flash memory, lead to reduced lifetime and reliability due to the erase-before-write characteristic, which increases the write amplification factor (WAF) and compromises data security.

Innovation Solution

A storage device with a memory controller that allocates zones for sequential writes, manages data using a map table to maintain logical to physical address mapping, and performs partial invalidation or overwrite operations based on host device requests, thereby reducing WAF and enhancing security.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If flash memory performs write operations, then data storage capability is improved, but lifetime and reliability are reduced due to erase-before-write characteristic

Engineering Contradiction:
Improvedata storage capabilityVSAvoidlifetime and reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The storage device is segmented into a host interface unit, a memory interface unit, and a nonvolatile memory device with distinct functional layers. The memory controller separates write operations into metadata updates and data writes, managing them through different interfaces to reduce unnecessary erase operations and improve reliability while maintaining storage capability.

Inventive Principle:
Principle #1Segmentation

2Quantity of substance

If flash memory performs repetitive write operations, then data storage capability is improved, but write amplification factor increases

Engineering Contradiction:
Improvedata storage capabilityVSAvoidwrite amplification factor
Core Design Contradiction:
Quantity of substanceVSLoss of substance

Solution Approach 1:

The memory controller performs preliminary actions by updating metadata in the host interface unit before actual data writes to the nonvolatile memory. This preliminary metadata preparation reduces the need for subsequent corrective operations and minimizes write amplification by organizing write operations more efficiently.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The memory controller acts as an intermediary between the host interface unit and the nonvolatile memory device, buffering and managing write operations. It coordinates metadata updates and data writes, reducing redundant operations and minimizing write amplification factor while maintaining data storage capability.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If flash memory allows random write operations, then data access flexibility is improved, but lifetime and reliability are reduced

Engineering Contradiction:
Improvedata access flexibilityVSAvoidlifetime and reliability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The storage device dynamically manages write operations through the memory controller, which adapts between handling random write requests from the host and converting them into optimized sequential writes to the nonvolatile memory. This dynamic operation maintains data access flexibility while reducing wear and improving reliability.

Inventive Principle:
Principle #15Dynamics

4Reliability

If flash memory implements security measures for data protection, then data security is improved, but device complexity increases

Engineering Contradiction:
Improvedata securityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The storage device segments security functions into distinct units: the host interface unit handles authentication and authorization, while the memory interface unit manages encrypted write operations. This segmentation provides robust security without overwhelming complexity, as each unit has a specialized security function.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12625639B2Storage device and operating method of storage device
Publication Date: 2026.05.12 SAMSUNG ELECTRONICS CO LTD
  • US12625639B2 patent drawing
  • US12625639B2 patent drawing
  • US12625639B2 patent drawing

AI summary

Disclosed is a storage device which includes a nonvolatile memory device that includes a plurality of erase units each including a plurality of memory cells, and a memory controller. Based on an open zone request received from an external host device, the memory controller allocates a zone to at least one erase unit among the plurality of erase units and permits only a sequential write with respect to the zone. The memory controller generates a map table mapping sequential logical addresses of data written in the zone to sequential physical addresses. Based on a partial invalidation request received from the external host device, the memory controller manages data corresponding to the partial invalidation request from among the data written in the zone as invalid data while maintaining the map table.