Zoned Storage Controller Out-of-Order Write Handling

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Solution Overview

Problem

Data storage devices operating under standards like NVMe, UFS, or ZBC face inefficiencies when handling out-of-order write commands in zoned storage, leading to increased latency and performance issues due to the need for error messages and sequential write requirements.

Innovation Solution

A data storage device with a controller that receives out-of-order write commands, writes data to a temporary buffer, and maintains a logical-to-physical address map to store data in a zoned namespace, allowing for internal reordering and sequential reading, thereby avoiding errors and improving performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the data storage device requires sequential write commands in zoned storage, then data integrity is maintained, but write latency increases and performance deteriorates

Engineering Contradiction:
Improvedata integrityVSAvoidwrite latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent introduces an intermediary logical-to-physical address map between the host and the physical memory zones. This map allows the controller to translate out-of-order logical block addresses into sequential physical addresses, enabling the host to send writes in any order while maintaining sequential integrity in the zoned namespace. The intermediary layer decouples the host's write ordering from the physical storage requirements.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent segments the address translation function into a separate logical-to-physical mapping layer. Instead of requiring the host to maintain sequential ordering, the controller divides the address space management into logical addresses (host view) and physical addresses (storage view), with the mapping table serving as the segmentation boundary that reconciles ordering differences.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the data storage device sends error messages for out-of-order writes, then sequential write requirements are enforced, but performance and host efficiency deteriorate

Engineering Contradiction:
Improvesequential write complianceVSAvoidwrite throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The logical-to-physical address map acts as an intermediary that absorbs the ordering mismatch between host writes and zoned storage requirements. Instead of rejecting out-of-order writes with error messages, the controller uses the mapping table to redirect each write to the correct sequential position, allowing high throughput while maintaining compliance.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the parameter of address translation from direct sequential mapping to indirect mapping through a lookup table. This parameter change allows the system to accept writes with any logical block address order while internally translating them to sequential physical positions, eliminating error messages and improving productivity.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If the data storage device uses a logical-to-physical address map, then out-of-order writes are handled correctly, but device complexity increases

Engineering Contradiction:
Improveout-of-order write handlingVSAvoidcontroller complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the address management functionality into a dedicated logical-to-physical mapping component. This segmentation isolates the complexity into a manageable lookup table structure, allowing the rest of the controller to operate with simpler sequential logic while the mapping layer handles the adaptability requirements.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The logical-to-physical address map serves multiple functions: it translates out-of-order logical addresses to sequential physical addresses, maintains data integrity for zoned writes, and provides a universal interface that works with any host write pattern. This multi-functionality justifies the added complexity by delivering broad adaptability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12124377B2Data storage device and method for handling write commands in zoned storage
Publication Date: 2024.10.22 SANDISK TECHNOLOGIES LLC
  • US12124377B2 patent drawing
  • US12124377B2 patent drawing
  • US12124377B2 patent drawing

AI summary

Zoned memory typically requires write commands to be sent from a host to a data storage device in logical block address (LBA) sequential order. Instead of rejecting out-of-order write commands, the data storage device can execute those commands and internally deal with the out-of-order problem. For example, the data storage device can use a special zone logical-to-physical address table, use a temporary zone data buffer, and/or store a data's LBA in a header for later matching.