Zoom ADC Residue Feedforward Using a Dummy Capacitor
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Solution Overview
Problem
Traditional zoom analog-to-digital conversion circuits using successive approximation register (SAR) ADCs and sigma-delta modulators suffer from capacitance mismatch issues between replica digital-to-analog converters (DACs), leading to increased layout area and power consumption, and result in a non-ideal signal transfer function (STF) with fuzz in the frequency spectrum.
Innovation Solution
Incorporating a dummy capacitor in the SAR ADC and a switch circuit to feedforward the residue signal to the sigma-delta modulator, eliminating the need for replicated capacitors and addressing capacitance mismatch, while maintaining a signal transfer function (STF) of 1 to improve fuzz issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If replica capacitors are used to generate residual value for feedforward, then the signal transfer function (STF) can be 1 to improve fuzz issue, but capacitance mismatch occurs between replica DACs and between replica DACs and replica inputs
Solution Approach 1:
The patent introduces a dummy capacitor as an intermediary component that couples the residue signal from the SAR ADC to the adder in the sigma-delta modulator. This dummy capacitor serves as a mediator to transfer the residue signal without requiring precise capacitance matching with other capacitors in the system, thereby achieving STF=1 while avoiding capacitance mismatch issues.
2Manufacturing precision
If capacitance of capacitors is increased to solve capacitance mismatch problem, then capacitance mismatch is reduced, but layout area and power consumption increase
Solution Approach 1:
The patent employs a dummy capacitor that is intentionally designed with relaxed precision requirements compared to the main capacitors in the SAR ADC. This 'disposable' capacitor serves its specific purpose of coupling the residue signal without needing to meet the stringent capacitance matching requirements of the main conversion capacitors, thereby reducing overall layout area while maintaining signal transfer function performance.
3Manufacturing precision
If capacitance of capacitors is increased to solve capacitance mismatch problem, then capacitance mismatch is reduced, but power consumption increases
Solution Approach 1:
The dummy capacitor is designed with smaller capacitance values compared to traditional approaches that would require large capacitors to achieve precise matching. This reduces the charge-discharge current requirements and associated power consumption while still achieving the desired signal transfer function through the feedforward path.
4Reliability
If traditional practice is used to generate residual value, then fuzz issue is improved by achieving STF=1, but device complexity increases due to replicated capacitors
Solution Approach 1:
The patent extracts the essential function of the dummy capacitor from the complex system of replicated capacitors. Instead of using multiple replicated capacitors to achieve feedforward, the design isolates and uses a single dummy capacitor specifically for coupling the residue signal, thereby reducing device complexity while maintaining the STF=1 performance.
Data Source
AI summary
A zoom analog-to-digital conversion circuit includes a successive approximation register analog-to-digital converter (SAR ADC), a sigma-delta modulator, and a switch circuit. The SAR ADC includes a comparator and a dummy capacitor. A first connection terminal of the dummy capacitor is coupled to an input port of the comparator. The sigma-delta modulator includes an integrator, a quantizer, and an adder. The adder is coupled between the integrator and the quantizer. The switch circuit is configured to selectively couple a second connection terminal of the dummy capacitor to a common mode potential or the adder.