Compact Semiconductor Packaging with Molded Module Integration
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Summary
Problems
Current semiconductor packaging technologies, such as eWLB and ePLB, face challenges with increased footprint requirements and misalignment issues due to the need for redistribution layers (RDL) over mold layers, which limits design flexibility and reliability.
Innovation solutions
The integration of molded modules with active and/or passive components directly mounted to the die surface, eliminating the need for RDL over the mold layer, allowing for finer pitched interconnects and reduced footprint, and utilizing through mold vias for electrical connections.
TRIZ Analysis
Specific contradictions:
General conflict description:
Principle concept:
If components are embedded in the mold layer outside the die perimeter (eWLB/ePLB packages), then all components and die can be packaged in a single mold layer, but additional surface area is required in the X-Y dimension
Why choose this principle:
The patent transitions from planar embedding (X-Y dimension) to vertical stacking (Z dimension) by mounting molded modules directly onto the die surface. This dimensional change allows components to be integrated without increasing the package footprint, as components are arranged in three-dimensional space rather than confined to a two-dimensional plane.
Principle concept:
If components are embedded in the mold layer outside the die perimeter (eWLB/ePLB packages), then all components and die can be packaged in a single mold layer, but additional surface area is required in the X-Y dimension
Why choose this principle:
The patent implements a nested structure where molded modules containing multiple components are mounted onto the die, creating a hierarchical integration. The molded modules act as nested units that consolidate multiple components into compact structures that can be vertically stacked on the die surface, maximizing space utilization.
Application Domain
Data Source
AI summary:
The integration of molded modules with active and/or passive components directly mounted to the die surface, eliminating the need for RDL over the mold layer, allowing for finer pitched interconnects and reduced footprint, and utilizing through mold vias for electrical connections.
Abstract
Embodiments of the invention include molded modules and methods for forming molded modules. According to an embodiment the molded modules may be integrated into an electrical package. Electrical packages according to embodiments of the invention may include a die with a redistribution layer formed on at least one surface. The molded module may be mounted to the die. According to an embodiment, the molded module may include a mold layer and a plurality of components encapsulated within the mold layer. Terminals from each of the components may be substantially coplanar with a surface of the mold layer in order to allow the terminals to be electrically coupled to the redistribution layer on the die. Additional embodiments of the invention may include one or more through mold vias formed in the mold layer to provide power delivery and/or one or more faraday cages around components.