Reducing Power Loss in Current Sensing for Voltage Regulators
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Summary
Problems
Existing methods for measuring current in voltage regulators face challenges in achieving accurate real-time power measurements due to the inherent power losses caused by measurement circuitry, which are in conflict with the need for greater measurement sensitivity, especially when dealing with varying parasitic impedances in components like filter inductors and switching transistors.
Innovation solutions
The implementation of a measurement circuit with a sense resistor and a switch, where the switch is deactivated during a measurement portion of the duty cycle to allow for accurate voltage measurement across the sense resistor, reducing impedance and power loss during non-measurement periods, while maintaining high sensitivity during measurement periods.
TRIZ Analysis
Specific contradictions:
General conflict description:
Principle concept:
If measurement circuitry is added to measure current and power consumption, then measurement accuracy is improved, but power loss increases
Why choose this principle:
The measurement circuit uses periodic switching of the measurement switch during duty cycles to enable measurement only during specific time intervals, reducing continuous power consumption while maintaining measurement accuracy when needed
Principle concept:
If measurement circuitry is added to measure current and power consumption, then measurement accuracy is improved, but power loss increases
Why choose this principle:
The measurement circuit impedance is dynamically changed by switching between high-impedance measurement mode and low-impedance power-saving mode, allowing the system to adapt between accuracy and power consumption requirements
Application Domain
Data Source
AI summary:
The implementation of a measurement circuit with a sense resistor and a switch, where the switch is deactivated during a measurement portion of the duty cycle to allow for accurate voltage measurement across the sense resistor, reducing impedance and power loss during non-measurement periods, while maintaining high sensitivity during measurement periods.
Abstract
A method may include deactivating a switch of a measurement circuit during a measurement portion of at least one voltage regulator phase, wherein each of the at least one voltage regulator phase is integral to a voltage regulator and each of the at least one voltage regulator phase comprises a power stage. The power stage may include a high-side switch for delivering electrical current to the at least one information handling resource in conformity with a first duty cycle of the high-side switch. The power stage may also include a low-side switch for sinking electrical current to an electrical ground in conformity with a second duty cycle of the low-side switch. The method may also include measuring a voltage across a sense resistor of the measurement circuit during the measurement portion, wherein the sense resistor is coupled in parallel with non-gate terminals of the switch.