Embedded Non-Volatile Memory: Simplified Manufacturing with ONO Structures
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Summary
Problems
The semiconductor industry faces challenges in manufacturing semiconductor devices due to the complexity and high cost of patterning processes associated with the high stack topology of gate structures in 1.5 T memory, which includes a polysilicon floating gate and a control gate, making subsequent processes difficult and costly.
Innovation solutions
The use of an oxide/nitride/oxide (ONO) structure as a trap storage structure in semiconductor devices, which is thinner than polysilicon floating gates, allows for a lower stack topology, simplifying the manufacturing process and reducing costs by integrating the formation of gate oxide layers with other device structures, and using the top oxide layer as an isolation layer to separate the control gate from the silicon nitride trap storage.
TRIZ Analysis
Specific contradictions:
General conflict description:
Principle concept:
If polysilicon floating gate is used in gate structure, then charge trapping capability is improved, but gate structure thickness increases and patterning complexity increases
Why choose this principle:
The patent changes the material composition parameters of the gate structure by replacing polysilicon floating gate with an ONO (oxide-nitride-oxide) structure. This parameter change reduces the gate structure thickness while maintaining charge trapping capability through the nitride layer, thereby resolving the contradiction between reliability and device complexity.
Principle concept:
If polysilicon floating gate is used in gate structure, then charge trapping capability is improved, but gate structure thickness increases and patterning complexity increases
Why choose this principle:
The patent employs a composite ONO structure consisting of multiple layers (bottom oxide, nitride, top oxide) to achieve both charge trapping functionality and reduced thickness. The composite nature of this structure allows optimization of each layer's properties to simultaneously satisfy reliability requirements and reduce overall gate structure complexity.
Application Domain
Data Source
AI summary:
The use of an oxide/nitride/oxide (ONO) structure as a trap storage structure in semiconductor devices, which is thinner than polysilicon floating gates, allows for a lower stack topology, simplifying the manufacturing process and reducing costs by integrating the formation of gate oxide layers with other device structures, and using the top oxide layer as an isolation layer to separate the control gate from the silicon nitride trap storage.
Abstract
In a method for manufacturing a semiconductor device, a cell well, a logic well and a high voltage well are formed in a first, a second and a third regions of a substrate. A first and a second stacked structures are formed on the first and second regions. A first and a second word line wells are formed in the cell well. First spacers are formed on sidewalls of the first and second stacked structures. A first gate oxide layer is formed on the third region and the first and second word line wells. A portion of the first stacked structure is removed to form a first and a second device structures. A second gate oxide layer is formed to cover the first, second and third regions. A first and a second word lines are formed adjacent to the first and second device structures.