Void-Free Contact Structures for Reliable Semiconductors
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Summary
Problems
The scaling down of semiconductor devices increases the complexity of fabricating contact and via plugs with low resistivity in small dimensions, leading to voids that increase contact resistance, which affects the performance of FET devices.
Innovation solutions
The formation of substantially void-free contact and via plugs with low resistivity is achieved through a bottom-up deposition process, using passivation layers to inhibit deposition on sidewalls and promote bottom-up growth, and optionally without metal-based barrier layers, utilizing low-resistivity metals like ruthenium and copper.
TRIZ Analysis
Specific contradictions:
General conflict description:
Principle concept:
If conventional deposition methods are used to form contact and via plugs in small dimensions, then the manufacturing process is simpler, but voids form that increase contact resistance
Why choose this principle:
A passivation layer is deposited on the sidewalls of contact and via openings before forming the conductive plugs. This preliminary action prevents material deposition on sidewalls during subsequent filling processes, ensuring void-free plug formation without requiring complex process modifications
Principle concept:
If conventional deposition methods are used to form contact and via plugs in small dimensions, then the manufacturing process is simpler, but voids form that increase contact resistance
Why choose this principle:
The passivation layer acts as an intermediary between the sidewall surface and the conductive plug material. It selectively inhibits deposition on sidewalls while allowing complete filling of the opening, resolving the contradiction between simple deposition and void-free formation
Application Domain
Data Source
AI summary:
The formation of substantially void-free contact and via plugs with low resistivity is achieved through a bottom-up deposition process, using passivation layers to inhibit deposition on sidewalls and promote bottom-up growth, and optionally without metal-based barrier layers, utilizing low-resistivity metals like ruthenium and copper.
Abstract
The structure of a semiconductor device with source/drain contact structures and via structures and a method of fabricating the semiconductor device are disclosed. A method for fabricating a semiconductor device includes forming a source/drain (S/D) region on a substrate, forming a S/D contact structure on the S/D region, and forming a via structure on the S/D contact structure. The forming of the via structure includes forming a via opening on the S/D contact structure, forming a non-metal passivation layer on sidewalls of the via opening, and depositing a via plug within the via opening in a bottom-up deposition process.