Real-time data storage method using flash eeprom emulation, storage device and medium

Abstract

This disclosure relates to a real-time data storage method, storage device, and medium emulated using a flash EEPROM. The real-time data storage method emulated using a flash erasable programmable read-only memory (EEPROM) includes: defining a block header and determining the state of a block as one of the following based on the state of the block header: a candidate state, a write start state, a write end state, an active state, a full state, and an inactive state. The real-time data storage method further includes: defining a data header as at least one of a frame start, a first state, a second state, a checksum, and a verification high / low (H / L). The real-time data storage method further includes: determining the state of the data based on the state of the data header. The real-time data storage method further includes: periodically executing storage logic including data storage requests and request result retrieval to store data in real time.

Description

[0001] Cross-reference to related applications

[0002] This application claims the benefit and priority of Korean Patent Application No. 10-2024-0200634, filed on December 30, 2024, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to a real-time data storage method using flash EEPROM emulation and a storage device including the method. Background Technology

[0004] Embedded systems primarily use Random Access Memory (RAM) and Flash Erasable Programmable Read-Only Memory (EEPROM) to process and store data. RAM is volatile memory, while Flash EEPROM is non-volatile memory. RAM can process data at high speed, but its volatile nature means that all data is lost when power is cut off. On the other hand, because Flash EEPROM is non-volatile memory, it can retain data even when power is cut off, so it is used for data backup and long-term storage.

[0005] Specifically, in applications requiring real-time data storage (such as electronic control units (ECUs) in automobiles), technologies for reliably storing data from RAM in non-volatile memory are essential. Real-time recording and maintenance of critical data (such as vehicle driving status, mileage, and motor status) are crucial for system reliability and safety.

[0006] Flash EEPROM emulation is a technique that uses the data flash memory of a microcomputer as an EEPROM to store data. In vehicles, the method of storing data in an external EEPROM is used to save data stored in RAM, which is volatile when the power is turned off.

[0007] However, because external EEPROMs require external integrated circuits (ICs) and additional circuitry, the manufacturing cost of the controller increases. As an alternative, a technique is used that utilizes the flash memory of a microcomputer as an external EEPROM to store data.

[0008] In the case of flash memory, since the entire memory becomes unusable even when a region reaches the end of its lifespan, a scheme is used to store data by allocating a region larger than RAM and swapping blocks.

[0009] However, in the case of data flash memory, data needs to be written using an internal module in the microcomputer, rather than using a scheme of accessing and directly writing data as in general-purpose RAM. This is time-consuming, and therefore, when the controller is off, flash EEPROM emulation (FEE) technology typically stores all RAM data in flash memory.

[0010] Furthermore, in automotive environments, real-time data storage logic is required because normal shutdown may not be possible, or data may need to be stored immediately in real time.

[0011] The statements in this section are provided only as background information in relation to this disclosure and may not constitute prior art. Summary of the Invention

[0012] The present invention provides a storage method and storage device that overcomes the limitations of flash EEPROM emulation technology and is optimized for real-time data storage and management.

[0013] According to one aspect of this disclosure, a real-time data storage method using flash EEPROM emulation is provided. The real-time data storage method includes: defining a block header and determining the state of the block based on the state of the block header as one of a candidate state, a write start state, a write end state, an active state, a full state, and an inactive state. The real-time data storage method further includes: defining the data header as at least one of a frame start, a first state, a second state, a checksum, and a verification high / low (H / L). The real-time data storage method further includes: determining the state of the data based on the state of the data header, and periodically executing storage logic including data storage requests and request result acquisition to store data in real time, wherein the storage logic includes: finding a blank space in the block where new data can be written; when a blank space is found, writing a first header including a frame start and a first state into the blank space; writing data; calculating a checksum using the data; when the checksums are the same, writing a second header including a second state and a checksum; and writing the data into the verification H / L of existing data to treat the data as invalid data.

[0014] On one hand, data storage requests may include: calculating a checksum; setting a request flag when the real-time RAM state machine is in a ready state; setting the request result to a pending state; and returning a successful request. Request result retrieval may include: returning the request result; and setting the request result to a ready state when it is not pending.

[0015] On the one hand, the real-time data storage method can further include: returning a request failure when the state of the real-time RAM state machine is not in a ready state.

[0016] On the one hand, the states of a real-time RAM state machine can include a ready state, request state 1, request state 2, and pending erase state.

[0017] On the one hand, determining the state of the real-time RAM state machine through the real-time RAM state machine task may include: checking the current state of the real-time RAM state machine, and executing one of the ready state logic, request state 1 logic, request state 2 logic, and pending erase state logic based on the current state of the real-time RAM state machine.

[0018] On one hand, executing one of the ready state logic, request state 1 logic, request state 2 logic, and pending erase state logic may include: executing the ready state logic based on the current state of the real-time RAM state machine being ready. The ready state logic may include: determining whether the value of the request flag is 1; when the value of the request flag is 1, changing the state of the real-time RAM state machine to request state 1, and clearing the value of the request flag.

[0019] On one hand, executing one of the ready state logic, request state 1 logic, request state 2 logic, and pending erase state logic may include: executing request state 1 logic based on the current state of the real-time RAM state machine being request state 1. Executing request state 1 logic may include: executing write data step 1, and changing the state of the real-time RAM state machine to ready state or request state 2 based on the result of executing write data step 1.

[0020] On one hand, executing one of the ready state logic, request state 1 logic, request state 2 logic, and pending erase state logic may include: executing request state 2 logic based on the current state of the real-time RAM state machine being request state 2. Executing request state 2 logic may include: performing write data step 2, and changing the state of the real-time RAM state machine to pending erase state.

[0021] On one hand, executing one of the ready state logic, request state 1 logic, request state 2 logic, and pending erase state logic may include: executing the pending erase state logic based on the current state of the real-time RAM state machine being the pending erase state. Executing the pending erase state logic may include: determining whether the erase is complete, and when the erase is complete, changing the state of the real-time RAM state machine to the ready state.

[0022] On the one hand, the execution of the data writing step 1 may include: calculating the checksum of the data, determining whether the checksums of the data are the same, when the checksums of the data are the same, checking the remaining space of the current block, when the remaining space is not full, writing the data into the current block, setting the existing data to invalid, and setting the request result to request success.

[0023] On the one hand, performing step 1 of writing data may include: calculating the checksum of the data, determining whether the checksums of the data are the same, and setting the request result to "data has been changed" when the checksums of the data are different.

[0024] On the one hand, executing the write data step 1 may include: calculating the checksum of the data, determining whether the checksums of the data are the same, when the checksums of the data are the same, checking the remaining space of the current block, when the remaining space is full, writing the data to the next block immediately adjacent to the current block, and setting the write data step 2.

[0025] On the one hand, performing step 2 of writing data may include: writing the full value to the current block header, writing the end value to the next block header immediately adjacent to the current block header, requesting the deletion of the full value of the current block, and setting the request result to request success.

[0026] On the one hand, the real-time data storage method may further include: an initialization step for processing data according to the state of the block.

[0027] On one hand, the initialization steps may include: determining whether block x is active and block y is inactive, the blocks include block x and block y; when block x is active and block y is inactive, finding valid data in the active block and restoring the valid data to RAM.

[0028] On one hand, the initialization steps may include: determining whether block x is active and block y is inactive, where blocks include block x and block y. The initialization steps may also include: when block x is inactive and block y is not inactive, determining whether block x is active and block y is in a write start state; when block x is active and block y is in a write start state, performing a block swap and setting block x to a candidate state, setting block y to an active state, and restoring valid data to RAM.

[0029] On one hand, the initialization steps may include: determining whether block x is active and block y is inactive, where blocks include block x and block y. The initialization steps may also include: when block x is inactive and block y is not inactive, determining whether block x is active and block y is in a write start state; when block x is inactive and block y is not inactive, determining whether block x is inactive and block y is in a write start state or active state; when block x is inactive and block y is in a write start state or active state, setting block x to a candidate state, setting block y to an active state, and restoring valid data to RAM.

[0030] On one hand, the initialization steps may include: determining whether block x is active and block y is inactive, where blocks include block x and block y. The initialization steps may also include: when block x is inactive and block y is not inactive, determining whether block x is active and block y is in a write start state; when block x is inactive and block y is not inactive, determining whether block x is inactive and block y is in a write start state or an active state; when block x is not inactive and block y is neither in a write start state nor an active state, deleting block x and block y, and setting block x to active and block y to an alternate state.

[0031] According to another aspect, a non-transitory computer-readable medium is provided, on which instructions are stored. When executed by one or more processors, these instructions cause the one or more processors to perform a real-time data storage method emulated using flash EEPROM.

[0032] According to another aspect, a real-time data storage device for emulating flash EEPROM is provided. This real-time data storage device is configured to perform a real-time data storage method using flash EEPROM emulation.

[0033] As described above, based on various aspects of this embodiment, a storage method and storage device that overcomes the limitations of flash EEPROM emulation technology and is optimized for real-time data storage and management can be provided. Attached Figure Description

[0034] To enable those skilled in the art to understand this disclosure, various forms of the disclosure are described by way of example with reference to the accompanying drawings, in which: Figure 1 This is a diagram illustrating a flash EEPROM simulation according to an embodiment.

[0035] Figure 2 This is a diagram illustrating a flash EEPROM simulation according to an embodiment.

[0036] Figure 3 This is a diagram illustrating a flash EEPROM simulation according to an embodiment.

[0037] Figure 4 This is a diagram illustrating the block and data definitions according to the implementation method.

[0038] Figure 5 This is a diagram illustrating the block and data definitions according to the implementation method.

[0039] Figure 6 This is a diagram illustrating the block and data definitions according to the implementation method.

[0040] Figure 7This is a diagram illustrating the logical order for storing data according to an embodiment.

[0041] Figure 8 This is a diagram illustrating the order of data storage requests according to an implementation method.

[0042] Figure 9 This is a diagram illustrating the order in which request results are obtained according to the implementation method.

[0043] Figure 10 This is a diagram showing the sequence of the real-time state machine according to the implementation method.

[0044] Figure 11 This is a diagram illustrating the sequence of steps 1 for writing data according to an embodiment.

[0045] Figure 12 This is a diagram showing the sequence of steps 2 for writing data according to the embodiment.

[0046] Figure 13 This is a diagram showing the blocks according to an embodiment.

[0047] Figure 14 This is a diagram showing the blocks according to an embodiment.

[0048] Figure 15 This is a diagram showing the blocks according to an embodiment.

[0049] Figure 16 This is a diagram showing the blocks according to an embodiment.

[0050] Figure 17 This is a diagram showing the blocks according to an embodiment.

[0051] Figure 18 This is a diagram showing the blocks according to an embodiment. Detailed Implementation

[0052] In the following, embodiments of the present disclosure are described in detail with reference to the accompanying drawings. Where components in the various drawings are indicated by reference numerals, it should be noted that the same components are indicated by the same reference numerals wherever possible, even when these components are shown in different drawings. Furthermore, in the following description, detailed descriptions of known configurations or functions will be omitted where such detailed descriptions would obscure the main points of the present disclosure.

[0053] Furthermore, terms such as first, second, A, B, (a), and (b) may be used to describe components of this disclosure. These terms are intended only to distinguish one component from other components, and the nature, sequence, or order of the components is not limited by these terms. When a component is described as being “connected” or “coupled” to another component, it should be understood that the component may be directly connected or coupled to the other component, and the other component may also be “connected” or “coupled” between the respective components.

[0054] When a component, controller, device, element, equipment, circuit, unit, etc., of this disclosure is described as having a purpose or performing an operation or function, it shall be considered herein to be "configured" to satisfy that purpose or perform that operation or function. Each component, controller, device, element, equipment, circuit, unit, etc., may individually embody or include a processor and memory (such as a non-transitory computer-readable medium) as part of the device.

[0055] Figure 1 This is a diagram illustrating an emulation of a lightning-fast erasable programmable read-only memory (EEPROM) according to an embodiment.

[0056] refer to Figure 1 The data flash memory is on the left, and the random access memory (RAM) is on the right.

[0057] The data flash memory can be divided into two (e.g., 128kb) blocks (block 0 and block 1).

[0058] RAM can be divided into NVRAM (e.g., 16kb) and NCRAM (e.g., 2kb), each of which can have a specific address range.

[0059] NVRAM (e.g., 16kb) can handle data that is continuously used and stored in RAM, and can process data by reading data from flash memory (block 0 and block 1) and writing data to flash memory (block 0 and block 1).

[0060] NCRAM (e.g., 2kb) can handle relatively small datasets and can be linked to separate flash areas (block 0 and block 1).

[0061] Flash memory can be used as a non-volatile memory similar to EEPROM.

[0062] Block 0 and Block 1 are each used for data storage and can be managed by periodically aggregating data during the writing of new data.

[0063] Figure 2This is a diagram illustrating a flash EEPROM simulation according to an embodiment.

[0064] refer to Figure 2 When a power-off event occurs in RAM (NVRAM or NCRAM), data can be stored in the data flash memory.

[0065] NVRAM data can be stored in EEPROM-NVRAM, and NCRAM data can be stored in EEPROM-NCRAM. During this process, data in RAM can be transferred to flash memory, which acts as non-volatile memory, to prevent data loss, even when the power is off.

[0066] Data in each of the NVRAM and NCRAM can be stored in corresponding blocks (block 0 and block 1) of flash memory. A scheme can be applied to store data based on a specific size (e.g., 64kb block) and then store the data in a new block when that block is full (flash block aggregation).

[0067] refer to Figure 1 and Figure 2 Flash memory not only stores data but also manages the state of RAM data and keeps it up-to-date. Furthermore, data can be transferred block by block, and valid data in a full block can be organized and transferred to a new block. This process allows for efficient data management, eliminating invalid data and leaving only valid data.

[0068] RAM data is transferred to non-volatile flash memory when the power is off to prevent data loss, and during initialization (reboot), valid data in flash memory can be restored back to RAM, enabling continuous task execution.

[0069] According to the implementation method, storage time and resources can be minimized and the possibility of real-time data storage can be increased by defining the RAM data size as a small amount of data.

[0070] Figure 3 This is a diagram illustrating a flash EEPROM simulation according to an embodiment.

[0071] refer to Figure 3 , Figure 3 The left side shows a data flash memory, which can be used as a non-volatile memory, such as EEPROM.

[0072] The address range is specified as 0. AF000000~0 AF006FFF can represent EEPROM-TRAM (64kb).

[0073] Flash memory is divided into logical sectors. Each sector can be 4kb in size.

[0074] For example, each sector can be constructed as follows: Sector 0 (Block 0): 0 AF000000~0 AF0000FF Sector 1 (Block 0): 0 AF001000~0 AF0001FF Sector 2 (Block 0): 0 AF002000~0 AF002FFF Sector 3 (block 1): 0 AF003000~0 AF003FFF In addition, each block (block 0 or block 1) consists of several sectors and can be used for data writing or reading.

[0075] Figure 3 The right side shows RAM as volatile memory, and because data is lost when the power is turned off, backups may be necessary.

[0076] RAM data can be stored in 32-byte units, and addresses can be distinguished by IDs.

[0077] For example, addresses can be distinguished using the following IDs: ID 0:0 B0048820~0 B004883F ID 1:0 B0048840~0 B004885F ID 2:0 B0048860~0 B004887F ID 3:0 B0048880~0 B004889F In this implementation, ID data in RAM can be mapped to sectors in the data flash memory.

[0078] For example, ID 0 data can be written to sector 0 and read from sector 0.

[0079] ID 1 data can be linked to sector 2.

[0080] ID2 data can be written to sector 4.

[0081] Therefore, data mapping is performed in units of 32 bytes, and data in RAM can be stored in flash memory.

[0082] In the context of data movement, "writing" can be the task of storing data from RAM to flash memory. This is primarily used during shutdown or data backup.

[0083] In addition, "reading" can be a task that restores data stored in flash memory back to RAM. This can be performed primarily during a reboot or data initialization.

[0084] In flash memory, data can be managed in blocks and sectors. RAM data can be efficiently distributed and stored in small sectors of flash memory, and for efficient write and read tasks, sectors can be set to, for example, 4KB.

[0085] According to the implementation method, RAM data can be managed in 32-byte units via ID. Such small data units can be advantageous for real-time data management or backup.

[0086] Figure 4 This is a diagram illustrating the block and data definitions according to the implementation method.

[0087] refer to Figure 4 Flash blocks can be defined based on the block address of the data flash memory and specific data states, according to the following six states (Alternative, WritingStart, WritingEnd, Active, Full, and Inactive).

[0088] 1. Alternative (#1)

[0089] In this specification, the alternative (#1) can be used to indicate an alternative and can indicate that the block is in an initial state where no data has been written.

[0090] According to the implementation method, in the alternative, all addresses (0, 2, 4 and 6) can be initialized to 0000.

[0091] The address range can include 0 AF000800, 0 AF000808 and 0 AF000810 (a specific address region of the flash block), and the block is empty because a write operation has not yet started, which can indicate the waiting state for the next operation.

[0092] 2. Start writing (#2)

[0093] In this specification, “Write Start” (#2) can be used to indicate the start of writing and can indicate the state of starting to write data to the block.

[0094] In the implementation, it has already been implemented at the first address (0) Write the specific value "AAAA" at address AF08000, and no data has been written to the remaining address.

[0095] The address range can include 0 AF08000, 0 AF080008 and 0 AF08000 indicates that the first write operation has been performed.

[0096] 3. End of writing (#3)

[0097] In this specification, “Writing End” (#3) can be used interchangeably with “writing end” and can indicate the state that writing to a block has ended, that is, the state that the data has been completely written.

[0098] In this implementation, this could include a state where all address values ​​are recorded as AAAA, and the address range includes 0. AF000800, 0 AF000808 and 0 AF000810 indicates a state where data cannot be written to again and may include a state where the block is ready to transition to the active state.

[0099] 4. Activity (#4)

[0100] In this specification, the active (#4) can be used to indicate that the block has been transitioned to the active state.

[0101] According to the implementation, this may include a state where all address values ​​are set to AAAA and currently remain valid data.

[0102] The address range can include 0 AF08000, 0 AF080008 and 0 AF08000, and can read or manage data while active.

[0103] 5. Full (#5)

[0104] In this specification, "full" (#5) can be used to indicate that the block is full and can indicate the status of the block being full.

[0105] In implementations, this could include states where data has been written to all addresses, data can no longer be written, and block swapping may be necessary.

[0106] The address range can include 0 AF08000, 0 AF080008 and 0 AF08000, and the block is full and a new block is needed for further writing.

[0107] 6. Inactive (#6)

[0108] In this specification, inactive (#6) can be used to indicate inactivity and can indicate that the block is inactive, that is, the block no longer contains valid data.

[0109] According to the implementation, this may include only maintaining the first address value as AAAA, and other values ​​being initialized to 0000.

[0110] The address range can include 0 AF08000, 0 AF080008 and 0 AF08000 indicates a state where block swapping or deletion is required.

[0111] According to the implementation method, the validity and availability of data in flash memory can be managed within the block's state. The state transitions sequentially according to the data flow, and the operations in each state can be designed to ensure data integrity. This allows the memory values ​​in each state to be clearly displayed and helps the system accurately determine the current state of the block.

[0112] Figure 5 This is a diagram illustrating the definition of blocks and data according to an implementation method.

[0113] refer to Figure 5 In the implementation, when data writing begins in the initial state, AAAA can be recorded at the first address, and the block can be transitioned to the write start state, such as in alternative (#1). Write it into the beginning (#2).

[0114] In this implementation, the block can enter a write-complete state when data has been written to all addresses, such as at the start of the write (#2). Write to the end (#3).

[0115] In this implementation, a block can be transitioned to an active state when the data is determined to be valid, such as at the end of the write operation (#3). In activity (#4).

[0116] In the implementation, a block can enter a full state, in which no more data can be written when the block is full, such as in active (#4). Full (#5)

[0117] Furthermore, in the implementation, data can be transferred to a new block, which can then be transitioned to an inactive state, such as when the block is full (#5). Inactive (#6).

[0118] Figure 6 This is a diagram illustrating the definition of blocks and data according to an implementation method.

[0119] refer to Figure 6 The data header includes information for managing the status of the data and can consist of 24 bytes. In an implementation, 32 bytes can be added, allowing a total of 56 bytes of data to be stored.

[0120] In this context, Start of Frame (SOF) can be used interchangeably with the start of a frame and can indicate the beginning of data. This can indicate that the stored data frame has started correctly.

[0121] Status_1st can be used in this document to mean the first status, and can be a flag used to verify that the first header has been created correctly. This allows verification of the first step in data writing.

[0122] Status_2nd can be used in this document to mean the second status and can be a flag used to verify that the second header has been created correctly. This allows verification of the second step in data writing.

[0123] In this article, "checksum" can be used to mean the same thing as "checksum" and can be a value used to verify the integrity of stored data. This enables data error detection and correction.

[0124] Verify_H and Verify_L can be used in this document to have the same meaning as Verify H and Verify L, and "Verify_H / Verify_L" can be used to have the same meaning as Verify High / Low (H / L). These can be flags used to verify whether data is valid or invalid, with 0 indicating that the data is valid.

[0125] According to the implementation method, data is stored in units of 32 bytes, and each data block can be constructed as follows: According to the implementation method, the header and data are stored separately using an offset address as a reference, and the data state can be managed based on the state of each field. This allows for real-time determination of data validity and enables the execution of tasks such as data recovery, deletion, and rewriting when necessary.

[0126] According to the implementation, Frame Start, Status_1st, and Status_2nd are used to progressively verify the data writing process, and Verify_H / Verify_L makes it possible to finally determine the validity of the data.

[0127] By defining the data header in this way and determining the data status based on the header status, data management can be performed, extending the lifespan of flash memory and improving the efficiency of data storage and management.

[0128] Figure 7 This is a diagram illustrating the logical order for storing data according to an embodiment.

[0129] exist Figure 7 The logical order for storing data is described step by step visually, and the logical order according to the implementation method is described in detail below.

[0130] Step 1: Search for blank spaces

[0131] You can search for addresses without a Start of Frame (SOF) at the top of the block to find empty space where you can store data.

[0132] The search is performed in units of 56 bytes and can be the process of finding the first empty space where data can be stored.

[0133] Step 2: Create the first header

[0134] After finding a blank space, the first header can be written.

[0135] The first header may include Start of Frame (SOF) and Status_1st.

[0136] Start of Frame (SOF) can be defined as a marker indicating the start of data.

[0137] Status_1st can be a flag used to check whether the first header has been written correctly.

[0138] Step 3: Create Data

[0139] Once the first header is created, data can be written to this space.

[0140] This data can be 32 bytes of information that the user expects to store.

[0141] Step 4: Calculate the checksum

[0142] After storing the data, a checksum can be calculated based on the stored data.

[0143] A checksum is a value used to verify the integrity of data and can also be used to verify whether data has been modified.

[0144] Step 5: Create the second header

[0145] A second header can be created when the calculated checksum values ​​match.

[0146] The second header may include Status_2nd and a checksum. Status_2nd is a flag indicating whether the second header is being used correctly, and the checksum is the calculated checksum.

[0147] Step 6: Invalidate previous data

[0148] Data can be created in the Validation H / Validation L area of ​​existing data to indicate that the data is invalid.

[0149] Verification H and verification L can be used as flags to indicate the current status (valid / invalid) of the data.

[0150] In this implementation, when new data is written, previous data can be invalidated and become invalid.

[0151] According to the implementation method, in steps 1 and 2, blank spaces can be found, and the frame start and Status_1st can be recorded. Subsequently, data can be created in step 3, a checksum can be calculated based on this data in step 4, and when the checksum matches in step 5, Status_2nd and the checksum can be recorded. Finally, in step 6, the verification H / verification L flags of the previous data can be invalidated to maintain the validity of the new data.

[0152] Figure 8 This is a diagram illustrating the order of data storage requests according to an implementation method.

[0153] according to Figure 8 The implementation shown includes a main process for the storage logic used for real-time data storage, which includes data storage request (Data Store Request) and request result retrieval (Get Request Result), and this logic can be executed periodically in a specific task in an asynchronous manner.

[0154] A data storage request can be the logic that operates when a user requests data storage. According to an implementation, this process can be executed in the following order: start The process begins.

[0155] Calculate checksum

[0156] A checksum is calculated based on the data to be stored to verify the integrity of the data.

[0157] Current state = Ready state?

[0158] Check if the current state of the real-time RAM state machine is ready.

[0159] Yes: When the real-time RAM state machine is in a ready state, the process proceeds to the next step.

[0160] No: If the real-time RAM state machine is not in a ready state, the request fails and the process ends.

[0161] Set request flag

[0162] Set the request flag. This indicates that a data storage request has been received.

[0163] Set the request result to pending.

[0164] The request result has been changed to a pending status. This indicates that data storage processing is in progress.

[0165] The request was successful.

[0166] Return a successful receipt of the request to the user.

[0167] Figure 9 This is a diagram illustrating the order in which request results are obtained according to the implementation method.

[0168] refer to Figure 9 The request result retrieval (obtaining the request result) can instruct the logic used to verify the current request result. According to the implementation, this process can be executed in the following order.

[0169] start

[0170] The process begins.

[0171] Return request result

[0172] Returns the status of the current request result.

[0173] Request result = Pending?

[0174] Check if the returned request result is in a pending state.

[0175] Yes: The process ends without performing any tasks while data storage is still being processed.

[0176] No: The process proceeds to the next step when data storage has been completed or has failed.

[0177] Set the request result to ready: The request result is set to a ready state, ready to receive the next request.

[0178] Figure 10 This is a diagram showing the sequence of the real-time state machine according to the implementation method.

[0179] refer to Figure 10 The states of the real-time RAM state machine according to the implementation method are as follows: Ready state Verify the request flag to check if a new request exists.

[0180] The task ends when no request is received (no).

[0181] When a request exists (yes), the state is changed to request state 1, and the request flag is initialized.

[0182] Request status 1 Perform the write step 1 task.

[0183] Depends on the task outcome: Return to the ready state (end1) or enter the request state 2 (end2).

[0184] Request status 2 Perform the write step 2 task.

[0185] When the task is completed, the state is changed to "awaiting erase".

[0186] Waiting to erase status Check when the data erasure is complete.

[0187] When erasure is complete (yes), the state is changed to ready to receive the next request, and when erasure is incomplete (no), the state remains in the waiting state again.

[0188] <Process Flow>

[0189] start

[0190] The real-time RAM state machine starts and verifies the current state.

[0191] Check readiness status

[0192] Check if the request flag is set.

[0193] The process ends without a request, and proceeds to the next step if requested.

[0194] Perform step 1 of writing data (request status 1).

[0195] Step 1, which involves writing data, is executed, and the process proceeds to the next state based on the task results.

[0196] Perform step 2 (request status 2) to write data.

[0197] Step 2, which writes data, is executed, and when the task is completed, a switch to the pending erase state occurs.

[0198] Verification complete (awaiting erasure status)

[0199] Check if the erasure task is complete.

[0200] When the erase task is completed, return to the ready state and wait for the next request; when the erase task is not completed, remain in the ready state and wait for the deletion to complete.

[0201] According to the implementation, the state may include four phases of the real-time RAM state machine: ready state, request state 1, request state 2, and wait-to-erase state. This enables efficient handling of tasks related to real-time data storage, asynchronous management of requests, and efficient execution of state transitions and tasks.

[0202] Figure 11 This is a diagram illustrating the sequence of steps 1 for writing data according to an embodiment.

[0203] refer to Figure 11 According to the implementation method, writing data 1 is the first process of writing data, and it can also be a process for checking the status of the current block and creating data. According to the implementation method, the sequence is as follows.

[0204] Calculate data checksum The checksum is calculated based on the data to verify the integrity of the data.

[0205] Set the request result to "Data Changed" and end the process when the data has changed.

[0206] Check the remaining space in the current block.

[0207] Check when the current block has free space where data can be written.

[0208] Determine if the space is insufficient (full). If there is sufficient space, create the data in the current block. If there is insufficient space, create the data in the next block and set the start (WRITING_START) flag in the header of the new block.

[0209] Write data Create the first header and write the data.

[0210] Calculate the data checksum again.

[0211] The checksum is recalculated to verify the integrity of the data again after it has been written.

[0212] Compare the completeness of the data.

[0213] Create a second header, treat the previous data as "invalid", set the request result to "success", and end the process if the checksums are the same; set the request result to "data changed" and end the process if the checksums are different.

[0214] Switch to step 2 When data is created in the next block due to insufficient space (full; full state), proceed to step 2.

[0215] Figure 12 This is a diagram showing the sequence of steps 2 for writing data according to the embodiment.

[0216] refer to Figure 12 According to the implementation, step 2 of writing data can be a process of moving data to the next block and organizing the previous block when the current block is full. According to the implementation, this process can be performed in the following order.

[0217] Set the header values ​​for the current block and the next block. Set the "FULL" flag in the header of the current block.

[0218] Set the "WRITING_END" flag in the header of the next block.

[0219] Request to delete the current block.

[0220] Send a request to delete the block because the current block is full.

[0221] Set the request result Set the request result to "success" to indicate that the task was completed successfully.

[0222] Figure 13 This is a diagram showing the blocks according to an embodiment.

[0223] refer to Figure 13 According to one implementation, initialization may be a process of checking the block status of the flash memory and determining whether the stored data is valid. According to another implementation, this process may include performing data recovery or deleting incorrect data to restore the data to RAM. According to another implementation, the sequence is as follows: <Block Status Check and Processing Logic>

[0224] 1. When block x is active and block y is inactive When block x is active and block y is inactive, retrieve valid data from block x and restore the valid data to RAM.

[0225] Then, end the task.

[0226] 2. When block x is active and block y is writing start. When block x is active and block y is in the "write start" state, this indicates that block swapping has been performed and then interrupted, and therefore, block swapping is complete.

[0227] Set block x as the candidate and block y as the active.

[0228] Retrieve valid data from block y and restore the valid data to RAM.

[0229] (In the implementation, block swapping is a task used to move data from a block full of data to a new block.)

[0230] 3. When block x is inactive and block y is either the start of writing or the active block. When block x is inactive and block y is in a "write start" or active state, perform the following tasks: Set block x as the candidate and block y as the active.

[0231] Retrieve valid data from block y and restore the valid data to RAM.

[0232] 4. Other methods Erase and initialize two blocks (block x and block y).

[0233] According to the implementation method, an initialization procedure for managing block state and maintaining data reliability can be provided in the above order.

[0234] Figure 14 This is a diagram showing the blocks according to an embodiment.

[0235] refer to Figure 14 According to the implementation method, when both the current block and the next block are in a candidate state, the block state change can be checked as follows.

[0236] Initial state: Both the current block and the next block are in a standby state, which indicates that the block has been initialized or has not yet been activated, that is, the state in which no data has been written.

[0237] Transition status: The current block is transitioned to the active state to store data, which activates a portion of the space in the block and allows it to transition to the ready state for data writing.

[0238] In this implementation, a portion of the active space is indicated by "e", which may indicate the remaining space or valid data available for data storage.

[0239] Final state: The current block is transitioned to the active state and can be used as a block that can store data, while the next block remains in the alternate state, allowing a portion of the space in the active current block to be used for data writing or block management.

[0240] Figure 15 This is a diagram showing the blocks according to an embodiment.

[0241] refer to Figure 15 According to the implementation method, the block state change when the current block is active and the size of the new data to be stored is less than the remaining empty space in the current block can be shown as follows: Initial state: The current block has been activated and contains some data, and "e" indicates the remaining blank space in the current block.

[0242] The next block is in the candidate state and can be an unused block.

[0243] Data writing: New data can be written to the empty space "e" in the current block.

[0244] Due to the storage of new data, "e" may decrease, or there may no longer be any blank space after the data is stored.

[0245] Final state: The current block remains active and can store new data.

[0246] The next piece is in a standby state and can remain in a ready state.

[0247] You can reduce the remaining blank space after storing new data.

[0248] Figure 16 This is a diagram showing the blocks according to an embodiment.

[0249] refer to Figure 16 According to the implementation method, when the current block is in an active state and the next block is in a write start state, the block state changes in the event of an error during the block swapping process can be checked, as follows: 1. Initial state: The current block is active and can currently contain valid data.

[0250] The next block is in a write start state and can be the block where data records begin, which can indicate that the block swapping process is in progress.

[0251] 2. Block swapping attempt: Block swapping is a data exchange task between the current block and the next block, in which active data is transferred to the block in the write start state, and the previous active block is initialized to transition to the standby state.

[0252] In the implementation process, errors may occur, which may cause the data exchange task to fail to complete correctly.

[0253] 3. Final state: After an error occurs, the state can be restored by re-executing the block swapping task.

[0254] The current block can be transitioned to an alternative state.

[0255] The next block can be set to active and include valid data.

[0256] Figure 17 This is a diagram showing the blocks according to an embodiment.

[0257] refer to Figure 17 According to the implementation, when the current block is active and the next block is in a write start or active state, the block state changes in case of errors during the block swapping process can be checked, as follows: 1. Initial state: The current block is inactive and may be a block that no longer has active data, while the next block is either in a write-start or active state and may be a block about to be written with new data.

[0258] 2. Block swapping process: Block swapping is the task of moving data to a new block while maintaining data integrity. During this process, new data can be written to the next block, and data in the current block can be invalidated and changed to an alternative state.

[0259] 3. Error occurred: Errors may occur when new data is written to the next block.

[0260] 4. Final state: After an error occurs, a recovery task can be performed, and the current block can be switched to an alternate state.

[0261] The next block can be set to active and include newly written data.

[0262] Figure 18 This is a diagram showing the blocks according to an embodiment.

[0263] refer to Figure 18 According to the implementation method, the data writing and block state transition process that occurs when the current block is active and the size of the new data is less than the blank space can be shown as follows.

[0264] 1. Initial state

[0265] The current block is currently active and can be written to, while the next block is currently in a candidate state, meaning it is not ready to be written to.

[0266] 2. Data write processing

[0267] Step 1: Write new data and click "Start Writing" Check the empty spaces (blanks) in the current block to record new data.

[0268] When there is insufficient blank space, activate the next block to prepare for data recording.

[0269] Set the status of the next block to "Write Start" and begin writing new data.

[0270] Step 2: Set the current block's state to "full". The status changes to "full" to indicate that the current block is full.

[0271] Step 3: Write "End of writing" to the next block. Change the status of the next block to "End of Write" to indicate the end of the data record after the data record is completed.

[0272] Then, the next block can be switched to the active state.

[0273] Step 4: Erase the previous piece Invalidate the data in the previous active block.

[0274] Change the invalid block to an alternative state.

[0275] 3. Final state

[0276] New data is recorded in the next block, which transitions to the active state and includes the new data.

[0277] After the data deletion is completed, the previous block is moved to the backup state.

[0278] The description of the storage method described herein also applies to corresponding implementations of storage devices and recording media, and repeated descriptions have been omitted below.

[0279] Unless otherwise specified, the terms “comprising,” “configuration,” and “having” above mean that they may include components and should therefore be interpreted as further including rather than excluding other components. Unless otherwise defined, all terms including technical or scientific terms have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. Commonly used terms (such as those defined in dictionaries) should be interpreted as consistent with their meaning in the context of the relevant art and should not be interpreted as having an ideal or overly formal meaning unless expressly defined in this disclosure.

[0280] Each element of the apparatus or method according to embodiments of this disclosure can be implemented in hardware, software, or a combination of hardware and software. The function of each element can be implemented in software, and a microprocessor can be implemented to execute the software function corresponding to each element.

[0281] Various implementations of the systems and techniques described herein can be implemented using digital electronic circuits, integrated circuits, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), computer hardware, firmware, software, and / or combinations thereof. Various implementations may include implementations utilizing one or more computer programs executable on a programmable system. The programmable system includes at least one programmable processor, at least one input device, and at least one output device. The at least one programmable processor may be a dedicated processor or a general-purpose processor, coupled to receive data and instructions from and send data and instructions to a storage system. The computer program (also referred to as a program, software, software application, or code) includes instructions for the programmable processor and is stored in a computer-readable recording medium.

[0282] Computer-readable recording media can include all types of storage devices capable of storing computer-readable data. Computer-readable recording media can be non-volatile or non-transitory media, such as read-only memory (ROM), random access memory (RAM), optical disc ROM (CD-ROM), magnetic tape, floppy disk, or optical data storage devices. Furthermore, computer-readable recording media can further include transient media such as data transmission media. Moreover, computer-readable recording media can be distributed across computer systems connected via a network and can store and execute computer-readable program code in a distributed manner.

[0283] The above description is merely an illustration of the technical concept of this disclosure, and those skilled in the art can make various modifications and changes without departing from the basic characteristics of this disclosure. Therefore, the embodiments disclosed herein are not intended to limit the technical concept of this disclosure, but rather to illustrate it, and the scope of the technical concept of this disclosure is not limited by these embodiments. The scope of protection of this disclosure should be interpreted by the appended claims, and all technical concepts falling within the equivalent scope should be interpreted as including within the scope of protection of this disclosure.

Claims

1. A real-time data storage method emulated using a Lightning Erasable Programmable Read-Only Memory (NROM), the real-time data storage method comprising: Define a block header and determine the state of the block based on the state of the block header as one of the following: candidate state, write start state, write end state, active state, full state, and inactive state; The data header is defined as at least one of start of frame, first state, second state, checksum, and verification high / low, and the state of the data is determined based on the state of the data header; as well as The storage logic, including data storage requests and request result retrieval, is executed periodically to store the data in real time. The storage logic includes: Find a blank space in the block where new data can be written. A first header, including the start of the frame and the first state, is written into the blank space. Write data, Calculate the checksum using the data. Based on the determination that the checksums are identical, a second header including the second state and the checksum is written; and The data is written to the existing data's validation high / low to process the existing data as invalid data.

2. The real-time data storage method according to claim 1, wherein, Executing the data storage request includes: Calculate the checksum. The value of the request flag is set based on determining that the state of the real-time random access memory state machine is in a ready state. Set the request result to a pending state, and The request was successful; and Obtaining the result of the request includes: Return the result of the request, and Based on the determination that the request result is not pending, the request result is set to the ready state.

3. The real-time data storage method according to claim 1, further comprising: The request failed because it was determined that the state of the real-time random access memory state machine was not ready.

4. The real-time data storage method according to claim 1, wherein, Determining the state of the real-time random access memory (RTRAM) state machine includes determining that the RRAM state machine is in one of the following states: ready, request state 1, request state 2, or pending erase state.

5. The real-time data storage method according to claim 4, further comprising: Check the current state of the real-time random access memory state machine; as well as Based on the current state of the real-time random access memory state machine, execute one of the following: ready state logic, request state 1 logic, request state 2 logic, and pending erase state logic.

6. The real-time data storage method according to claim 5, wherein: Executing one of the ready state logic, the request state 1 logic, the request state 2 logic, and the pending erase state logic includes: executing the ready state logic based on the current state of the real-time random access memory state machine being in the ready state; and Executing the ready state logic includes: Determine if the value of the request flag is 1. Based on the determination that the value of the request flag is 1, the state of the real-time random access memory state machine is changed to request state 1, and Clear the value of the request flag.

7. The real-time data storage method according to claim 5, wherein: Executing one of the ready state logic, the request state 1 logic, the request state 2 logic, and the pending erase state logic includes: executing the request state 1 logic based on the current state of the real-time random access memory state machine being request state 1; and Executing the request state 1 logic includes: Perform step 1 to write data, and Based on the result of executing step 1 of writing data, the state of the real-time random access memory state machine is changed to either the ready state or the request state 2.

8. The real-time data storage method according to claim 5, wherein: Executing one of the ready state logic, the request state 1 logic, the request state 2 logic, and the pending erase state logic includes: executing the request state 2 logic based on the current state of the real-time random access memory state machine being request state 2; and Executing the request state 2 logic includes: Perform step 2 to write data, and Change the state of the real-time random access memory state machine to a pending erase state.

9. The real-time data storage method according to claim 5, wherein: Executing one of the ready state logic, the request state 1 logic, the request state 2 logic, and the pending erase state logic includes: executing the pending erase state logic based on the current state of the real-time random access memory state machine being a pending erase state; and Executing the pending erase state logic includes: Determine if the erasure is complete, and In response to the completion of the erase, the state of the real-time random access memory state machine is changed to the ready state.

10. The real-time data storage method according to claim 7, wherein, The steps of writing data in step 1 include: Calculate the checksum of the data; Determine whether the checksums of the data are the same; Based on the determination that the checksums of the data are the same, check the remaining space of the current block; Based on the determination that the remaining space is not full, the data is written into the current block; Set the existing data to invalid; and Set the request result to successful.

11. The real-time data storage method according to claim 7, wherein, The steps of writing data in step 1 include: Calculate the checksum of the data; Determine whether the checksums of the data are the same; and Based on the determination that the checksums of the data are different, the request result is set to "data has been changed".

12. The real-time data storage method according to claim 7, wherein, The steps of writing data in step 1 include: Calculate the checksum of the data; Determine whether the checksums of the data are the same; Based on the determination that the checksums of the data are the same, check the remaining space of the current block; Based on the determination that the remaining space is full, the data is written to the next block immediately adjacent to the previous block; and Set up step 2 for writing data.

13. The real-time data storage method according to claim 8, wherein, The second step of writing data includes: Write the full value to the current block header; Write the end value to the next block header immediately following the current block header; Request the deletion of the full value of the current block; and Set the request result to successful.

14. The real-time data storage method according to claim 1, further comprising: The initialization steps of the data are processed according to the state of the block.

15. The real-time data storage method according to claim 14, wherein, The initialization steps include: Determine whether block x is in the active state and whether block y is in the inactive state, wherein the blocks include block x and block y; Based on the determination that block x is in the active state and block y is in the inactive state, valid data in the active block is found; and The valid data is restored to the random access memory.

16. The real-time data storage method according to claim 14, wherein, The initialization steps include: Determine whether block x is in the active state and whether block y is in the inactive state, wherein the blocks include block x and block y; It is determined whether block x is in the active state and whether block y is in the write start state based on the determination that block x is not in the active state and block y is not in the inactive state; Based on the determination that block x is in the active state and block y is in the write start state, a block swap is performed, and block x is set to the candidate state and block y is set to the active state; and Restore the valid data to the random access memory.

17. The real-time data storage method according to claim 14, wherein, The initialization steps include: Determine whether block x is in the active state and whether block y is in the inactive state, wherein the blocks include block x and block y; It is determined whether block x is in the active state and whether block y is in the write start state based on the determination that block x is not in the active state and block y is not in the inactive state; Based on determining that block x is not in the active state and block y is not in the inactive state, it is determined whether block x is in the inactive state and whether block y is in the write start state or the active state; Based on the determination that block x is in the inactive state and block y is in the write start state or the active state, block x is set to the candidate state, and block y is set to the active state; and Restore the valid data to the random access memory.

18. The real-time data storage method according to claim 14, wherein, The initialization steps include: Determine whether block x is in the active state and whether block y is in the inactive state, wherein the blocks include block x and block y; It is determined whether block x is in the active state and whether block y is in the write start state based on the determination that block x is not in the active state and block y is not in the inactive state; Based on determining that block x is not in the active state and block y is not in the inactive state, it is determined whether block x is in the inactive state and whether block y is in the write start state or the active state; Based on the determination that block x is not in the inactive state and block y is not in the write start state or the active state, block x and block y are deleted; and Set block x to the active state and block y to the alternative state.

19. A non-transitory computer-readable medium having instructions stored thereon, the instructions causing the one or more processors, when executed by one or more processors, to: Define a block header and determine the state of the block based on the state of the block header as one of the following: candidate state, write start state, write end state, active state, full state, and inactive state; The data header is defined as at least one of start of frame, first state, second state, checksum, and verification high / low, and the state of the data is determined based on the state of the data header; as well as The storage logic, including data storage requests and request result retrieval, is executed periodically to store the data in real time. The storage logic includes: Find a blank space in the block where new data can be written. A first header, including the start of the frame and the first state, is written into the blank space. Write data, Calculate the checksum using the data. Based on the determination that the checksums are identical, a second header including the second state and the checksum is written; and The data is written to the existing data's validation high / low to process the existing data as invalid data.

20. A real-time data storage device for simulating a lightning-erasable programmable read-only memory, the real-time data storage device comprising: Memory, configured to store computer-readable instructions; as well as One or more processors are configured to execute the computer-readable instructions to: Define a block header and determine the state of the block based on the state of the block header as one of the following: candidate state, write start state, write end state, active state, full state, and inactive state; The data header is defined as at least one of start of frame, first state, second state, checksum, and verification high / low, and the state of the data is determined based on the state of the data header; as well as The storage logic, including data storage requests and request result retrieval, is executed periodically to store the data in real time. The storage logic includes: Find a blank space in the block where new data can be written. A first header, including the start of the frame and the first state, is written into the blank space. Write data, Calculate the checksum using the data. Based on the determination that the checksums are identical, a second header including the second state and the checksum is written; and The data is written to the existing data's validation high / low to process the existing data as invalid data.

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