Circuit substrate and display device including the circuit substrate

Abstract

Provided are a circuit substrate and a display device including the circuit substrate. The circuit substrate includes: a substrate; a plurality of first connection pads, arranged on the substrate and arranged along a first direction; a plurality of second connection pads, arranged on the substrate and arranged along the first direction, and separated from the plurality of first connection pads in a second direction perpendicular to the first direction; and a driving chip, arranged on the substrate and arranged between the plurality of first connection pads and the plurality of second connection pads, the plurality of first connection pads respectively including: a first conductive layer, arranged on the substrate; a second conductive layer, which as a whole overlaps with the first conductive layer and is arranged on the first conductive layer, and is formed of a material different from that of the first conductive layer; and a third conductive layer, which as a whole overlaps with the second conductive layer and is arranged on the second conductive layer.

Description

Technical Field

[0001] The present invention relates to a circuit substrate and a display device, and more particularly to a flexible circuit substrate and a display device comprising the circuit substrate. Background Art

[0002] Various display devices have been developed for use in multimedia devices such as televisions, mobile phones, tablet computers, navigation systems, and game consoles.

[0003] The display device includes a display panel for displaying an image. The display panel includes a plurality of gate lines, a plurality of data lines, and a plurality of pixels connected to the plurality of gate lines and the plurality of data lines. The display panel may be connected to a circuit substrate, which provides electrical signals required for image display to the gate lines or the data lines.

[0004] On the other hand, the circuit substrate can be connected to the display panel using anisotropic conductive film or ultrasonic bonding. Among them, the connection between the display panel and the circuit substrate using ultrasonic bonding can improve the conductivity more than the anisotropic conductive film and the process is simple. Summary of the invention

[0005] An object of the present invention is to provide a circuit substrate bonded to a display panel by ultrasonic bonding and a display device including the circuit substrate.

[0006] An embodiment for achieving the purpose of the present invention involves a circuit substrate comprising: a substrate; a plurality of first connecting pads, which are arranged on the substrate and arranged along a first direction; a plurality of second connecting pads, which are arranged on the substrate and arranged along the first direction and are separated from the plurality of first connecting pads in a second direction perpendicular to the first direction; and a driving chip, which is arranged on the substrate and between the plurality of first connecting pads and the plurality of second connecting pads, and the plurality of first connecting pads respectively comprise: a first conductive layer, which is arranged on the substrate; a second conductive layer, which as a whole overlaps with the first conductive layer and is arranged on the first conductive layer, and is formed of a material different from that of the first conductive layer; and a third conductive layer, which as a whole overlaps with the second conductive layer and is arranged on the second conductive layer.

[0007] According to an embodiment of the present invention, in the thickness direction of the substrate, the thickness of the first conductive layer is greater than the thickness of the second conductive layer, and the thickness of the second conductive layer is greater than the thickness of the third conductive layer.

[0008] According to an embodiment of the present invention, the area of ​​the third conductive layer on a plane is greater than the area of ​​the second conductive layer on a plane, and the area of ​​the second conductive layer on a plane is greater than the area of ​​the first conductive layer on a plane.

[0009] According to an embodiment of the present invention, the first conductive layer and the third conductive layer are formed of the same material.

[0010] According to an embodiment of the present invention, it also includes: a plurality of first signal lines, which are arranged between the plurality of first connecting pads and the driving chip and electrically connect the plurality of first connecting pads and the driving chip; and a plurality of second signal lines, which are arranged between the plurality of second connecting pads and the driving chip and electrically connect the plurality of second connecting pads and the driving chip.

[0011] According to an embodiment of the present invention, the multiple first signal lines respectively include: a first line layer, which is configured on the substrate and has a shape integral with the first conductive layer; a second line layer, which is configured on the first line layer and has a shape integral with the second conductive layer; and a third line layer, which is configured on the second line layer and has a shape integral with the third conductive layer.

[0012] According to an embodiment of the present invention, in a thickness direction of the substrate, a sum of thicknesses of the second line layer and the third line layer is smaller than a thickness of the first line layer.

[0013] According to an embodiment of the present invention, the first conductive layer and the first line layer are formed of the same material, and the second conductive layer and the second line layer are formed of the same material.

[0014] According to an embodiment of the present invention, the plurality of second connecting pads respectively include: a fourth conductive layer, which is configured on the substrate; a fifth conductive layer, which as a whole overlaps with the fourth conductive layer and is configured on the fourth conductive layer, and is formed by a material different from that of the fourth conductive layer; and a sixth conductive layer, which as a whole overlaps with the fifth conductive layer and is configured on the fifth conductive layer.

[0015] According to an embodiment of the present invention, the first conductive layer and the fourth conductive layer are formed of the same material, the second conductive layer and the fifth conductive layer are formed of the same material, and the third conductive layer and the sixth conductive layer are formed of the same material.

[0016] According to an embodiment of the present invention, the fourth conductive layer and the sixth conductive layer are formed of the same material.

[0017] According to an embodiment of the present invention, in the thickness direction of the substrate, the thickness of the fourth conductive layer is greater than the sum of the thicknesses of the fifth conductive layer and the sixth conductive layer.

[0018] According to an embodiment of the present invention, the first to third conductive layers are respectively made of metal.

[0019] According to an embodiment of the present invention, the third conductive layer is not disposed on at least a portion of the second conductive layer.

[0020] Other embodiments for achieving the purpose of the present invention involve a display device including: a display module, including a base substrate and a plurality of driving pads, the base substrate including a display area and a non-display area adjacent to the display area, the driving pads overlapping with the non-display area and being arranged on the base substrate; and a circuit substrate, including a substrate and a plurality of connecting pads arranged on the substrate and respectively contacting the plurality of driving pads, the plurality of connecting pads respectively including: a first conductive layer arranged on the substrate; a second conductive layer overlapping with the first conductive layer and arranged on the first conductive layer, and formed of a material different from the first conductive layer; and a third conductive layer overlapping with the second conductive layer and arranged on the second conductive layer, and contacting corresponding driving pads among the plurality of driving pads.

[0021] According to an embodiment of the present invention, the method further includes: a resin disposed between the base substrate and the substrate and surrounding the plurality of driving pads and the plurality of connecting pads.

[0022] According to an embodiment of the present invention, at least a portion of the second conductive layer is in contact with the corresponding driving pad.

[0023] According to an embodiment of the present invention, the second conductive layer entirely overlaps with the first conductive layer, and at least a portion of the third conductive layer overlaps with the second conductive layer.

[0024] According to an embodiment of the present invention, the plurality of driving pads respectively include: a first driving conductive layer, configured on the base substrate; a second driving conductive layer, configured on the first driving conductive layer; and a third driving conductive layer, configured on the second driving conductive layer and in contact with the second driving conductive layer.

[0025] According to an embodiment of the present invention, the first driving conductive layer and the third driving conductive layer are formed of the same material, and the thickness of the second driving conductive layer is greater than the sum of the thicknesses of the first driving conductive layer and the third driving conductive layer.

[0026] According to the embodiment of the present invention, the pads of the display panel and the connecting pads of the circuit substrate can be bonded to each other by ultrasonic bonding, thereby improving the electrical connection characteristics between the pads of the display panel and the connecting pads of the circuit substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 It is a perspective view of a display device according to an embodiment of the present invention.

[0028] Figure 2 It is an exploded perspective view of a display device according to an embodiment of the present invention.

[0029] Figure 3 is a cross-sectional view of a display module according to an embodiment of the present invention.

[0030] Figure 4a is a top view of a display device according to an embodiment of the present invention.

[0031] Figure 4b This is a partial cross-sectional view showing a part of a display device according to an embodiment of the present invention.

[0032] Figure 5a The embodiments of the present invention involve Figure 4a A cross-sectional view taken along line II' is shown.

[0033] Figure 5b 2 is a cross-sectional view showing a pad and a first connecting pad according to an embodiment of the present invention.

[0034] Figure 6a The embodiments of the present invention involve Figure 4a A cross-sectional view taken along line II-II' is shown.

[0035] Figure 6b is a cross-sectional view showing a second connection pad and a driving pad according to an embodiment of the present invention.

[0036] Figure 7 It is shown Figure 4a A top view of the connection circuit substrate is shown.

[0037] Figure 8 The embodiments of the present invention involve Figure 7 A cross-sectional view taken along line AA' is shown.

[0038] Fig. 9 is a cross-sectional view showing a pad and a first connecting pad according to another embodiment of the present invention.

[0039] Fig.10 Other embodiments of the present invention relate to Figure 4a A cross-sectional view taken along line II' is shown.

[0040] In the figure: WM-window part; DM-display module; DP-display panel; ISU-input sensing unit; BC-storage component; DP-CL-circuit element layer; DP-OLED-display element layer; TFL-insulating layer; FB-connecting circuit substrate; PD-pad; PD1-first connecting pad; PD2-second connecting pad; FCB-first substrate; PB-driving circuit substrate; PDd-driving pad; PCB-second substrate. DETAILED DESCRIPTION

[0041] In this specification, when describing a certain component (or region, layer, part, etc.) as being "on" other components, "connected to" another component, or "combined with another component", it means that it can be directly configured on other components / directly connected to another component / directly combined with another component, or a third component may be configured between them.

[0042] The same symbols represent the same components. In addition, in the drawings, the thickness, ratio and size of the components are exaggerated for the convenience of explaining the technical content.

[0043] “And / or” includes all combinations of more than one that can be defined for the associated components.

[0044] Although the terms first, second, etc. may be used to describe a variety of constituent elements, these constituent elements are not limited to the above terms. The above terms are only used to distinguish one constituent element from other constituent elements. For example, without departing from the scope of protection of the present invention, the first constituent element may be named as the second constituent element, and similarly, the second constituent element may be named as the first constituent element. Expressions indicating the singular may include multiple meanings unless there is an obvious different interpretation in the text.

[0045] In addition, the terms such as "lower", "lower side", "upper", and "upper side" are used to explain the relationship between the components shown in the drawings. The above terms are relative concepts and are explained based on the directions shown in the drawings.

[0046] Unless otherwise defined, all terms (including technical terms and scientific terms) used in this specification have the same meaning as that generally understood by those skilled in the art. In addition, such terms as defined in commonly used dictionaries should be interpreted as having a meaning consistent with the meaning in the relevant technical context and are clearly defined herein unless interpreted as an ideal or overly formal meaning.

[0047] It should be understood that the terms “including” or “having” are intended to indicate the existence of the features, numbers, steps, actions, constituent elements, parts or combinations thereof recorded in the specification, and are not intended to pre-exclude the existence or additional possibility of one or more other features or numbers, steps, actions, constituent elements, parts or combinations thereof.

[0048] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

[0049] Figure 1 It is a perspective view of a display device according to an embodiment of the present invention. Figure 2 It is an exploded perspective view of a display device according to an embodiment of the present invention.

[0050] Reference Figure 1 , the display device DD can display the image IM through the display surface DD-IS. According to the present invention, the display device DD having a flat display surface DD-IS is illustrated, but it is not limited thereto. The display device DD may also include a curved display surface or a three-dimensional display surface. The three-dimensional display surface includes a plurality of display areas indicating different directions, for example, it may also include a polygonal column display surface.

[0051] According to an embodiment of the present invention, the provided display device DD may be a flexible display device, but it is not limited thereto, and the provided display device DD according to the present invention may be a rigid display device.

[0052] In addition, although not shown in the figure, the electronic module, camera module, power module, etc. installed on the mainboard are configured together with the display device DD in a bracket / case, etc., thereby constituting a mobile terminal device. The display device DD of the present invention can be applied to large electronic devices such as televisions and monitors, as well as small and medium-sized electronic devices such as tablet computers, car navigation, game consoles, smart watches, etc.

[0053] The display surface DD-IS can be parallel to the plane defined by the first direction DR1 and the second direction DR2. The normal direction of the display surface DD-IS, that is, the thickness direction of the display device DD, represents the third direction DR3. In this specification, "when observed on a plane or on a plane or the area on a plane" means the situation observed in the third direction DR3. The front side (or upper surface) and the back side (or lower surface) of each component or unit described below are distinguished according to the third direction DR3. However, the first direction DR1 to the third direction DR3 illustrated in the present embodiment are merely examples, and the directions indicated by the first direction DR1 to the third direction DR3 can be transformed into opposite directions.

[0054] like Figure 1As shown, the display surface DD-IS includes a display area DD-DA for displaying an image IM and a non-display area DD-NDA adjacent to the display area DD-DA. The non-display area DD-NDA may be an area where no image is displayed. Figure 1 , an application icon and a clock window are illustrated as an example of the image IM.

[0055] In addition, the display area DD-DA is shown to be in a quadrilateral shape and the non-display area DD-NDA surrounds the display area DD-DA. However, this is not limited to this, and the shape of the display area DD-DA and the shape of the non-display area DD-NDA can be designed to be relative shapes. For example, the non-display area DD-NDA can be configured to be adjacent to only one side of the display area DD-DA, or the non-display area DD-NDA can be omitted.

[0056] Reference Figure 2 The display device DD may include a window portion WM, a display module DM, a connecting circuit substrate FB, and a storage component BC.

[0057] The window portion WM is disposed on the upper portion of the display module DM and can allow the image provided by the display module DM to pass through the transmission area TA. The window portion WM includes the transmission area TA and the non-transmission area NTA. The transmission area TA may have a Figure 1 That is, the image IM displayed in the display area DD-DA of the display device DD can be recognized from the outside through the transmission area TA of the window portion WM.

[0058] The non-transmitting area NTA may have Figure 1 The non-display area DD-NDA shown corresponds to the shape. The non-transmitting area NTA may be an area with a relatively lower light transmittance than the transmitting area TA. However, the technical concept of the present invention is not limited thereto, and the non-transmitting area NTA may also be omitted.

[0059] The window portion WM may be made of glass, sapphire, or plastic. In addition, the window portion WM is shown as a single layer, but the window portion WM may include multiple layers. The window portion WM may include: a base layer; and at least one printed layer, overlapping with the non-transparent area NTA and arranged on the back of the base layer. The printed layer may have a specified color. As an example, the provided printed layer may be black, or a color other than black.

[0060] The display module DM is disposed between the window portion WM and the storage component BC. The display module DM includes a display panel DP and an input sensing unit ISU.

[0061] The display panel DP can generate an image and transmit the generated image to the window portion WM. According to an embodiment of the present invention, the display panel DP can be an organic light-emitting display panel, a liquid crystal display panel, or a quantum dot light-emitting display panel, and is not particularly limited. For example, the organic light-emitting display panel includes an organic light-emitting element. The liquid crystal display panel includes liquid crystal molecules. The quantum dot light-emitting display panel includes quantum dots or quantum loads.

[0062] In the following description, the display panel DP of the present invention is an organic light emitting display panel. However, the technical concept of the present invention is not limited thereto, and according to embodiments, various display panels can be applied to the present invention.

[0063] The input sensing unit ISU may be disposed between the window portion WM and the display panel DP. The input sensing unit ISU senses input applied from the outside. The input applied from the outside may be provided in a variety of forms. For example, the external input includes various forms of external input such as a part of the user's body, a stylus, light, heat, or pressure. In addition, in addition to input contacted by a part of the user's body such as a hand, a close or adjacent space touch (e.g., hovering) may also be a form of input.

[0064] The input sensing unit ISU can be directly configured on the display panel DP. In this specification, "composition A is directly configured on composition B" means that no adhesive layer is configured between composition A and composition B. In this embodiment, the input sensing unit ISU can be manufactured together with the display panel DP through a continuous process. However, the technical idea of ​​the present invention is not limited to this, and a separate panel can be provided as the input sensing unit ISU and combined with the display panel DP through an adhesive layer. As another example, the input sensing unit ISU can be omitted.

[0065] The connection circuit substrate FB can be connected to one end of the display panel DP, thereby transmitting a driving signal to the display panel DP. According to the present invention, the connection circuit substrate FB can be a flexible circuit substrate (Flexible circuit board), and the driving signal can be a signal for displaying an image on the display panel DP. In addition, although not shown in the figure, the driving circuit substrate that provides the driving signal can be connected to one end of the connection circuit substrate FB. The connection circuit substrate FB can be arranged between the display panel DP and the driving circuit substrate, and transmit the driving signal provided from the driving circuit substrate to the display panel DP.

[0066] On the other hand, through Figure 2Only the structure of connecting the connection circuit substrate FB and the display panel DP is shown, but it is not limited to this. The display device DD may also include a touch circuit substrate connected to the input sensing unit ISU. The touch circuit substrate may provide a touch drive signal to the input sensing unit ISU. In addition, the bonding method of connecting the connection circuit substrate FB and the display panel DP according to the present invention may be substantially the same as the bonding method of connecting the touch circuit substrate and the input sensing unit ISU.

[0067] The storage component BC may be combined with the window portion WM. The storage component BC provides the back side of the display device DD and is combined with the window portion WM to define the internal space. The storage component BC may include a material having relatively high rigidity. For example, the storage component BC may include a plurality of frames and / or plates made of glass, plastic, or metal. The storage component BC may stably protect the structure of the display device DD stored in the internal space from external impact.

[0068] In addition, the storage part BC is described as including a material having high rigidity, but the storage part BC is not limited thereto, and may include a flexible material. Although not shown, the display device DD according to the embodiment of the present invention may have a foldable or bendable property. As a result, the structure included in the display device DD may also have a soft property.

[0069] Figure 3 is a cross-sectional view of a display module according to an embodiment of the present invention.

[0070] Reference Figure 3 The display panel DP includes a base substrate SUB, a circuit element layer DP-CL configured on the base substrate SUB, a display element layer DP-OLED and an insulating layer TFL.

[0071] The base substrate SUB may include at least one plastic film. The base substrate SUB is a flexible substrate and may include a plastic substrate, a glass substrate, a metal substrate, or an organic / inorganic composite material substrate. Figure 1 The display area DD-DA and the non-display area DD-NDA described above may correspond to the display area DP-DA and the non-display area DP-NDA defined in the base substrate SUB, respectively. Hereinafter, the base substrate SUB may be described as a display substrate.

[0072] The circuit element layer DP-CL includes at least one intermediate insulating layer and circuit elements. The intermediate insulating layer includes at least one intermediate inorganic film and at least one intermediate organic film. The circuit elements include signal lines, pixel driving circuits, and the like.

[0073] The display element layer DP-OLED includes a plurality of organic light emitting diodes. The display element layer DP-OLED may also include an organic film such as a pixel definition film. According to other embodiments, when the provided display panel is a liquid crystal display panel, the provided display element layer may be a liquid crystal layer.

[0074] The insulating layer TFL seals the display element layer DP-OLED. As an example, the insulating layer TFL may be a thin film encapsulation layer. The insulating layer TFL protects the display element layer DP-OLED from foreign matter such as moisture, oxygen, and dust particles. Figure 3 As shown in FIG. 1 , the insulating layer TFL is shown as overlapping the display area DP-DA and the non-display area DP-NDA, but the present invention is not limited thereto and the insulating layer TFL may not overlap the non-display area DP-NDA.

[0075] Figure 4a is a top view of a display device according to an embodiment of the present invention. Figure 4b This is a partial cross-sectional view showing a part of a display device according to an embodiment of the present invention.

[0076] Reference Figure 4a The display device DD includes a display panel DP, a connection circuit substrate FB electrically connected to the display panel DP, and a drive circuit substrate PB electrically connected to the connection circuit substrate FB.

[0077] The display panel DP may include a gate driving circuit GDC, a plurality of signal lines SGL, a plurality of pads PD overlapping the pad area SA, and a plurality of pixels PX.

[0078] The pixels PX are arranged in the display area DP-DA. The pixels PX include an organic light emitting diode and a pixel driving circuit connected to the organic light emitting diode. The gate driving circuit GDC, the signal line SGL, the pad PD and the pixel driving circuit may be included in the display area DP-DA. Figure 3 The circuit element layer DP-CL on the base substrate SUB is shown.

[0079] The gate driving circuit GDC generates a plurality of gate signals and sequentially outputs the gate signals to a plurality of gate lines GL described below. The gate driving circuit GDC may include a plurality of thin film transistors formed by the same process as the pixel driving circuit of the pixel PX, for example, by an LTPS (Low Temperature Polycrystalline Silicon) process or an LTPO (Low Temperature Polycrystalline Oxide) process.

[0080] The signal line SGL overlaps the display area DP-DA and the non-display area DP-NDA, and the signal line SGL can be configured on the base substrate SUB. The signal line SGL includes a gate line GL, a data line DL, a power line PL, and a control signal line CSL. The gate line GL is connected to the corresponding pixels in the pixels PX, and the data line DL is connected to the corresponding pixels in the pixels PX. The power line PL is connected to the pixel PX. The control signal line CSL can provide a control signal to the gate drive circuit GDC.

[0081] The connection circuit substrate FB includes a first substrate FCB, a first connection pad PD1, a second connection pad PD2, and a driving chip DC. The connection circuit substrate FB can be connected to one end of the display panel DP and one end of the driving circuit substrate PB. As described above, the provided connection circuit substrate FB can be a flexible printed circuit substrate (Flexible printed circuitboard). For example, Figure 2 As shown, the connection circuit substrate FB may be bent along one side of the display panel DP and disposed on the back side of the display panel DP.

[0082] On the other hand, Figure 4a , the connection circuit substrate FB is shown to be separated from the display panel DP and the driving circuit substrate PB, but the connection circuit substrate FB can be connected to a part of the non-display area DP-NDA of the display panel DP and a part of the driving circuit substrate PB, respectively.

[0083] The first substrate FCB may define a first pad area FA1 including a plurality of first connection pads PD1 and a second pad area FA2 including a plurality of second connection pads PD2. The plurality of first connection pads PD1 and the plurality of second connection pads PD2 may be spaced apart in the first direction DR1.

[0084] When the connection circuit substrate FB is bonded (joined) to the display panel DP, the pad area SA and the first pad area FA1 may overlap each other. According to the present invention, the plurality of first connection pads PD1 may be electrically bonded to the plurality of pads PD of the display panel DP, respectively. As a result, the plurality of drive signals transmitted from the plurality of first connection pads PD1 may be transmitted to the pixels PX and the pixel drive circuit of the display panel DP through the plurality of pads PD.

[0085] According to an embodiment of the present invention, the plurality of pads PD of the display panel DP can be bonded to the plurality of first connection pads PD1 of the connection circuit substrate FB based on ultrasonic bonding. The ultrasonic bonding method refers to a situation where two metal materials are directly bonded by pressure and ultrasonic vibration. As a result, the plurality of pads PD are in contact with the plurality of first connection pads PD1 respectively and are electrically connected.

[0086] The driving circuit substrate PB includes a second substrate PCB and driving pads PDd disposed on the second substrate PCB. The driving pads PDd may be disposed in a driving pad area PA defined on the second substrate PCB.

[0087] When the first substrate FCB of the connection circuit substrate FB and the second substrate PCB of the drive circuit substrate PB are bonded, the driving pad area PA and the second pad area FA2 can overlap each other. According to the present invention, the plurality of second connection pads PD2 of the connection circuit substrate FB can be electrically bonded to the plurality of driving pads PDd of the drive circuit substrate PB, respectively. As a result, the driving signal output from the driving pad PDd of the drive circuit substrate PB can be transmitted to the second connection pad PD2 of the connection circuit substrate FB.

[0088] According to an embodiment of the present invention, the second connection pads PD2 of the connection circuit substrate FB can be bonded to the driving pads PDd of the driving circuit substrate PB by ultrasonic bonding. As a result, the driving pads PDd contact the first connection pads PD1 and are electrically connected.

[0089] The driving chip DC may be disposed between the first connection pad PD1 and the second connection pad PD2. That is, the first connection pad PD1 and the second connection pad PD2 may be spaced apart with the driving chip DC disposed therebetween.

[0090] The driving chip DC receives the driving signal transmitted from the driving circuit substrate PB through the second connecting pad PD2, and outputs the data signal to be provided to the pixel PX based on the received driving signal. The data signal can be transmitted to the pad PD through the first connecting pad PD1. Each pad PD can transmit multiple data signals transmitted from the driving chip DC to multiple data lines DL in the multiple signal lines SGL.

[0091] On the other hand, in this specification, the first connection pad PD1 and the second connection pad PD2 of the connection circuit substrate FB are bonded to other pads by ultrasonic bonding, but the present invention is not limited thereto. As another example, one of the first connection pad PD1 and the second connection pad PD2 of the connection circuit substrate FB may be bonded to other pads by ultrasonic bonding, and the other pad may be bonded to other pads by an adhesive. As an example, the adhesive may be ACF (Anisotropic Conducting Film).

[0092] In addition, the connection circuit substrate FB may not be connected to the Figure 3 The display element layers DP-OLED shown are overlapped and arranged on a base substrate SUB.

[0093] Reference Figure 4b , a circuit element layer DP-CL is arranged on the base substrate SUB.

[0094] The circuit element layer DP-CL includes at least one insulating layer and circuit elements. The circuit elements include signal lines, pixel driving circuits, etc. The circuit element layer DP-CL can be formed by forming an insulating layer, a semiconductor layer, and a conductive layer based on coating, deposition, etc., and patterning the insulating layer, semiconductor layer, and conductive layer based on a photolithography process.

[0095] The circuit element layer DP-CL includes a buffer film BFL as an inorganic film, a first intermediate inorganic film 10, and a second intermediate inorganic film 20, and may include an intermediate organic film 30 as an organic film. The buffer film BFL may include a plurality of stacked inorganic films.

[0096] In addition, the pixel driving circuit of the present invention comprises at least two transistors T1 and T2 for driving the organic light emitting diode OLED of the display element layer DP-OLED. Figure 4b exemplarily shows a switch transistor T1 and a drive transistor T2. The switch transistor T1 is connected to the gate line GL and the data line DL, and can control the action of the drive transistor T2. The drive transistor T2 is connected to the organic light emitting diode OLED of the display element layer DP-OLED, and can control the action of the organic light emitting diode OLED.

[0097] The switching transistor T1 includes a first semiconductor pattern OSP1, a first control electrode GE1, a first input electrode DE1, and a first output electrode SE1, and the driving transistor T2 includes a second semiconductor pattern OSP2, a second control electrode GE2, a second input electrode DE2, and a second output electrode SE2.

[0098] The circuit element layer DP-CL defines a first through hole CH1 and a second through hole CH2 for conducting the first control electrode GE1, the first output electrode SE1 and the first semiconductor pattern OSP1 of the switching transistor T1. The circuit element layer DP-CL defines a third through hole CH3 and a fourth through hole CH4 for conducting the second control electrode GE2, the second output electrode SE2 and the second semiconductor pattern OSP2 of the driving transistor T2.

[0099] The display element layer DP-OLED may include an organic light emitting diode OLED. The display element layer DP-OLED includes a pixel definition film PDL. For example, the pixel definition film PDL may be an organic layer.

[0100] A first electrode AE ​​is disposed on the intermediate organic film 30. The first electrode AE ​​is connected to the second output electrode SE2 via a fifth through hole CH5 penetrating the intermediate organic film 30. An opening OM is defined in the pixel definition film PDL. The opening OM of the pixel definition film PDL exposes at least a portion of the first electrode AE. In order to distinguish it from other openings, the opening OM of the pixel definition film PDL is named a light-emitting opening.

[0101] Although not shown separately, a spacer overlapping a portion of the pixel definition film PDL may be disposed on the upper surface of the pixel definition film PDL. The spacer may be integral with the pixel definition film PDL, or may be an insulating structure formed by an additional process.

[0102] The display panel DP may include a light emitting region PXA and a non-light emitting region NPXA adjacent to the light emitting region PXA. The non-light emitting region NPXA may surround the light emitting region PXA. In this embodiment, the light emitting region PXA is defined to correspond to a portion of the first electrode AE ​​exposed through the light emitting opening OM.

[0103] The hole control layer HCL may be commonly configured in the light emitting area PXA and the non-light emitting area NPXA. The hole control layer HCL includes a hole transport layer and may also include a hole injection layer. A light emitting layer EML is configured on the hole control layer HCL. The light emitting layer EML may be configured in an area corresponding to the light emitting opening OM. That is, the light emitting layer EML may be separately formed in each pixel. The light emitting layer EML may include an organic substance and / or an inorganic substance. The light emitting layer EML may generate a specified colored light.

[0104] An electron control layer ECL is arranged on the light-emitting layer EML. The electron control layer ECL includes an electron transport layer and may also include an electron injection layer. The hole control layer HCL and the electron control layer ECL can be formed in common in a plurality of pixels using an open mask. A second electrode CE is arranged on the electron control layer ECL. The second electrode CE has an integral shape and is commonly arranged on the electron control layer ECL respectively included in a plurality of pixels.

[0105] An insulating layer TFL is disposed on the second electrode CE. The insulating layer TFL may be a single encapsulation layer or a plurality of thin films.

[0106] Figure 5a The embodiments of the present invention involve Figure 4a A cross-sectional view taken along line II' is shown. Figure 5b 2 is a cross-sectional view showing a pad and a first connecting pad according to an embodiment of the present invention.

[0107] pass Figure 5a as well as Figure 5b , indicating that Figure 4a The bonding method between each pad PD (hereinafter referred to as pad) arranged on the base substrate SUB of the display panel DP and each first connection pad PD1 (hereinafter referred to as first connection pad) arranged on the first substrate FCB of the connection circuit substrate FB is shown. Figure 5a Six first connection pads PD1 are shown, but the number of the first connection pads PD1 is not limited thereto, and at least one pad may be provided.

[0108] Reference Figure 5a The base substrate SUB may face the first substrate FCB in the third direction DR3. The pad PD and the first connection pad PD1 may face and contact each other in the third direction DR3. In particular, as described above, the pad PD and the first connection pad PD1 of the present invention may be bonded by ultrasonic bonding.

[0109] Reference Figure 5b The pad PD includes a first driving conductive layer P1a, a second driving conductive layer P1b and a third driving conductive layer P1c. The first driving conductive layer P1a is disposed on the base substrate SUB. In particular, the first driving conductive layer P1a can be directly disposed on the base substrate SUB. The second driving conductive layer P1b is disposed on the first driving conductive layer P1a, and the third driving conductive layer P1c is disposed on the second driving conductive layer P1b.

[0110] According to an embodiment of the present invention, the first driving conductive layer P1a and the third driving conductive layer P1c may be formed of the same material. For example, the first driving conductive layer P1a and the third driving conductive layer P1c may be formed of titanium (Ti), and the second driving conductive layer P1b may be formed of aluminum (Al).

[0111] The first driving conductive layer P1a formed of titanium can be easily ultrasonically bonded to the base substrate SUB formed of a glass substrate and the second driving conductive layer P1b formed of aluminum. In addition, the third driving conductive layer P1c formed of titanium can be easily ultrasonically bonded to the second driving conductive layer P1b formed of aluminum.

[0112] In addition, in the third direction DR3 , the thickness of the second driving conductive layer P1 b may be greater than the thickness of each of the first driving conductive layer P1 a and the third driving conductive layer P1 c .

[0113] The first connection pad PD1 includes a first conductive layer PD1a, a second conductive layer PD1b, and a third conductive layer PD1c. The first conductive layer PD1a can be arranged on the first substrate FCB of the connection circuit substrate FB. The second conductive layer PD1b can be entirely overlapped with the first conductive layer PD1a and arranged on the first conductive layer PD1a. The third conductive layer PD1c can be entirely overlapped with the second conductive layer PD1b and arranged on the second conductive layer PD1b.

[0114] According to an embodiment of the present invention, the first conductive layer PD1a and the third conductive layer PD1c may be formed of the same material. Exemplarily, the first conductive layer PD1a and the third conductive layer PD1c may be formed of copper (Cu), respectively, and the second conductive layer PD1b may be formed of tin (Sn). However, the materials of the first conductive layer PD1a to the third conductive layer PD1c involved in the present invention are not limited thereto, and may be formed of any one of metal substances.

[0115] According to an embodiment of the present invention, in the third direction DR3, the thickness of the first conductive layer PD1a may be greater than the thickness of the second conductive layer PD1b, and the thickness of the second conductive layer PD1b may be greater than the thickness of the third conductive layer PD1c. In addition, the area of ​​the third conductive layer PD1c on a plane may be greater than the area of ​​the second conductive layer PD1b on a plane, and the area of ​​the second conductive layer PD1b on a plane may be greater than the area of ​​the first conductive layer PD1a on a plane.

[0116] According to the present invention, the first conductive layer PD1a is directly disposed on the first substrate FCB, and can transmit electrical signals to the signal lines disposed on the first substrate FCB. The second conductive layer PD1b covers the entire first conductive layer PD1a. As the second conductive layer PD1b covers the entire first conductive layer PD1a, the oxidation reaction between the first conductive layer PD1a and the outside can be suppressed.

[0117] The third conductive layer PD1c covers the entire second conductive layer PD1b. In this case, the third conductive layer PD1c may be formed on the second conductive layer PD1b by coating. The third conductive layer PD1c may be a layer bonded to the third driving conductive layer P1c of the base substrate SUB by ultrasonic bonding.

[0118] For example, the bonding efficiency of ultrasonic bonding between titanium (Ti) and copper (Cu) may be better than that of ultrasonic bonding between titanium (Ti) and tin (Sn). Here, bonding efficiency may mean that the contact area between the two components is large. In fact, ultrasonic bonding between the second conductive layer PD1b formed of tin (Sn) and the third driving conductive layer P1c formed of titanium (Ti) may not be easy.

[0119] According to the present invention, the third driving conductive layer P1c formed of titanium and the third conductive layer PD1c formed of copper can be bonded to each other by ultrasonic bonding. On the other hand, the thickness of the provided third conductive layer PD1c can be the thickness required for ultrasonic bonding with the third driving conductive layer P1c, and can be thinner than the thickness of the second conductive layer PD1b and the first conductive layer PD1a, respectively. In addition, although not shown, when the third driving conductive layer P1c and the third conductive layer PD1c are bonded by ultrasonic bonding, at least a portion of the second driving conductive layer P1b can be bonded to the third conductive layer PD1c, and at least a portion of the second conductive layer PD1b can be bonded to the second driving conductive layer P1b.

[0120] As described above, for the third conductive layer PD1c included in the first connection pad PD1, as ultrasonic bonding with the third driving conductive layer P1c of the pad PD becomes easier, process efficiency can be improved.

[0121] Figure 6a The embodiments of the present invention involve Figure 4a A cross-sectional view taken along line II-II' is shown. Figure 6b is a cross-sectional view showing a second connection pad and a driving pad according to an embodiment of the present invention.

[0122] pass Figure 6a as well as Figure 6b , indicating that Figure 4a The bonding method between the multiple driving pads PDd (hereinafter referred to as driving pads) configured on the second substrate PCB of the driving circuit substrate PB shown and the multiple second connecting pads PD2 (hereinafter referred to as second connecting pads) configured on the first substrate FCB of the connecting circuit substrate FB.

[0123] on the other hand, Figure 6a and Figure 6b The structures of the driving pad PDd and the second connecting pad PD2 shown in FIG. Figure 5a and Figure 5b The pad PD described above is the same as the first connection pad PD1. Therefore, only a brief description is given here. Figure 6a and Figure 6b The structure of the driving pad PDd and the second connecting pad PD2 is omitted. Figure 5a and Figure 5b Repeat instructions.

[0124] The driving pad PDd includes a fourth driving conductive layer Pda, a fifth driving conductive layer Pdb and a sixth driving conductive layer Pdc. The fourth driving conductive layer Pda is configured on the second substrate PCB. The fifth driving conductive layer Pdb is configured on the fourth driving conductive layer Pda, and the sixth driving conductive layer Pdc is configured on the fifth driving conductive layer Pdb.

[0125] According to an embodiment of the present invention, the fourth driving conductive layer Pda and the sixth driving conductive layer Pdc may be formed of the same material. For example, the fourth driving conductive layer Pda and the sixth driving conductive layer Pdc may be formed of titanium (Ti), and the fifth driving conductive layer Pdb may be formed of aluminum (Al).

[0126] The second connection pad PD2 includes a fourth conductive layer PD2a, a fifth conductive layer PD2b, and a sixth conductive layer PD2c. As described above, the fourth conductive layer PD2a and the sixth conductive layer PD2c may be formed of the same material, and as an example, may be formed of copper (Cu). The fifth conductive layer PD2b may be formed of tin (Sn) for preventing the fourth conductive layer PD2a from reacting with the outside in an oxidation manner. The thickness of the fourth conductive layer PD2a may be greater than the sum of the thicknesses of the fifth conductive layer PD2b and the sixth conductive layer PD2c, and the thickness of the fifth conductive layer PD2b may be greater than the thickness of the sixth conductive layer PD2c.

[0127] In addition, according to the present invention, the fourth conductive layer PD2a is disposed on the first substrate FCB of the connection circuit substrate FB and can be formed of the same material as the first conductive layer PD1a. For example, the fourth conductive layer PD2a can be formed on the first substrate FCB by the same process as the first conductive layer PD1a.

[0128] The fifth conductive layer PD2b may entirely overlap with the fourth conductive layer PD2a and be disposed on the fourth conductive layer PD2a. The fifth conductive layer PD2b may be formed of the same material as the second conductive layer PD1b and may be formed on the first substrate FCB by the same process as the second conductive layer PD1b.

[0129] The sixth conductive layer PD2c may entirely overlap with the fifth conductive layer PD2b and be disposed on the fifth conductive layer PD2b. The sixth conductive layer PD2c may be formed of the same material as the third conductive layer PD1c and may be formed on the first substrate FCB by the same process as the third conductive layer PD1c.

[0130] According to the present invention, the sixth driving conductive layer Pdc formed of titanium (Ti) may be bonded to the sixth conductive layer PD2c formed of copper (Cu) by ultrasonic bonding.

[0131] Figure 7 It is shown Figure 4a A top view of the connection circuit substrate is shown. Figure 8 The embodiments of the present invention involve Figure 7 A cross-sectional view taken along line AA' is shown.

[0132] Reference Figure 7, the connection circuit substrate FB also includes Figure 4a The first signal line SL-1 and the second signal line SL-2 shown in the connecting circuit board FB are shown.

[0133] The first signal line SL-1 is disposed between the first connection pad PD1 and the driving chip DC to electrically connect the first connection pad PD1 and the driving chip DC. One end of the first signal line SL-1 is connected to the first connection pad PD1, and the other end of the first signal line SL-1 is connected to the driving chip DC.

[0134] The second signal line SL-2 is disposed between the second connection pad PD2 and the driving chip DC to electrically connect the second connection pad PD2 and the driving chip DC. One end of the second signal line SL-2 is connected to the second connection pad PD2, and the other end of the second signal line SL-2 is connected to the driving chip DC.

[0135] Reference Figure 8 The first signal lines SL-1 of the present invention include first to third line layers SL-1a to SL-1c. The first line layer SL-1a can be formed by the same process as the first conductive layer PD1a and arranged on the first substrate FCB. For example, the first line layer SL-1a can have a shape integral with the first conductive layer PD1a.

[0136] The second line layer SL-1b may be formed through the same process as the second conductive layer PD1b and disposed on the first line layer SL-1a. For example, the second line layer SL-1b may have a shape integral with the second conductive layer PD1b.

[0137] The third line layer SL-1c may be formed through the same process as the third conductive layer PD1c and disposed on the second line layer SL-1b. For example, the third line layer SL-1c may have a shape integral with the third conductive layer PD1c.

[0138] like Figure 8 As shown, the thickness of the first line layer SL-1a may be greater than the sum of the thicknesses of the second line layer SL-1b and the third line layer SL-1c. In addition, the first line layer SL-1a and the third line layer SL-1c may be formed of the same material, namely copper (Cu), and the second line layer SL-1b may be formed of tin (Sn).

[0139] In addition, although not shown in the figure, the second signal line SL-2 and the second connection pad PD2 may also be Figure 8 The structure shown is formed.

[0140] Fig. 9 2 is a cross-sectional view showing a pad and a first connecting pad according to an embodiment of the present invention.

[0141] compared to Figure 5b The first connection pad PD1 shown, Fig. 9 In the first connection pad PD1z shown, only the structure of the third conductive layer PD1c-z is deformed, and the remaining structures may be substantially the same. Therefore, the description of the remaining structures is omitted.

[0142] Reference Fig. 9 , the third conductive layer PD1c-z may overlap the second conductive layer PD1b as a whole. In particular, the third conductive layer PD1c-z involved in the present invention may be configured only on the upper surface of the second conductive layer PD1b. That is, the third conductive layer PD1c-z may not be configured on at least a portion of the second conductive layer PD1b. For example, the third conductive layer PD1c-z may be configured only on the upper surface of the second conductive layer PD1b ultrasonically bonded to the third driving conductive layer P1c, and may not be formed on the side of the second conductive layer PD1b.

[0143] Fig.10 Other embodiments of the present invention relate to Figure 4a A cross-sectional view taken along line II' is shown.

[0144] Reference Fig.10 A resin RS may be formed between the first substrate FCB and the base substrate SUB. The resin RS may block the pads PD and the first connection pads PD1 from the outside air. As a result, oxidation of the pads PD and the first connection pads PD1 may be prevented.

[0145] Although not shown in the figure, resin may be disposed between the first substrate FCB and the second substrate PCB. Figure 6a The driving pad PDd and the second connection pad PD2 are shown between the external air.

[0146] As described above, embodiments are disclosed in the drawings and the specification. Although specific terms are used herein, the purpose of using the above terms is only to illustrate the present invention and is not intended to limit the meaning or the scope of the present invention as described in the claims. Therefore, a person skilled in the art will understand that various modifications and other equivalent embodiments can be implemented. Therefore, the true technical scope to be protected by the present invention should be determined by the technical ideas of the claims.

Claims

1. A circuit substrate, comprising: substrate; A plurality of first connecting pads are disposed on the substrate and arranged along a first direction; a plurality of second connection pads, arranged on the substrate and arranged along the first direction, and spaced apart from the plurality of first connection pads in a second direction perpendicular to the first direction; as well as a driving chip, arranged on the substrate and between the plurality of first connection pads and the plurality of second connection pads, The plurality of first connection pads respectively include: A first conductive layer, disposed on the substrate; a second conductive layer, which entirely overlaps with the first conductive layer and is disposed on the first conductive layer, and is formed of a material different from that of the first conductive layer; and a third conductive layer, which entirely overlaps with the second conductive layer and is disposed on the second conductive layer, The circuit substrate further comprises: a plurality of first signal lines, arranged between the plurality of first connection pads and the driving chip and electrically connecting the plurality of first connection pads and the driving chip; and a plurality of second signal lines, arranged between the plurality of second connection pads and the driving chip and electrically connecting the plurality of second connection pads and the driving chip, The plurality of first signal lines respectively include: A first line layer, disposed on the substrate and having a shape integral with the first conductive layer; A second line layer, disposed on the first line layer and having a shape integral with the second conductive layer; and The third line layer is disposed on the second line layer and has a shape integral with the third conductive layer.

2. The circuit substrate according to claim 1, wherein: In the thickness direction of the substrate, the thickness of the first conductive layer is greater than the thickness of the second conductive layer, and the thickness of the second conductive layer is greater than the thickness of the third conductive layer.

3. The circuit substrate according to claim 2, wherein: An area on a plane of the third conductive layer is greater than an area on a plane of the second conductive layer, and an area on a plane of the second conductive layer is greater than an area on a plane of the first conductive layer.

4. The circuit substrate according to claim 1, wherein: The first conductive layer and the third conductive layer are formed of the same material.

5. The circuit substrate according to claim 1, wherein: In a thickness direction of the substrate, a sum of thicknesses of the second line layer and the third line layer is smaller than a thickness of the first line layer.

6. The circuit substrate according to claim 1, wherein: The first conductive layer and the first line layer are formed of the same material, and the second conductive layer and the second line layer are formed of the same material.

7. The circuit substrate according to claim 1, wherein: The plurality of second connection pads respectively include: a fourth conductive layer, disposed on the substrate; a fifth conductive layer, which entirely overlaps with the fourth conductive layer and is disposed on the fourth conductive layer, and is formed of a material different from that of the fourth conductive layer; and The sixth conductive layer entirely overlaps with the fifth conductive layer and is disposed on the fifth conductive layer.

8. The circuit substrate according to claim 7, wherein: The first conductive layer and the fourth conductive layer are formed of the same material, the second conductive layer and the fifth conductive layer are formed of the same material, and the third conductive layer and the sixth conductive layer are formed of the same material.

9. The circuit substrate according to claim 7, wherein: The fourth conductive layer and the sixth conductive layer are formed of the same material.

10. The circuit substrate according to claim 7, wherein: In the thickness direction of the substrate, the thickness of the fourth conductive layer is greater than the sum of the thicknesses of the fifth conductive layer and the sixth conductive layer.

11. The circuit substrate according to claim 1, wherein: The first to third conductive layers are respectively made of metal.

12. The circuit substrate according to claim 1, wherein: The third conductive layer is not disposed on at least a portion of the second conductive layer.

13. A display device, comprising: The display module comprises a base substrate and a plurality of driving pads, wherein the base substrate comprises a display area and a non-display area adjacent to the display area, and the driving pads overlap with the non-display area and are arranged on the base substrate; as well as A circuit substrate comprises a substrate, a plurality of connection pads arranged on the substrate and respectively contacting the plurality of driving pads, and a driving chip arranged on the substrate. The plurality of connecting pads respectively include: A first conductive layer, disposed on the substrate; a second conductive layer overlapping the first conductive layer and disposed on the first conductive layer, and formed of a material different from that of the first conductive layer; and a third conductive layer, overlapping the second conductive layer and disposed on the second conductive layer, and contacting corresponding driving pads among the plurality of driving pads, The circuit substrate further includes a plurality of signal lines, which are arranged between the plurality of connection pads and the driver chip and electrically connect the plurality of connection pads and the driver chip. The plurality of signal lines respectively include: A first line layer, disposed on the substrate and having a shape integral with the first conductive layer; A second line layer, disposed on the first line layer and having a shape integral with the second conductive layer; and The third line layer is disposed on the second line layer and has a shape integral with the third conductive layer.

14. The display device according to claim 13, further comprising: The resin is disposed between the base substrate and the substrate and surrounds the plurality of driving pads and the plurality of connecting pads.

15. The display device according to claim 13, wherein: At least a portion of the second conductive layer contacts the corresponding driving pad.

16. The display device according to claim 13, wherein: The second conductive layer entirely overlaps with the first conductive layer, and at least a portion of the third conductive layer overlaps with the second conductive layer.

17. The display device according to claim 13, wherein: The plurality of driving pads respectively include: A first driving conductive layer is disposed on the base substrate; A second driving conductive layer, disposed on the first driving conductive layer; and The third driving conductive layer is disposed on the second driving conductive layer and is in contact with the second driving conductive layer.

18. The display device according to claim 17, wherein: The first driving conductive layer and the third driving conductive layer are formed of the same material. The thickness of the second driving conductive layer is greater than the sum of the thicknesses of the first driving conductive layer and the third driving conductive layer.

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