Current limiting method for multi-level inverter and multi-level inverter

Abstract

A method for current limiting in the event of a transient voltage change at an alternating current output terminal (17, 18, 19) of a multilevel inverter (1) is disclosed, the multilevel inverter comprising a bridge circuit (2, 31) having a first direct voltage input terminal (3), a second direct voltage input terminal (4), a neutral terminal (5) and a bridge output terminal (6, 7, 8), and a grid filter (16) having a choke (13, 14, 15) connected between the bridge output terminal (6, 7, 8) and the alternating current output terminal (17, 18, 19) and a capacitor (25, 26, 27) connected between the alternating current output terminal (17, 18, 19) and the neutral terminal (5). In the method, depending on the voltage (V C1_ac ) ground, the choke current (I L1_ac ) exceeds a first current threshold value (I_FRT_1), the normal operating mode is interrupted and measures for current limiting are initiated. In addition, a multilevel inverter (1) is disclosed, which has a control device (29) provided for implementing such a method.

Description

Technical Field

[0001] The invention relates to a method for current limiting in the event of transient voltage changes at an alternating current output of a multilevel inverter and to a multilevel inverter having a control unit which is configured to carry out the method. Background Art

[0002] Due to regulatory requirements, inverters in decentralized energy generation facilities are not allowed to be separated from the grid in the event of a certain grid fault, but must be able to overcome such grid faults and even contribute to dynamic grid support (FRT, Fault Ride Through) by feeding in reactive power. One possible grid fault to be overcome is a sudden transient voltage drop of the grid voltage to 0% within a few hundred microseconds to 1 or 2 milliseconds, or a sudden transient change in the load at the output of the inverter.

[0003] In the event of a sudden transient voltage jump at the alternating current output of the inverter, the potential at the bridge output of the inverter bridge circuit is still the same as in normal operation of the inverter. The choke of the line filter, which is arranged between the bridge output and the alternating current output, is thus magnetized by the high voltage difference, which leads to a high current gradient. The inverter regulator cannot immediately follow this rapid change of the alternating current output of the inverter, so that additional current limiting is required to prevent damage to components of the inverter.

[0004] In order to limit the current in the event of transient voltage changes at the alternating current output of the inverter, it is known and common in the prior art to limit the current at a voltage above At the first current threshold, the control signals of all power semiconductor switches of the bridge circuit of the inverter are directly and simultaneously blocked without isolating the inverter from the grid or the load, and then the normal operation of the inverter is continued with the next normal control cycle or after a second current threshold that is lower than the first current threshold or lower than the first current threshold, the first current threshold being lower than the absolute current limit at which the inverter is shut down and is disconnected from the grid or the load. When the first current threshold is again exceeded, all power semiconductor switches of the bridge circuit are shut down again by blocking the control signals, so that current limitation according to the principle of two-point control is achieved.

[0005] In the case of multilevel inverters, in particular in the case of multilevel inverters with the so-called NPC topology (neutral point clamped topology), the associated voltage levels are applied to the output terminals of the bridge circuit by means of different potentials at the input terminals of the bridge circuit. As a result, when all power semiconductor switches of the bridge circuit are simultaneously actuated to switch to the off state, it can happen that due to the different speeds at which the different power semiconductor switches switch to the off state, in combination with the currents subsequently generated by the freewheeling diodes additionally present in the bridge circuit, a higher voltage is temporarily present at the individual power semiconductor switches of the bridge circuit than during normal operation of the inverter. This higher voltage can possibly lead to damage to the individual power semiconductor switches of the bridge circuit.

[0006] Furthermore, in the case of a simple simultaneous switching off of all power semiconductor switches of the bridge circuit, only two different voltage levels are actually used out of the multiple voltage levels of the multilevel inverter, so that existing possibilities for optimizing current limiting remain unused. Summary of the invention

[0007] The object of the present invention is therefore to provide a method for current limiting in the event of transient voltage changes at the alternating current output of a multilevel inverter or a corresponding inverter, wherein optimized current limiting with respect to the load on the power semiconductor switches of a bridge circuit of the inverter is achieved by means of currents that are as low as possible and cycling frequencies that are as low as possible, and wherein a higher voltage than in normal operation of the bridge circuit is prevented from occurring at the power semiconductor switches.

[0008] This object is achieved according to the invention by a method according to independent claim 1 and a multilevel inverter according to independent claim 7. Advantageous embodiments of the invention are described in the dependent claims.

[0009] In the method according to the invention for current limiting in the event of a transient voltage change at an alternating current output of a multilevel inverter, two situations are distinguished, wherein the multilevel inverter has a bridge circuit and a power supply filter, the bridge circuit having a first DC voltage input, a second DC voltage input, a neutral terminal and a bridge output, the power supply filter having a choke connected between the bridge output and the alternating current output and a capacitor connected between the alternating current output and the neutral terminal, and the multilevel inverter is configured to selectively apply a potential present at the first DC voltage input, a potential present at the second DC voltage input, or a potential present at the neutral terminal to the bridge output.

[0010] In the case where the magnitude of the voltage on the capacitor is higher than a voltage threshold when the inverter is operating in normal operating mode, the normal operating mode is interrupted when the magnitude of the current flowing through the choke is higher than a first current threshold and the potential applied to the neutral terminal is applied to the bridge output until the magnitude of the current flowing through the choke is lower than a second current threshold that is less than or equal to the first current threshold.

[0011] In the case where the magnitude of the voltage on the capacitor is below or at the voltage threshold when the inverter is operated in the normal operation mode, the normal operation mode is also interrupted when the magnitude of the current flowing through the choke exceeds the first current threshold, and the potential on the corresponding DC voltage input terminal different from the DC voltage input terminal (the potential applied to the DC voltage input terminal was last applied to the bridge output terminal before exceeding the first current threshold) is applied to the bridge output terminal until the magnitude of the current flowing through the choke is below the second current threshold value which is less than or equal to the first current threshold value. That is, if the potential applied to the first DC voltage input terminal is applied to the bridge output terminal before exceeding the first current threshold value, the potential applied to the second DC voltage input terminal is applied to the bridge output terminal after exceeding the first current threshold value. Correspondingly, if the potential applied to the second DC voltage input terminal is applied to the bridge output terminal before exceeding the first current threshold value, the potential applied to the first DC voltage input terminal is applied to the bridge output terminal after exceeding the first current threshold value.

[0012] The application of different potentials to the bridge outputs, depending on the value of the voltage at the capacitor, at the time of exceeding the first current threshold, ensures an optimal setting of the current slope to be set when using the method for current limiting according to the invention for the drop in the magnitude of the current. The magnitude of the voltage at the capacitor exceeding the voltage threshold corresponds to a moderate transient voltage jump at the alternating current output and thus also to a moderate current slope for the resulting rise in the magnitude of the current. Accordingly, after the magnitude of the current flowing through the choke exceeds the first current threshold, a moderate current slope for the resulting drop in the magnitude of the current is achieved by applying the potential applied to the neutral terminal, whereas a significantly greater current slope for the magnitude of the drop in the current is produced when a different potential is applied to the corresponding DC voltage input than before exceeding the first current threshold, or when all power semiconductor switches are turned off according to the method of the prior art. The setting of the current slope for the magnitude of the drop in the current as small as possible ensures the lowest possible cycle frequency, with which the different potentials are applied to the bridge outputs during the method for current limiting.

[0013] The situation where the magnitude of the voltage on the capacitor is below or at the voltage threshold corresponds to a stronger transient voltage jump and a resulting greater current slope for the rise in the magnitude of the current. In this case, when the potential applied to the neutral terminal is applied after exceeding the first current threshold, the magnitude of the current flowing through the choke continues to increase, which is then prevented by applying a potential at the corresponding DC voltage input that is different from the DC voltage input at which the potential applied before exceeding the first current threshold was finally applied to the bridge output.

[0014] Accordingly, a person skilled in the art is provided with an explanation of the parameter selection of the voltage threshold in the method according to the invention so that in the event of a transient voltage jump, for a voltage across the capacitor above the voltage threshold, the magnitude of the current flowing through the choke does not increase when the potential applied to the neutral terminal is applied to the bridge output after exceeding a first current threshold.

[0015] In the method according to the invention, the application of a potential different from that of the respective DC voltage input before a first current threshold is preferably achieved by all power semiconductor switches between the respective DC voltage input and the bridge output being switched on by corresponding actuation. In the case of a bridge circuit used in a multilevel inverter, this may be a plurality of power semiconductor switches, depending on the topology.

[0016] The first current threshold value is dimensioned such that it is above the maximum value of the current ripples occurring in the normal operating mode of the inverter and below the absolute current limit at which the inverter is switched off from the grid or the load.

[0017] The second current threshold is determined in such a way that a good compromise is achieved between the cycle frequency at which different potentials are applied to the bridge output during the method for current limiting and the height of the current ripple generated during the current limiting. In the case of a selection of the second current threshold equal to the first current threshold, there is actually only one current threshold. In this case, it is particularly advantageous to provide additional means for smoothing the measured value of the current through the choke in order to avoid excessively high cycle frequencies.

[0018] In this case, the normal operating mode of the inverter refers to an operating mode for feeding power into a power grid or a load when there is no fault to be overcome. In this operating mode, during a first half-wave of the alternating current to be fed in, pulse width modulated pulses are applied to the alternating current output, which pulse width modulated pulses alternately have the potential applied to the first DC voltage input and the potential applied to the neutral terminal, and during a second half-wave of the alternating current to be fed in, pulse width modulated pulses are applied to the alternating current output, which pulse width modulated pulses alternately have the potential applied to the second DC voltage input and the potential applied to the neutral terminal.

[0019] In one specific embodiment of the method according to the invention, the normal operating mode is continued after the magnitude of the current flowing through the choke falls below a second current threshold value.

[0020] While continuing the normal operating mode, the potential and pulse width subsequently applied to the bridge output are adjusted to the same as they would be if the normal operating mode had not been interrupted at that moment, which also means that, during the transition from the first half-wave to the second half-wave of the alternating current to be fed in and vice versa, a potential different from that at the corresponding DC voltage input before the first current threshold is exceeded is applied to the bridge output.

[0021] As long as the transient voltage surge has not yet ended, after the normal operating mode has been continued, the first current threshold is again exceeded and the method for current limiting is repeatedly carried out, so that a continuous current limiting according to the principle of two-point control is achieved.

[0022] In another embodiment of the method according to the invention, when the value of the voltage across the capacitor during operation of the inverter in normal operating mode is below or at the voltage threshold, the normal operating mode is interrupted when the value of the current flowing through the choke is above a first current threshold, and first the potential applied to the neutral terminal is applied to the output. Then the potential at the corresponding DC voltage input different from the DC voltage input, at which the potential applied was last applied to the bridge output before exceeding the first current threshold, is applied to the bridge output until the value of the current flowing through the choke is below a second current threshold that is less than or equal to the first current threshold, and then, before continuing the normal operating mode, the potential at the neutral terminal is first applied to the bridge output again.

[0023] In this embodiment of the method according to the invention, the potential applied to the neutral terminal is applied to the bridge output between applying the potential present at the first DC voltage input to the bridge output and applying the potential present at the second DC voltage input to the bridge output, and between applying the potential present at the second DC voltage input to the bridge output and applying the potential present at the first DC voltage input to the bridge output, thereby avoiding that a higher voltage than in normal operation of the bridge circuit may occur temporarily at the power semiconductor switches due to the power semiconductor switches switching at different speeds. In addition, by applying the potential at the neutral terminal to the bridge output during this period, the frequency of the changeover between applying the potential present at the first DC voltage input to the bridge output and applying the potential present at the second DC voltage input to the bridge output is reduced, and thus the cycle frequency of all power semiconductor switches is reduced, which further reduces the load on the power semiconductor switches.

[0024] In another embodiment of the method according to the invention, in the case where the magnitude of the voltage across the capacitor is below or at a voltage threshold when the inverter is operated in normal operation mode, the normal operation mode is interrupted when the magnitude of the current flowing through the choke exceeds a first current threshold for the first time, and, first, as in the previously described embodiment, the potential at the neutral terminal is applied to the bridge output. Then, the potential at the corresponding DC voltage input different from the DC voltage input at which the potential applied was last applied to the bridge output before the first current threshold was exceeded is applied to the bridge output until the magnitude of the current flowing through the choke is below a second current threshold, and then the potential at the neutral terminal is applied to the bridge output until the magnitude of the current flowing through the choke again exceeds the first current threshold. Thus, a potential different from the corresponding DC voltage input before the first current threshold was exceeded is applied again.

[0025] Depending on the rising and falling below of the first and second current thresholds, the following switching is repeated until the magnitude of the voltage across the capacitor is again above the voltage threshold: a potential different from that at the corresponding DC voltage input before the first rising above the first current threshold is applied to the bridge output, and a potential at the neutral terminal is applied to the bridge output. Only then is the normal operating mode continued.

[0026] In this embodiment of the method according to the invention, the possibility of an even further reduced cycle frequency and thus an even lower load on the power semiconductor switches is obtained. In addition, this embodiment also avoids an unnecessary resumption of the normal operating mode as long as the magnitude of the voltage on the capacitor is below or at the voltage threshold, that is, as long as the transient voltage surge is still present.

[0027] Alternatively, in the previously described specific embodiments of the method according to the invention, the normal operating mode is also continued, which is resumed when a predefinable time has elapsed since the interruption of the normal operating mode.

[0028] In the method according to the invention, a potential is applied to the bridge output, depending on whether the current through the choke and the voltage on the capacitor are above or below a threshold value. For this purpose, the current and the voltage are preferably measured directly on the choke or the capacitor. However, it is also possible to obtain the current and the voltage from other measured and / or known variables in the inverter, or to use equivalent measured variables directly when applying the method. For example, the voltage on the capacitor can be determined from the measured phase voltage of the power grid. The current can also be obtained from the voltage measurement and the voltage can also be obtained from the current measurement.

[0029] If, in one embodiment of the method according to the invention, the duration for which the potential is applied to the bridge output is not determined by exceeding or falling below a threshold value, it is advantageous to apply the potential to the bridge output at least for such a long time that current and potential transients in the bridge circuit have ended. This applies in particular to applying the potential applied to the neutral terminal to the bridge output in order to avoid that, due to the power semiconductor switches switching at different speeds, a higher voltage temporarily occurs at the power semiconductor switches than in normal operation of the bridge circuit.

[0030] The multilevel inverter according to the invention has a bridge circuit with a first DC voltage input, a second DC voltage input, a neutral terminal and a bridge output, and a mains filter with a choke connected between the bridge output and the alternating current output and a capacitor connected between the alternating current output and the neutral terminal. In addition, the multilevel inverter according to the invention comprises a control device, which is configured to implement the method according to the invention.

[0031] The bridge circuit of the multilevel inverter according to the invention can be a diode-clamped NPC (Neutral-Point-Clamped) bridge circuit, which is also known by the alternative names of standard NPC, NPC-I or INPC.

[0032] In another embodiment of the multilevel inverter according to the present invention, the bridge circuit can be a BSNPC (Bidirectional Switch Neutral-Point-Clamped) bridge circuit, which is also known by the alternative names of NPC-II or TNPC.

[0033] In another embodiment of the multilevel inverter according to the present invention, the bridge circuit can be an ANPC (Active Neutral-Point-Clamped) bridge circuit.

[0034] The power semiconductor switches of the bridge circuit of the multilevel inverter according to the invention can be implemented as field effect transistors, such as SiC-MOSFETs, or as bipolar transistors, such as IGBTs in silicon technology. In particular, it is possible that only a single power semiconductor switch of the bridge circuit is implemented as a field effect transistor, and the corresponding other power semiconductor switches of the bridge circuit are implemented as bipolar transistors. This enables an optimized selection of the power semiconductor switches with respect to switching times and switching and conduction losses.

[0035] The multilevel inverter according to the invention can be a single-phase inverter, in which, for example, two bridge circuits can also be clocked alternately, or it can also be a three-phase inverter, in which a three-phase bridge circuit has at least three bridge circuits that are clocked alternately.

[0036] In a multilevel inverter according to the invention having more than one bridge circuit, the current limitation of the method according to the invention can be carried out for each bridge circuit individually and independently of the other bridge circuits. Alternatively, the same current limitation can be achieved in all bridge circuits depending on the respective maximum current through the respective choke and the respective minimum voltage across the respective capacitors between all the network filters arranged between the respective bridge output and the respective alternating current output. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] The invention is explained in more detail below with reference to the accompanying drawings, which serve to illustrate embodiments of the invention without, however, restricting the invention to the features shown.

[0038] Figure 1 An inverter according to the present invention is shown;

[0039] Figure 2 shows the phase branches of the inverter according to the invention;

[0040] Figure 3 shows the time sequence in the method according to the invention in a first case;

[0041] Figure 4 shows the time sequence in the method according to the invention in a second case;

[0042] Figure 5 shows the time sequence in the method according to the invention in a third case;

[0043] Figure 6 shows the time sequence in the method according to the invention in a fourth case;

[0044] Figure 7 shows a time sequence in another embodiment of the method according to the invention;

[0045] Figure 8 shows a bridge circuit of an inverter according to the invention in an embodiment as a diode-clamped NPC bridge circuit;

[0046] Fig. 9 shows a bridge circuit of an inverter according to the present invention in an embodiment as a BSNPC bridge circuit; and

[0047] Fig.10 The bridge circuit of the inverter according to the invention is shown in an embodiment as an ANPC bridge circuit. DETAILED DESCRIPTION

[0048] exist Figure 1 In one embodiment, the inverter 1 according to the present invention is shown as a three-phase inverter. The inverter comprises a three-phase bridge circuit 2 having a first DC voltage input terminal 3, a second DC voltage input terminal 4, a neutral terminal 5 and three bridge output terminals 6, 7, 8. A separate DC voltage intermediate circuit 9 is connected between the first DC voltage input terminal 3 and the second DC voltage input terminal 4, and the center point 10 of the separate DC voltage intermediate circuit 9 is connected to the neutral terminal 5. The first DC voltage input terminal 3 is also connected to a first DC voltage terminal 11 of the inverter 1, and the second DC voltage input terminal 4 is connected to a second DC voltage terminal 12 of the inverter 1.

[0049] The bridge outputs 6, 7, 8 are each connected to an alternating current output 17, 18, 19 of the inverter 1 via a choke 13, 14, 15 of a power filter 16. One of the three phase conductors 20, 21, 22 of a power grid 23 is connected to each of the alternating current outputs 17, 18, 19. Capacitors 25, 26, 27 of the power filter 16 are also each connected to the alternating current outputs 17, 18, 19, wherein the other ends of the capacitors 25, 26, 27 are connected to a common neutral point 28, which in turn is connected to the neutral connection 5 of the bridge circuit 2. In another embodiment of the inverter according to the invention, the star point 24 of the power grid 23 can also be connected to the neutral point 28 and thus also to the neutral connection 5 of the bridge circuit 2.

[0050] The inverter 1 according to the invention further comprises a control device 29, which is configured to control the bridge circuit 2 in such a way that the potential present at the first DC voltage input 3, for example, the positive potential DC+, or the potential present at the second DC voltage input 4, for example, the negative potential DC-, or the potential present at the neutral terminal 5, for example, the neutral potential N, is selectively applied to the bridge outputs 6, 7, 8, in that the control device 29 controls the power semiconductor switches contained in the bridge circuit 2 via control signals to switch to the on state or the off state. The control device 29 is particularly configured to implement the method according to the invention in order to limit the current in the event of a transient voltage change at the alternating current outputs 17, 18, 19.

[0051] Figure 2 The phase branch 30 of the inverter with a single-phase bridge circuit 31 according to the present invention is shown. Figure 1 In the three-phase inverter 1, at least three such single-phase bridge circuits 31 are arranged within the three-phase bridge circuit 2, wherein the first DC voltage input terminals 3 of all the single-phase bridge circuits 31, the second DC voltage input terminals 4 of all the single-phase bridge circuits 31 and the neutral terminals 5 of all the single-phase bridge circuits 31 are connected to one another. The single-phase inverter comprises at least one phase branch 30 having a single-phase bridge circuit 31.

[0052] The control unit 29 detects the current I through the choke 13 L1_ac and the voltage V on capacitor 26 C1_ac , in order to implement current limitation according to the method according to the invention as a function of these variables.

[0053] exist Figure 3 An example of the time sequence in the method according to the invention is shown in FIG. 1 for the case where there is a transient voltage surge in the power grid and the voltage V C1_acThe value of is higher than the voltage threshold V_FRT. In step S1, the inverter is operated in normal operation mode, wherein a potential DC+ is applied to the bridge output. The transient voltage surge of the existing grid causes the current I L1_ac The value of the current I L1_ac The value of the current I is higher than a first current threshold value I_FRT_1 which is lower than the absolute current limit I_HW. When the absolute current limit is reached, the inverter is shut down and separated from the grid or the load. L1_ac At time t1, the value of exceeds the first current threshold value I_FRT_1, the normal operating mode is interrupted and in step S2, the potential N is applied to the bridge output, whereby the current I L1_ac The value of I drops again. The potential N is applied to the output of the bridge until the current I L1_ac The value of is below the second current threshold value I_FRT_2 at time t2. Then, in step S3, the normal operating mode is continued, wherein a potential which would be present even if the normal operating mode was not interrupted at time t2, in the present case the potential DC+, is applied to the bridge output.

[0054] Since there are always transient voltage surges, the current I L1_ac The value of then rises again and at time t3 is again above the first current threshold value I_FRT_1, and then in step S4 the potential N is again applied to the bridge output until the value of the current is again below the second current threshold value I_FRT_2. In this way, as long as there is a transient voltage jump and the current I L1_ac Since the value of always rises again after the continuation of the normal operating mode, current limitation is achieved by the method according to the invention according to the principle of two-point control.

[0055] exist Figure 4 An example of a time sequence in the method according to the invention is shown in FIG. 1 for the case where there is a transient voltage surge in the power grid and the voltage V C1_ac The value of is lower than or at the voltage threshold V_FRT. In step S5, the inverter is operated in a normal operating mode, wherein a potential DC+ is applied to the bridge output. The transient voltage surge of the grid causes the current I L1_ac At time t4, the current I L1_ac The value of is higher than the first current threshold value I_FRT_1. Then, the normal operating mode is interrupted and in step S6, the potential N is first applied to the bridge output, and then the current I L1_ac The value of continues to rise. At time t5, in step S7, the potential DC- is applied to the bridge output, whereby the current I L1_acThe value of I drops again. The potential DC- is applied to the output of the bridge until the current I L1_ac The value of is below the second current threshold value I_FRT_2 at time t6. Then, in step S8, the potential N is first applied to the bridge output again, and at time t7, the normal operating mode is continued in step S9, wherein a potential which would have been present even if the normal operating mode had not been interrupted at time t7, in the present case the potential DC+, is applied to the bridge output.

[0056] Since there are always transient voltage surges, the current I L1_ac The value of then rises again, so that by repeating Figure 4 According to the steps of the method according to the invention shown in , current limitation according to the principle of two-point control is achieved as long as a transient voltage jump is present.

[0057] Figure 5 Another example of the time sequence in the method according to the invention is shown for the case where there is a transient voltage surge in the power grid and the voltage V C1_ac The value is higher than the voltage threshold V_FRT. Figure 3 Different, there is a negative voltage V C1_ac , the magnitude of the negative voltage is higher than the voltage threshold V_FRT. In step S10, the inverter operates in a normal operation mode, wherein Figure 3 Conversely, a negative potential DC- is applied to the bridge output. L1_ac is also negative. Considering the current I L1_ac In the case of magnitudes of Figure 3 In principle, there is no difference in the order in which the current I L1_ac When the value of I_FRT_1 exceeds the first current threshold value I_FRT_1, the normal operation mode is interrupted and the potential N is applied to the bridge output in step S11, whereby the current I L1_ac The value of I drops again. The potential N is applied to the output of the bridge until the current I L1_ac The value of the current I is lower than the second current threshold value I_FRT_2 at time t9. Then, the normal operation mode is continued in step S12, and at time t10 the current I L1_ac When the value of is higher than the first current threshold value I_FRT_1 again, the potential N is applied to the bridge output again in step S13. In this way, by repeating these steps, current limitation is achieved according to the principle of two-point control as long as there is a transient voltage jump.

[0058] exist Figure 6 The example of the time sequence in the method according to the invention in the example of the time sequence in the method according to the invention again relates to the case where there is a transient voltage surge in the power grid and the voltage V C1_acThe value of is lower than or at the voltage threshold V_FRT. Figure 4 In contrast to the example of FIG. 1 , in step S14 the inverter is operated in normal operating mode with the bridge output connected to the inverter. Figure 4 The opposite negative potential DC- is operated. In addition, the current I L1_ac Here it is negative. Considering the current I L1_ac In the case of magnitudes of Figure 4 In principle, the order in which the current I L1_ac The value of is higher than the first current threshold value I_FRT_1. Then, the normal operating mode is interrupted, wherein firstly in step S15 the potential N is applied to the bridge output and then, at time t12, in step S16 the potential DC+ is applied to the bridge output until the current I L1_ac The value of is below the second current threshold value I_FRT_2 at time t13. In step S17, the potential N is first applied to the bridge output again, and at time t14, the normal operating mode is continued in step S18. Figure 6 According to the steps of the method according to the invention shown in FIG. 1 , current limitation according to the principle of two-point control is achieved as long as there is a transient voltage surge.

[0059] exist Figure 7 An example of a time sequence for another specific embodiment of the method according to the invention is shown in FIG. 1 , which again relates to the case where there is a transient voltage surge in the power grid and the voltage V C1_ac The value of is lower than or at the voltage threshold V_FRT. The order of steps S19, S20 and S21 at time t15 and t16 is the same as Figure 4 In the embodiment shown in FIG. 1 , the order of steps S5, S6 and S7 at time t4 and t5 is the same. At time t17, the current I L1_ac When the value of the current I is lower than the second current threshold value I_FRT_2, then in step S22, the potential N is applied to the output terminal of the bridge, that is, it is applied until the current I L1_ac The value of is higher than the first current threshold value I_FRT_1 again at time t18. Then, in the next step S23, the potential DC- is applied to the bridge output terminal similarly to step S21, and the current I L1_ac The value decreased again.

[0060] By repeatedly applying the potentials DC- and N alternately until the current threshold value I_FRT_2 is exceeded or the first current threshold value I_FRT_1 is exceeded, current limitation according to the principle of two-point control is achieved in this embodiment of the method according to the invention. C1_acWhen the value of V_FRT is higher than the voltage threshold V_FRT again, the normal operation mode is continued. Then, if there is still a transient voltage surge, for example, the control is performed again according to the above Figure 4 The method of the present invention in the example is used to limit the current, or to end the current limitation.

[0061] exist Figure 7 The embodiment in FIG. 1 relates to the case where, before the first current threshold I_FRT_1 is exceeded for the first time, the potential DC+ is applied to the bridge output and there is a positive current I L1_ac Before the first current threshold I_FRT_1 is exceeded for the first time, the potential DC- is applied to the bridge output and a negative current I L1_ac In the case of L1_ac In the case of values ​​of , a further embodiment of the method according to the invention results with essentially the same sequence.

[0062] exist Figure 8 , an embodiment of a bridge circuit 31 of an inverter according to the present invention as a diode-clamped NPC bridge circuit is shown. In the bridge circuit 31, a first DC voltage input terminal 3 is connected to a second DC voltage input terminal 4 of the bridge circuit 31 via a series circuit of a first power semiconductor switch T1, a second power semiconductor switch T2, a third power semiconductor switch T3 and a fourth power semiconductor switch T4. For each of the power semiconductor switches T1 to T4, an anti-parallel diode D1 to D4 is arranged, which respectively enables a current flow in the opposite direction to the current flow direction that can be achieved when the corresponding power semiconductor switch T1 to T4 is in the switched-on state.

[0063] The neutral terminal 5 is connected to the junction point between the first power semiconductor switch T1 and the second power semiconductor switch T2 via a fifth diode D5. The junction point between the third power semiconductor switch T3 and the fourth power semiconductor switch T4 is connected to the neutral terminal 5 via a diode D6. The junction point between the second power semiconductor switch T2 and the third power semiconductor switch T3 forms a bridge output 6.

[0064] The power semiconductor switches T1 to T4 can be controlled by the control signals G1 to G4 to switch to the on state or the off state. Then, by appropriate control, the potential DC+ present at the first DC voltage input terminal 3 or the potential DC- present at the second DC voltage input terminal 4 or the potential N present at the neutral terminal 5 can be selectively applied to the bridge output terminal 6.

[0065] exist Figure 8In the embodiment of the bridge circuit 31 in , for example, the power semiconductor switches T1 and T4 are implemented as field effect transistors, such as SiC MOSFETs, and the power semiconductor switches T2 and T3 are implemented as IGBTs in silicon technology, for example. Other combinations of power semiconductor technologies are also possible.

[0066] Fig. 9 An embodiment of a bridge circuit 31 of an inverter according to the invention is shown as a BSNPC bridge circuit. In this case, a first DC voltage input 3 is connected to a second DC voltage input 4 of the bridge circuit 31 via a series circuit of a first power semiconductor switch T1 and a fourth power semiconductor switch T4, wherein the junction point between the first power semiconductor switch T1 and the fourth power semiconductor switch T4 forms a bridge output 6. For each of the power semiconductor switches T1 to T4, an anti-parallel diode D1 to D4 is arranged, which respectively enables a current flow opposite to the current flow direction that can be achieved when the corresponding power semiconductor switch T1 to T4 is in the switched-on state. A series circuit of two power semiconductor switches T2 and T3 is arranged between the junction point between the first power semiconductor switch T1 and the fourth power semiconductor switch T4 and the neutral terminal 5, wherein the two power semiconductor switches T2 and T3 have opposite current flow directions and have a diode D2 or D3 connected in anti-parallel with respect to the corresponding power semiconductor switch. The arrangement consisting of the power semiconductor switches T2 and T3 in combination with the diodes D2 and D3 forms a bidirectional switch.

[0067] The power semiconductor switches T1 to T4 can be controlled by the control signals G1 to G4 to switch to the on state or the off state. Then, by appropriate control, the potential DC+ present at the first DC voltage input terminal 3 or the potential DC- present at the second DC voltage input terminal 4 or the potential N present at the neutral terminal 5 can be selectively applied to the bridge output terminal 6.

[0068] exist Fig. 9 In the exemplary embodiment of the bridge circuit 31 in FIG. 5 , all power semiconductor switches are designed, for example, as bipolar transistors, for example IGBTs in silicon technology. Other power semiconductor technologies or combinations of different power semiconductor technologies are also possible.

[0069] exist Fig.10 , another embodiment of the bridge circuit 31 of the inverter according to the present invention is shown as an ANPC bridge circuit. Figure 8 In the NPC bridge circuit of FIG. 1 , the fifth and sixth power semiconductor switches T5 and T6 are additionally connected in antiparallel with the fifth and sixth diodes D5 and D6 , respectively.

[0070] The power semiconductor switches T1 to T6 can be controlled by the control signals G1 to G6 to switch to the on state or the off state. Then, by appropriate control, the potential DC+ present at the first DC voltage input terminal 3 or the potential DC- present at the second DC voltage input terminal 4 or the potential N present at the neutral terminal 5 can be selectively applied to the bridge output terminal 6.

[0071] exist Fig.10 In the embodiment of the bridge circuit 31 in FIG. 1 , the power semiconductor switches T2 and T3 are implemented as field effect transistors, such as SiC-MOSFETs, and the power semiconductor switches T1 , T4 , T5 and T6 are implemented as bipolar transistors, such as IGBTs in silicon technology. Other combinations of power semiconductor technologies are also possible.

[0072] The invention is not limited to the explicitly shown embodiments but can be modified in many ways, in particular in combination with other embodiments which are shown or are known to a person skilled in the art.

[0073] Reference numerals list

[0074] 1Inverter

[0075] 2 Bridge Circuit

[0076] 3 DC voltage input terminal

[0077] 4 DC voltage input terminal

[0078] 5 Neutral terminal

[0079] 6 Bridge output

[0080] 7 Bridge output

[0081] 8 bridge output

[0082] 9 DC voltage intermediate circuit

[0083] 10 Center Point

[0084] 11 DC voltage terminal

[0085] 12 DC voltage terminals

[0086] 13 Choke

[0087] 14 Choke

[0088] 15 Choke

[0089] 16 Power grid filter

[0090] 17 Alternating current output terminal

[0091] 18 Alternating current output terminal

[0092] 19 Alternating current output terminal

[0093] 20-phase conductor

[0094] 21-phase conductor

[0095] 22-phase conductor

[0096] 23 Power Grid

[0097] 24 star points

[0098] 25 Capacitors

[0099] 26 Capacitors

[0100] 27 Capacitors

[0101] 28 Neutral point

[0102] 29 Control Device

[0103] 30 phase branch

[0104] 31 Bridge circuit

[0105] DC+ potential

[0106] DC-potential

[0107] N potential

[0108] V C1_ac Voltage

[0109] I L1_ac Current

[0110] V_FRT voltage threshold

[0111] I_FRT_1 current threshold

[0112] I_FRT_2 Current Threshold

[0113] I_HW absolute current limit

[0114] Steps S1, S2, ... S23

[0115] Time t1, t2, ... t18

[0116] T1 power semiconductor switch

[0117] T2 power semiconductor switch

[0118] T3 power semiconductor switch

[0119] T4 power semiconductor switch

[0120] T5 power semiconductor switch

[0121] T6 power semiconductor switch

[0122] D1 diode

[0123] D2 diode

[0124] D3 diode

[0125] D4 diode

[0126] D5 diode

[0127] D6 diode

[0128] G1 control signal

[0129] G2 control signal

[0130] G3 control signal

[0131] G4 control signal

[0132] G5 control signal

[0133] G6 control signal

Claims

1. A method for current limiting in the event of a transient voltage change at an alternating current output terminal (17, 18, 19) of a multilevel inverter (1), the multilevel inverter having a bridge circuit and a grid filter (16), the bridge circuit having a first direct current voltage input terminal (3), a second direct current voltage input terminal (4), a neutral terminal (5) and a bridge output terminal (6, 7, 8), the grid filter having a first direct current input terminal (3), a second direct current ... 9) and a capacitor (25, 26, 27) connected between the alternating current output terminal (17, 18, 19) and the neutral terminal (5), the multilevel inverter being configured to selectively apply a potential (DC+) present at the first DC voltage input terminal (3), a potential (DC-) present at the second DC voltage input terminal (4), or a potential (N) present at the neutral terminal (5) to the bridge output terminals (6, 7, 8), wherein: - the voltage (V C1_ac ) is higher than the voltage threshold (V_FRT), when the current (I L1_ac ) is higher than a first current threshold value (I_FRT_1), the normal operating mode is interrupted and the potential (N) on the neutral terminal (5) is applied to the bridge output terminals (6, 7, 8) until the current (I L1_ac ) is lower than a second current threshold (I_FRT_2) that is less than or equal to the first current threshold (I_FRT_1), and - the voltage (V C1_ac ) is lower than or at the voltage threshold (V_FRT), when the current (I L1_ac ) is higher than the first current threshold value (I_FRT_1), and the normal operating mode is interrupted, and the potential (DC+, DC-) at the corresponding DC voltage input terminal (3, 4) different from the following DC voltage input terminal (3, 4) is applied to the bridge output terminal (6, 7, 8) until the current (I L1_ac ) has a value lower than the second current threshold (I_FRT_2) which is less than or equal to the first current threshold (I_FRT_1): the potential applied to the DC voltage input terminal is last applied to the bridge output terminal (6, 7, 8) before it exceeds the first current threshold (I_FRT_1).

2. The method according to claim 1, wherein: When the current (I L1_ac ) is lower than a second current threshold (I_FRT_2) that is less than or equal to the first current threshold (I_FRT_1), continuing the normal operation mode.

3. The method according to claim 2, wherein: When the multi-level inverter (1) operates in a normal operating mode, the voltage (V C1_ac ) is lower than or at the voltage threshold (V_FRT), when the current (I L1_ac ) is higher than the first current threshold (I_FRT_1), and, before continuing the normal operation mode, - firstly, applying the potential (N) at the neutral terminal (5) to the bridge outputs (6, 7, 8), - then, the potential (DC+, DC-) at the respective DC voltage input (3, 4) different from the following DC voltage input (3, 4) is applied to the bridge output (6, 7, 8) until the current (I L1_ac ) is lower than the second current threshold (I_FRT_2) which is less than or equal to the first current threshold (I_FRT_1): the potential applied to the DC voltage input terminal is last applied to the bridge output terminal (6, 7, 8) before it exceeds the first current threshold (I_FRT_1), - The potential (N) at the neutral terminal (5) is then initially applied again to the bridge outputs (6, 7, 8).

4. The method according to claim 1, wherein: When the multi-level inverter (1) operates in a normal operating mode, the voltage (V C1_ac ) is lower than or at the voltage threshold (V_FRT), when the current (I L1_ac ) is higher than the first current threshold (I_FRT_1) for the first time, interrupting the normal operation mode, and, - first, the potential (N) on the neutral terminal (5) is applied to the bridge output terminals (6, 7, 8), Then repeatedly, - applying the potential (DC+, DC-) at the respective DC voltage input (3, 4) different from the following DC voltage input (3, 4) to the bridge output (6, 7, 8) until the current (I L1_ac ) is lower than the second current threshold value (I_FRT_2) which is less than or equal to the first current threshold value (I_FRT_1): the potential applied to the DC voltage input is last applied to the bridge output (6, 7, 8) before it first exceeds the first current threshold value (I_FRT_1); and the potential (N) at the neutral terminal (5) is subsequently applied to the bridge output (6, 7, 8) until the current (I L1_ac ) is again higher than the first current threshold (I_FRT_1).

5. The method according to claim 4, wherein: When the magnitude of the voltage (VC1_ac) across the capacitor (25, 26, 27) is above the voltage threshold (V_FRT), the normal operating mode is continued.

6. The method according to claim 4, wherein: The normal operating mode is resumed when a predeterminable time has elapsed since the interruption of the normal operating mode.

7. A multilevel inverter (1), comprising a bridge circuit and a power grid filter (16) and a control device (29), wherein the bridge circuit comprises a first DC voltage input terminal (3), a second DC voltage input terminal (4), a neutral terminal (5) and a bridge output terminal (6, 7, 8), the power grid filter comprises a choke (13, 14, 15) connected between the bridge output terminal (6, 7, 8) and the alternating current output terminal (17, 18, 19) and a capacitor (25, 26, 27) connected between the alternating current output terminal (17, 18, 19) and the neutral terminal (5), wherein: The control device (29) is provided to carry out the method according to any one of claims 1 to 6.

8. The multilevel inverter (1) according to claim 7, wherein: The bridge circuit is a diode clamped NPC bridge circuit.

9. The multilevel inverter (1) according to claim 7, wherein: The bridge circuit is a BSNPC bridge circuit.

10. The multilevel inverter (1) according to claim 7, wherein: The bridge circuit is an ANPC bridge circuit.

11. The multilevel inverter (1) according to any one of claims 7 to 10, wherein: The multilevel inverter (1) is implemented as a single-phase inverter comprising at least one bridge circuit.

12. The multilevel inverter (1) according to any one of claims 7 to 10, wherein: The multi-level inverter (1) is implemented as a three-phase inverter comprising at least three bridge circuits.

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