Pixel and display device including the same

Abstract

The present disclosure relates to a pixel and a display device including the pixel. The display device may include: a substrate including a display area and a non-display area; and at least one pixel, which is arranged in the display area and includes a pixel circuit layer and a display element layer, the pixel circuit layer includes at least one transistor, and the display element layer includes at least one light-emitting element that emits light, wherein the display element layer may include a first electrode and a second electrode spaced apart from each other on the substrate and each extending in a first direction, and the light-emitting element is electrically connected to each of the first electrode and the second electrode. In one embodiment of the present invention, each of the first electrode and the second electrode may have at least two widths in the direction of extension.

Description

Technical Field

[0001] The present disclosure relates to a pixel including an ultra-small light-emitting element and a display device including the pixel. Background Art

[0002] Light emitting diodes (LEDs) may have relatively satisfactory durability even under severe environmental conditions, and have excellent performance in terms of life span and brightness.

[0003] In order to apply LEDs to lighting devices, display devices, etc., it is necessary to connect the LEDs to electrodes so that a voltage of a power source can be applied to the LEDs. Various studies have been conducted on the arrangement relationship between LEDs and electrodes with respect to the application purpose of LEDs, methods of reducing the space required for electrodes, or methods of manufacturing LEDs. Summary of the invention

[0004] Technical issues

[0005] An object of the present disclosure is to provide a display device in which light emitting elements can be aligned in different directions in an emission region by changing the shape of an alignment electrode so that uniform light output distribution can be achieved in the entire region of the display device.

[0006] Technical Solutions

[0007] A display device according to an embodiment of the present disclosure may include: a substrate including a display area and a non-display area; and at least one pixel, which is arranged in the display area and includes a pixel circuit layer and a display element layer, the pixel circuit layer includes at least one transistor, and the display element layer includes at least one light-emitting element that emits light. The display element layer may include: a first electrode and a second electrode, which are spaced apart from each other on the substrate and each extend in a first direction; and the light-emitting element, which is electrically connected to each of the first electrode and the second electrode.

[0008] In an embodiment of the present disclosure, each of the first electrode and the second electrode may have at least two widths in an extending direction thereof.

[0009] In an embodiment of the present disclosure, the first electrode may include a plurality of first main electrodes arranged in a first direction, and a plurality of first auxiliary electrodes electrically connected to the first main electrodes. The second electrode may include a plurality of second main electrodes spaced apart from the first main electrodes and arranged in the first direction, and a plurality of second auxiliary electrodes electrically connected to the second main electrodes.

[0010] In an embodiment of the present disclosure, the first main electrode and the first auxiliary electrode may be integrated with each other, and the second main electrode and the second auxiliary electrode may be integrated with each other.

[0011] In an embodiment of the present disclosure, the first main electrode and the first auxiliary electrode may have shapes different from each other.The second main electrode and the second auxiliary electrode may have shapes different from each other.

[0012] In an embodiment of the present disclosure, a width of each of the first main electrodes may be greater than a width of each of the first auxiliary electrodes. In an embodiment of the present disclosure, a width of each of the second main electrodes is greater than a width of each of the second auxiliary electrodes.

[0013] In an embodiment of the present disclosure, each of the first main electrodes may have a shape different from the shape of a corresponding one of the first main electrodes adjacent thereto in the first direction. In an embodiment of the present disclosure, each of the second main electrodes may have a shape different from the shape of a corresponding one of the second main electrodes adjacent thereto in the first direction.

[0014] In an embodiment of the present disclosure, each of the first main electrodes and each of the second main electrodes have the same shape. In addition, each of the first auxiliary electrodes and each of the second auxiliary electrodes may have the same shape.

[0015] In an embodiment of the present disclosure, the first auxiliary electrode may include a plurality of 1-1 auxiliary electrodes and a plurality of 1-2 auxiliary electrodes having different widths from each other. In addition, the second auxiliary electrode may include a plurality of 2-1 auxiliary electrodes and a plurality of 2-2 auxiliary electrodes having different widths from each other.

[0016] In an embodiment of the present disclosure, each of the first main electrodes and each of the second main electrodes may have different shapes.

[0017] In an embodiment of the present disclosure, in a plan view, the first main electrode and the second auxiliary electrode may be alternately arranged in a second direction intersecting the first direction, and the second main electrode and the first auxiliary electrode may be alternately arranged in the second direction. Here, the first main electrode and the second main electrode may not be arranged in the same row.

[0018] In an embodiment of the present disclosure, in the second direction, the first main electrode and the second auxiliary electrode may correspond to each other, and the second main electrode and the first auxiliary electrode may correspond to each other.

[0019] In an embodiment of the present disclosure, among the first main electrodes, the first main electrodes disposed in the same column may be spaced apart from each other. In addition, among the second main electrodes, the second main electrodes disposed in the same column may be spaced apart from each other.

[0020] In an embodiment of the present disclosure, the display element layer may further include: a first covering layer, directly disposed on the first main electrode and electrically connecting the first main electrodes adjacent to each other in the first direction; and a second covering layer, directly disposed on the second main electrode and electrically connecting the second main electrodes adjacent to each other in the first direction.

[0021] In an embodiment of the present disclosure, the display element layer may also include: a first connecting line extending in the second direction and electrically connected to the first electrode; a second connecting line parallel to the first connecting line and electrically connected to the second electrode; a dam pattern arranged under each of the first electrode and the second electrode; a first contact electrode electrically connecting the first electrode to any one of the opposite ends of the light-emitting element; and a second contact electrode configured to electrically connect the second electrode to the other of the opposite ends of the light-emitting element.

[0022] In an embodiment of the present disclosure, the first connection line and the first electrode may be integrated with each other, and the second connection line and the second electrode may be integrated with each other.

[0023] In an embodiment of the present disclosure, the display element layer may further include a first insulating layer overlapping a portion of each of the first electrode and the second electrode, and a second insulating layer disposed on an upper surface of the light emitting element. The first contact electrode and the second contact electrode may be spaced apart from each other on the second insulating layer and electrically disconnected from each other.

[0024] A pixel according to an embodiment of the present disclosure may include: a first electrode and a second electrode spaced apart from each other on the same plane and each extending in a direction; and at least one light emitting element electrically connected to each of the first electrode and the second electrode. Each of the first electrode and the second electrode may have at least two widths in the extending direction thereof.

[0025] Beneficial Effects

[0026] Embodiments of the present disclosure may provide a pixel including a light emitting element, wherein the light emitting element is aligned in various directions by changing the shape of an alignment electrode.

[0027] Furthermore, an embodiment of the present disclosure may provide a display device including the above-described pixel, so that a uniform light output distribution may be formed in the entire area of ​​the display device.

[0028] The effects of the present disclosure are not limited to the foregoing, and other various effects are expected herein. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1a is a perspective view schematically showing a light emitting element according to an embodiment of the present disclosure.

[0030] Figure 1b It is schematically shown Figure 1a A cross-sectional view of a light-emitting element.

[0031] Figure 1c is a perspective view schematically showing a light emitting element according to an embodiment of the present disclosure.

[0032] Figure 1d It is schematically shown Figure 1c A cross-sectional view of a light-emitting element.

[0033] Figure 1e is a perspective view schematically showing a light emitting element according to an embodiment of the present disclosure.

[0034] Figure 1f It is schematically shown Figure 1e A cross-sectional view of a light-emitting element.

[0035] Figure 2 A display device according to an embodiment of the present disclosure is shown, and in particular, a display device using Figures 1a to 1f A schematic plan view of a display device using any one of the light-emitting elements shown in FIG. 1 as a light source.

[0036] Figure 3a to Figure 3c It is schematically shown that the Figure 2 Circuit diagrams of various embodiments of the electrical connection relationships of components in any one of the pixels shown in FIG.

[0037] Figure 4 It is schematically shown that the Figure 2 A plan view of display element layers in one of the pixels shown in FIG.

[0038] Figure 5 is only shown schematically Figure 4 A plan view of a first electrode and a second electrode and a light emitting element aligned between the first electrode and the second electrode.

[0039] Figure 6 It is along Figure 4 A schematic cross-sectional view taken along line II'.

[0040] Figure 7 It schematically shows Figure 6 The first contact electrode and the second contact electrode are arranged on the same layer, and are arranged along Figure 4 A cross-sectional view taken along line II'.

[0041] Figure 8 Schematically showing that the coating layers are respectively arranged on Figure 6 The embodiment shown in FIG. 1 is between the first electrode and the first contact electrode and between the second electrode and the second contact electrode, and is along Figure 4 A cross-sectional view taken along line II'.

[0042] Fig. 9 It is along Figure 4 A schematic cross-sectional view taken along line II-II'.

[0043] Fig.10 It is along Figure 4 A schematic cross-sectional view taken along line III-III'.

[0044] Fig.11 Shows Fig.10 Another shape of the bank pattern shown in FIG. Figure 4 A schematic cross-sectional view taken along line III-III'.

[0045] Figures 12 to 19 Shows Figure 4 1 and 2 are other embodiments of a pixel, and are plan views schematically showing a pixel including only some components of a display element layer.

[0046] Fig. 20 Shows Figure 4 1 is another embodiment of a pixel of the present invention, and is a plan view schematically showing a pixel including only some components of a display element layer.

[0047] Fig.21 It is along Fig. 20 Schematic cross-sectional view taken along line IV-IV'. DETAILED DESCRIPTION

[0048] Since the present disclosure allows various changes and many embodiments, specific embodiments will be shown in the drawings and described in detail in the written description. However, this is not intended to limit the present disclosure to a specific mode of practice, and it will be understood that all changes, equivalents and substitutions that do not depart from the technical scope of the present disclosure are included in the present disclosure.

[0049] Throughout the disclosure, in the various figures and embodiments of the present disclosure, the same reference numerals represent the same parts. For clarity, the size of the elements in the drawings may be exaggerated. It will be understood that, although the terms "first", "second", etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, without departing from the teachings of the present disclosure, the first element discussed below may be referred to as the second element. Similarly, the second element may also be referred to as the first element. In the present disclosure, unless the context clearly indicates otherwise, the singular form is also intended to include plural meanings.

[0050] It will also be understood that when used in this specification, the terms "comprise", "include", "have", etc. specify the presence of the stated features, wholes, steps, operations, elements, components and / or combinations thereof, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or combinations thereof. In addition, in the case where a first component such as a layer, film, region or plate is disposed on a second component, the first component may not only be directly on the second component, but a third component may also be inserted between the first component and the second component. In addition, in the case where a first component such as a layer, film, region or plate is formed on a second component, the surface of the second component on which the first component is formed is not limited to the upper surface of the second component, but may include other surfaces such as the side surface or lower surface of the second component. On the contrary, in the case where a first component such as a layer, film, region or plate is below the second component, the first component may not only be directly below the second component, but a third component may also be inserted between the first component and the second component.

[0051] The embodiments of the present disclosure and required details are described with reference to the accompanying drawings so as to describe the present disclosure in detail so that those skilled in the art can easily practice the present disclosure. In addition, a singular form may include a plural form as long as it is not particularly mentioned in a sentence.

[0052] Figure 1a is a perspective view schematically showing a light emitting element according to an embodiment of the present disclosure. Figure 1b It is shown Figure 1a Schematic cross-sectional view of a light-emitting element. Figure 1c is a perspective view schematically showing a light emitting element according to an embodiment of the present disclosure. Figure 1d It is shown Figure 1c Schematic cross-sectional view of a light-emitting element. Figure 1e is a perspective view schematically showing a light emitting element according to an embodiment of the present disclosure. Figure 1f It is shown Figure 1e Schematic cross-sectional view of a light-emitting element.

[0053] For the purpose of explanation, reference will be made to Figure 1a to Figure 1d Describe the cylindrical light emitting element, and refer to Figure 1e and Figure 1f A light-emitting element having a core-shell structure is described. In the embodiments of the present disclosure, the type and / or shape of the light-emitting element is not limited to Figures 1a to 1f The types and / or shapes in the embodiments shown in FIG.

[0054] First, refer to Figure 1a to Figure 1dThe light emitting element LD according to the embodiment of the present disclosure may include a first semiconductor layer 11, a second semiconductor layer 13, and an active layer 12 interposed between the first semiconductor layer 11 and the second semiconductor layer 13. For example, the light emitting element LD may be implemented as an emission stack formed by sequentially stacking the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13.

[0055] In an embodiment of the present disclosure, the light emitting element LD may be formed in a rod-like shape extending in one direction. If the direction in which the light emitting element LD extends is defined as a longitudinal direction, the light emitting element LD may have a first end and a second end in the extending direction. One of the first semiconductor layer 11 and the second semiconductor layer 13 may be disposed in the first end, and the other of the first semiconductor layer 11 and the second semiconductor layer 13 may be disposed in the second end.

[0056] Although the light emitting element LD may be provided in the form of a cylinder, the present disclosure is not limited thereto. The light emitting element LD may include a rod-like shape or a bar-like shape extending in the longitudinal direction (e.g., having an aspect ratio greater than 1). For example, the length L of the light emitting element LD in the longitudinal direction may be greater than its diameter D (or the width of its cross section). The light emitting element LD may include a light emitting diode manufactured to have an ultra-small size (e.g., a length L and / or a diameter D corresponding to a micrometer or nanometer level).

[0057] In an embodiment of the present disclosure, the diameter D of the light emitting element LD may range from about 0.5 μm to 5 μm, and the length L thereof may range from about 1 μm to 10 μm. However, the size of the light emitting element LD is not limited thereto, and may be changed to meet the requirements (or design conditions) of the lighting device or self-emitting display device to which the light emitting element LD is applied.

[0058] The first semiconductor layer 11 may include, for example, at least one n-type semiconductor layer. For example, the first semiconductor layer 11 may include an n-type semiconductor layer including any semiconductor material of InAlGaN, GaN, AlGaN, InGaN, AlN, and InN and doped with a first conductive dopant such as Si, Ge, or Sn. However, the material of the first semiconductor layer 11 is not limited thereto, and the first semiconductor layer 11 may be formed of various other materials.

[0059] The active layer 12 may be disposed on the first semiconductor layer 11 and have a single quantum well structure or a multi-quantum well structure. The position of the active layer 12 may be changed in various ways according to the type of the light emitting element LD. The active layer 12 may emit light having a wavelength ranging from 400nm to 900nm and have a double heterostructure. In an embodiment of the present disclosure, a cladding layer (not shown) doped with a conductive dopant may be formed on and / or below the active layer 12. For example, the cladding layer may be formed as an AlGaN layer or an InAlGaN layer. In an embodiment, the active layer 12 may be formed using a material such as AlGaN or InAlGaN, and the active layer 12 may be formed using various other materials.

[0060] If an electric field having a predetermined voltage or more is applied to opposite ends of the light emitting element LD, the light emitting element LD emits light by coupling of electron-hole pairs in the active layer 12. Since light emission of the light emitting element LD can be controlled based on the aforementioned principle, the light emitting element LD can be used as a pixel of a display device and a light source of various light emitting devices.

[0061] The second semiconductor layer 13 may be disposed on the active layer 12 and include a semiconductor layer having a type different from that of the first semiconductor layer 11. For example, the second semiconductor layer 13 may include at least one p-type semiconductor layer. For example, the second semiconductor layer 13 may include a p-type semiconductor layer including any semiconductor material of InAlGaN, GaN, AlGaN, InGaN, AlN, and InN, and doped with a second conductive dopant such as Mg. However, the material for forming the second semiconductor layer 13 is not limited thereto, and the second semiconductor layer 13 may be formed of various other materials.

[0062] In the embodiments of the present disclosure, Figure 1a and Figure 1b As shown in , the light emitting element LD may further include an electrode layer 15 disposed on the second semiconductor layer 13, and include the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13. In addition, in the embodiment, as Figure 1c and Figure 1d As shown in , the light emitting element LD may further include another electrode layer 16 disposed on one end portion of the first semiconductor layer 11 , and include the electrode layer 15 .

[0063] Although each of the electrode layers 15 and 16 may be formed of an ohmic contact electrode, the present disclosure is not limited thereto. The electrode layers 15 and 16 may include a metal or a metal oxide. For example, chromium (Cr), titanium (Ti), aluminum (Al), gold (Au), nickel (Ni), indium tin oxide (ITO), and oxides or alloys thereof may be used alone or in combination with each other. However, the present disclosure is not limited thereto.

[0064] The materials included in the respective electrode layers 15 and 16 may be the same as or different from each other. The electrode layers 15 and 16 may be substantially transparent or translucent. Therefore, light generated from the light emitting element LD may pass through the electrode layers 15 and 16, and then may be emitted to the outside of the light emitting element LD.

[0065] In an embodiment of the present disclosure, the light emitting element LD may further include an insulating layer 14. However, in some embodiments of the present disclosure, the insulating layer 14 may be omitted or may be provided to cover only some of the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13.

[0066] The insulating layer 14 can prevent the active layer 12 from being short-circuited due to contact with a conductive material other than the first semiconductor layer 11 and the second semiconductor layer 13. In addition, due to the insulating layer 14, the occurrence of defects in the surface of the light-emitting element LD can be minimized, thereby improving the life and efficiency of the light-emitting element LD. In the case where a plurality of light-emitting elements LD are arranged in close contact with each other, the insulating layer 14 can prevent an undesirable short circuit from occurring between the light-emitting elements LD. As long as the active layer 12 can be prevented from being short-circuited with an external conductive material, whether the insulating layer 14 is provided is not limited.

[0067] like Figure 1a and Figure 1b As shown in , the insulating layer 14 may be provided in a portion of the light emitting element LD except for one of the ends of the light emitting element LD. In this case, the insulating layer 14 may expose only the electrode layer 15 provided in one end of the second semiconductor layer 13 of the light emitting element LD, and surround the entire side surface of the component except the electrode layer 15. Here, the insulating layer 14 may allow at least the end of the light emitting element LD to be exposed to the outside, for example, not only the electrode layer 15 provided in one end of the second semiconductor layer 13 but also one end of the first semiconductor layer 11 to be exposed to the outside.

[0068] In an embodiment, if Figure 1c and Figure 1d As shown in , in the case where the electrode layers 15 and 16 are provided in the respective opposite ends of the light emitting element LD, the insulating layer 14 may allow at least one region of each of the electrode layers 15 and 16 to be exposed to the outside. As another example, in an embodiment, the insulating layer 14 may not be provided.

[0069] In an embodiment of the present disclosure, the insulating layer 14 may include a transparent insulating material. For example, the insulating layer 14 may include a material selected from SiO 2 、Si 3 N 4 、Al 2 O 3 and TiO 2At least one insulating material in the group consisting of, but the present disclosure is not limited thereto. In other words, various materials having insulating properties can be used.

[0070] If the insulating layer 14 is provided on the surface of the light emitting element LD, the active layer 12 can be prevented from being short-circuited with the first electrode and / or the second electrode (not shown). In addition, due to the insulating layer 14, the occurrence of defects in the surface of the light emitting element LD can be minimized, thereby improving the life and efficiency of the light emitting element LD. In the case where a plurality of light emitting elements LD are provided in close contact with each other, the insulating layer 14 can prevent an undesirable short circuit from occurring between the light emitting elements LD.

[0071] The light emitting element LD can be used as a light source for various display devices. The light emitting element LD can be manufactured by a surface treatment process. For example, each light emitting element LD can be surface treated so that when a plurality of light emitting elements LD are mixed with a fluid solution (or solvent) and then supplied to each emission region (e.g., the emission region of each sub-pixel), the light emitting element LD can be uniformly dispersed rather than unevenly aggregated in the solution.

[0072] The light-emitting device including the above-mentioned light-emitting element LD can be used not only in a display device, but also in various devices requiring a light source. For example, in the case where a plurality of light-emitting elements LD are arranged in the emission region of each pixel of a display panel, the light-emitting element LD can be used as a light source of the pixel. However, the application field of the light-emitting element LD is not limited to the above-mentioned example. For example, the light-emitting element LD can be used in other types of devices requiring a light source, such as a lighting device.

[0073] Next, we will refer to Figure 1e and Figure 1f Description of a light-emitting element LD having a core-shell structure. The following description of the light-emitting element LD having a core-shell structure will focus on the differences from the above-described embodiment, and components of the light-emitting element LD that are not specifically explained in the following description may be consistent with those of the foregoing embodiment. The same reference numerals will be used to represent components that are similar and / or identical (e.g., corresponding) to those of the above-described embodiment.

[0074] refer to Figure 1e and Figure 1f, the light emitting element LD according to an embodiment of the present disclosure may include a first semiconductor layer 11, a second semiconductor layer 13, and an active layer 12 interposed between the first semiconductor layer 11 and the second semiconductor layer 13. In some embodiments, the light emitting element LD may include an emission pattern 10 having a core-shell structure. The emission pattern 10 may include a first semiconductor layer 11 disposed in a central portion of the light emitting element LD, an active layer 12 surrounding at least one side of the first semiconductor layer 11, a second semiconductor layer 13 surrounding at least one side of the active layer 12, and an electrode layer 15 surrounding at least one side of the second semiconductor layer 13.

[0075] The light emitting element LD may be formed in a polygonal pyramid shape extending in one direction. In an embodiment of the present disclosure, the light emitting element LD may be provided in the form of a hexagonal pyramid. If the direction in which the light emitting element LD extends is defined as a longitudinal direction, the light emitting element LD may have a first end (or a lower end) and a second end (or an upper end) in the longitudinal direction. In an embodiment, one of the first semiconductor layer 11 and the second semiconductor layer 13 may be provided in the first end (or the lower end) of the light emitting element LD. The other of the first semiconductor layer 11 and the second semiconductor layer 13 may be provided in the second end (or the upper end) of the light emitting element LD.

[0076] In an embodiment, the light emitting element LD may have a small size corresponding to the nanometer level or the micrometer level, for example, a diameter and / or a length L having a nanometer range or a micrometer range. However, in the present disclosure, the size of the light emitting element LD is not limited thereto, and the size of the light emitting element LD may be changed to meet the requirements (or application conditions) of the lighting device or the self-emitting display device to which the light emitting element LD is applied.

[0077] In an embodiment of the present disclosure, the first semiconductor layer 11 may be disposed in the core (e.g., the central (or middle) portion) of the light emitting element LD. The light emitting element LD may have a shape corresponding to the shape of the first semiconductor layer 11. For example, if the first semiconductor layer 11 has a hexagonal pyramid shape, the light emitting element LD and the emission pattern 10 may each also have a hexagonal pyramid shape.

[0078] The active layer 12 may be disposed and / or formed in a shape surrounding the outer peripheral surface of the first semiconductor layer 11 in the longitudinal direction of the light emitting element LD. Specifically, the active layer 12 may be disposed and / or formed in a shape surrounding a region of the first semiconductor layer 11 except for a lower end portion of the opposite ends of the first semiconductor layer 11 in the longitudinal direction of the light emitting element LD.

[0079] The second semiconductor layer 13 may be disposed and / or formed in a shape surrounding the active layer 12 in the longitudinal direction of the light emitting element LD, and may include a semiconductor layer having a type different from that of the first semiconductor layer 11. For example, the second semiconductor layer 13 may include at least one p-type semiconductor layer.

[0080] In an embodiment of the present disclosure, the light emitting element LD may include an electrode layer 15 surrounding at least one side of the second semiconductor layer 13. The electrode layer 15 may be an ohmic contact electrode electrically connected to the second semiconductor layer 13, but the present disclosure is not limited thereto.

[0081] As described above, the light emitting element LD may have a hexagonal pyramid shape having opposite ends protruding outward, and may be implemented as an emission pattern 10 having a core-shell structure including a first semiconductor layer 11 disposed in a central portion of the core-shell structure, an active layer 12 surrounding the first semiconductor layer 11, a second semiconductor layer 13 surrounding the active layer 12, and an electrode layer 15 surrounding the second semiconductor layer 13. The first semiconductor layer 11 may be disposed in a first end portion (or a lower end portion) of the light emitting element LD having a hexagonal pyramid shape, and the electrode layer 15 may be disposed in a second end portion (or an upper end portion) of the light emitting element LD.

[0082] In an implementation, the light emitting element LD may further include an insulating layer 14 disposed on an outer peripheral surface of the emission pattern 10 having the core-shell structure. The insulating layer 14 may include a transparent insulating material.

[0083] Figure 2 A display device according to an embodiment of the present disclosure is shown, and in particular, a display device using Figures 1a to 1f A schematic plan view of a display device using any one of the light-emitting elements shown in FIG. 1 as a light source.

[0084] For the sake of explanation, Figure 2 The structure of the display device is schematically shown, focusing on the display area in which the image is displayed. In some embodiments, although not shown, at least one driving circuit (eg, a scan driver and a data driver) and / or a plurality of lines may also be provided in the display device.

[0085] refer to Figures 1a to 1f and Figure 2 According to an embodiment of the present disclosure, a display device may include a substrate SUB, a plurality of pixels PXL disposed in the substrate SUB and each including at least one light emitting element LD, a driver (not shown) disposed in the substrate SUB and configured to drive the pixels PXL, and a line assembly (not shown) disposed to connect the pixels PXL to the driver.

[0086] According to the method of driving the light emitting element LD, the display device can be classified into a passive matrix type display device and an active matrix type display device. For example, in the case where the display device according to the embodiment is implemented as an active matrix type, each of the pixels PXL may include a driving transistor and a switching transistor, wherein the driving transistor is configured to control the amount of current to be supplied to the light emitting element LD, and the switching transistor is configured to transmit a data signal to the driving transistor.

[0087] Recently, in consideration of resolution, contrast, and operating speed, an active matrix display device capable of selectively turning on each pixel PXL has become mainstream. However, the present disclosure is not limited thereto. For example, a passive matrix display device in which the pixels PXL can be turned on in groups may also employ components (e.g., a first electrode and a second electrode) for driving the light emitting element LD.

[0088] The substrate SUB may include a display area DA and a non-display area NDA.

[0089] In an embodiment, the display area DA may be disposed in the central area of ​​the display device, and the non-display area NDA may be disposed in the peripheral area of ​​the display device in a manner of surrounding the display area DA. The positions of the display area DA and the non-display area NDA are not limited thereto, and their positions may be changed.

[0090] The display area DA may be an area in which pixels PXL for displaying an image are disposed. The non-display area NDA may be an area in which a driver for driving the pixels PXL and some of line components for coupling the pixels PXL to the driver are disposed.

[0091] The display area DA may have various shapes. For example, the display area DA may be provided in various forms, such as a closed polygon including sides formed by linear lines, a circle, an ellipse, etc. including sides formed by curved lines, and a semicircle, a semiellipse, etc. including sides formed by linear lines and curved lines.

[0092] The non-display area NDA may be disposed in at least one side of the display area DA. In an embodiment of the present disclosure, the non-display area NDA may surround the periphery of the display area DA.

[0093] The substrate SUB may include a transparent insulating material to allow light transmission. The substrate SUB may be a rigid substrate. For example, the rigid substrate SUB may be one of a glass substrate, a quartz substrate, a glass ceramic substrate, and a crystallized glass substrate.

[0094] The substrate SUB may be a flexible substrate. Here, the flexible substrate SUB may be a film substrate or a plastic substrate including a polymer organic material. For example, the flexible substrate SUB may include at least one of polystyrene, polyvinyl alcohol, polymethyl methacrylate, polyether sulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, cellulose triacetate, and cellulose acetate propionate.

[0095] However, the material constituting the substrate SUB may vary, and includes, for example, fiber reinforced plastic (FRP).

[0096] An area of ​​the substrate SUB is set as a display area DA in which the pixels PXL are disposed, and another area of ​​the substrate SUB is set as a non-display area NDA. For example, the substrate SUB may include a display area DA including a plurality of pixel areas in which corresponding pixels PXL are formed, and a non-display area NDA disposed around the display area DA.

[0097] The pixels PXL may be disposed in the display area DA on the substrate SUB. In an embodiment of the present disclosure, the pixels PXL may be arranged in the display area DA in a stripe or pentile arrangement structure, but the present disclosure is not limited thereto. For example, the pixels PXL may be arranged in the display area DA in various known arrangements.

[0098] Each pixel PXL may include a light emitting element LD configured to be driven in response to a corresponding scan signal and a corresponding data signal. The light emitting element LD may have a small size corresponding to a micrometer or nanometer level and be electrically connected in parallel with a light emitting element LD disposed adjacent thereto, but the present disclosure is not limited thereto. The light emitting element LD may form a light source of each pixel PXL.

[0099] Each of the pixels PXL may include at least one light source driven by a predetermined control signal (eg, a scan signal and a data signal) and / or a predetermined power source (eg, a first driving power source and a second driving power source). Figures 1a to 1f The light emitting element LD shown in each of the embodiments includes, for example, at least one ultra-small rod-type light emitting element LD of a small size corresponding to the nanometer level or micrometer level. However, in the embodiments of the present disclosure, the type of light emitting element LD that can be used as the light source of the pixel PXL is not limited thereto.

[0100] In an embodiment of the present disclosure, the color, type, and / or number of the pixels PXL are not particularly limited. For example, the color of light emitted from each pixel PXL may be changed in various ways.

[0101] The driver may provide a signal to each pixel PXL through the line assembly and thus control the operation of the pixel PXL. Figure 2 In the figure, the wire components are omitted for ease of explanation.

[0102] The driver may include a scan driver, an emission driver, a data driver, and a timing controller, wherein the scan driver is configured to provide a scan signal to the pixel PXL through a scan line, the emission driver is configured to provide an emission control signal to the pixel PXL through an emission control line, and the data driver is configured to provide a data signal to the pixel PXL through a data line. The timing controller may control the scan driver, the emission driver, and the data driver.

[0103] Figure 3a to Figure 3c It is schematically shown that the Figure 2 Circuit diagrams of various embodiments of the electrical connection relationships of components in any one of the pixels shown in FIG.

[0104] For example, Figure 3a to Figure 3c Various embodiments of electrical connection relationships of components included in a pixel PXL that can be used in an active matrix type display device are shown. However, the types of components included in a pixel PXL to which embodiments of the present disclosure can be applied are not limited thereto.

[0105] exist Figure 3a to Figure 3c In, not only Figure 2 The components in each of the pixels PXL shown in FIG. 1 and the region in which the components are disposed are included in the definition of the term “pixel PXL”. In an embodiment, Figure 3a to Figure 3c Each pixel PXL shown in FIG. 1 may be set to Figure 2 The pixels PXL may have substantially the same or similar structures.

[0106] refer to Figures 1a to 1f , Figure 2 and Figure 3a to Figure 3c Each pixel PXL (hereinafter referred to as "pixel") may include an emission unit EMU configured to generate light having brightness corresponding to a data signal. The pixel PXL may further selectively include a pixel circuit 144 configured to drive the emission unit EMU.

[0107] In an embodiment, the emission unit EMU may include a plurality of light emitting elements LD electrically connected in parallel between a first power line PL1 to which a first driving power VDD is applied and a second power line PL2 to which a second driving power VSS is applied. For example, the emission unit EMU may include a first electrode EL1 (or "first alignment electrode") electrically connected to the first driving power VDD via the first power line PL1, a second electrode EL2 (or "second alignment electrode") electrically connected to the second driving power VSS via the second power line PL2, and a plurality of light emitting elements LD electrically connected in parallel to each other in the same direction between the first electrode EL1 and the second electrode EL2. In an embodiment of the present disclosure, the first electrode EL1 may be an anode electrode, and the second electrode EL2 may be a cathode electrode.

[0108] In an embodiment of the present disclosure, each of the light-emitting elements LD included in the emission unit EMU may include a first end electrically connected to a first driving power source VDD through a first electrode EL1 and a second end electrically connected to a second driving power source VSS through a second electrode EL2. The first driving power source VDD and the second driving power source VSS may have different potentials. For example, the first driving power source VDD may be set as a high potential power source, and the second driving power source VSS may be set as a low potential power source. Here, the potential difference between the first driving power source VDD and the second driving power source VSS may be set to a value equal to or greater than the threshold voltage of the light-emitting element LD during the emission period of the pixel PXL.

[0109] As described above, the light emitting elements LD electrically connected in parallel with each other in the same direction (eg, in the forward direction) between the first electrode EL1 and the second electrode EL2 to which voltages having different potentials are respectively supplied may form corresponding effective light sources. The effective light sources may collectively form the emission unit EMU of the pixel PXL.

[0110] The light emitting element LD of the emission unit EMU may emit light having a brightness corresponding to the driving current supplied thereto by the pixel circuit 144. For example, during each frame period, the pixel circuit 144 may supply a driving current corresponding to the grayscale level of the corresponding frame data to the emission unit EMU. The driving current supplied to the emission unit EMU may be divided into the light emitting elements LD electrically connected to each other in the same direction. Therefore, each of the light emitting elements LD may emit light having a brightness corresponding to the current applied thereto, so that the emission unit EMU may emit light having a brightness corresponding to the driving current.

[0111] Although Figure 3a to Figure 3cAn embodiment in which the light-emitting elements LD are electrically connected to each other in the same direction between the first driving power source VDD and the second driving power source VSS is shown, but the present disclosure is not limited thereto. In an embodiment, the emission unit EMU may also include at least one invalid light source, and a light-emitting element LD forming a corresponding effective light source. For example, at least one reverse light-emitting element (not shown) may also be electrically connected between the first electrode EL1 and the second electrode EL2 of the emission unit EMU. The reverse light-emitting element, together with the light-emitting element LD forming the effective light source, may be electrically connected in parallel to each other between the first electrode EL1 and the second electrode EL2. Here, the reverse light-emitting element may be electrically connected between the first electrode EL1 and the second electrode EL2 in a direction opposite to the direction of the light-emitting element LD. Even when a predetermined driving voltage (e.g., a forward direction driving voltage) is applied between the first electrode EL1 and the second electrode EL2, the reverse light-emitting element remains disabled. Therefore, current does not substantially flow through the reverse light-emitting element.

[0112] The pixel circuit 144 may be electrically connected to the scan line Si and the data line Dj of the corresponding pixel PXL. For example, if the pixel PXL is disposed in the i-th row (where i is a natural number) and the j-th column (where j is a natural number) of the display area DA, the pixel circuit 144 of the pixel PXL may be electrically connected to the i-th scan line Si and the j-th data line Dj of the display area DA. In an embodiment, as shown in FIG. Figure 3a As shown in FIG. 1 , the pixel circuit 144 may include a first transistor T1, a second transistor T2 and a storage capacitor Cst. The structure of the pixel circuit 144 is not limited to Figure 3a The structure of the embodiment shown in .

[0113] A first terminal of the first transistor T1 (switching transistor) may be electrically connected to the data line Dj, and a second terminal thereof may be electrically connected to the first node N1. Here, the first terminal and the second terminal of the first transistor T1 are different from each other, and for example, if the first terminal is a source electrode, the second terminal is a drain electrode. A gate electrode of the first transistor T1 may be electrically connected to the scan line Si.

[0114] In the case where a scan signal having a voltage (e.g., a low level voltage) capable of turning on the first transistor T1 is supplied from the scan line Si, the first transistor T1 is turned on to electrically connect the data line Dj with the first node N1. Here, a data signal of a corresponding frame is supplied to the data line Dj, whereby the data signal is transmitted to the first node N1. The data signal transmitted to the first node N1 may be stored in the storage capacitor Cst.

[0115] A first terminal of the second transistor T2 (driving transistor) may be electrically connected to the first driving power source VDD, and a second terminal thereof may be electrically connected to the first electrode EL1 for each of the light emitting elements LD. A gate electrode of the second transistor T2 may be electrically connected to the first node N1. Thus, the second transistor T2 may control the amount of driving current to be supplied to the light emitting element LD in response to the voltage of the first node N1.

[0116] A first electrode of the storage capacitor Cst may be electrically connected to the first driving power source VDD, and a second electrode thereof may be electrically connected to the first node N1. The storage capacitor Cst is charged with a voltage corresponding to a data signal supplied to the first node N1 and maintains the charged voltage until a data signal of a subsequent frame is supplied.

[0117] Figure 3a A pixel circuit 144 is shown including a first transistor T1 configured to transmit a data signal to the pixel PXL, a storage capacitor Cst configured to store the data signal, and a second transistor T2 configured to supply a driving current corresponding to the data signal to the light emitting element LD.

[0118] However, the present disclosure is not limited thereto, and the structure of the pixel circuit 144 may be changed in various ways. For example, the pixel circuit 144 may further include at least one transistor element such as a transistor element configured to compensate for the threshold voltage of the second transistor T2, a transistor element configured to initialize the first node N1, and / or a transistor element configured to control the emission time of the light emitting element LD, or other circuit elements such as a boost capacitor for boosting the voltage of the first node N1.

[0119] In addition, although Figure 3a , the transistors (eg, the first transistor T1 and the second transistor T2) included in the pixel circuit 144 are shown to be formed of P-type transistors, but the present disclosure is not limited thereto. In other words, at least one of the first transistor T1 and the second transistor T2 included in the pixel circuit 144 may be changed to an N-type transistor.

[0120] Next, refer to Figures 1a to 1f , Figure 2 and Figure 3b , the first transistor T1 and the second transistor T2 according to the embodiment of the present disclosure may be formed by N-type transistors. In addition to the change in the connection position of some components due to the change in the transistor type, Figure 3b The configuration and operation of the pixel circuit 144 shown in FIG. Figure 3a The configuration and operation of the pixel circuit 144 are similar. Therefore, detailed description thereof will be omitted.

[0121] In the embodiment of the present disclosure, the configuration of the pixel circuit 144 is not limited to Figure 3a and Figure 3b For example, the pixel circuit 144 can be connected with Figure 3c The embodiment shown in FIG. 1 is configured in the same manner.

[0122] like Figure 3c As shown in , the pixel circuit 144 may be electrically connected to the scan line Si and the data line Dj of the pixel PXL. For example, if the pixel PXL is disposed in the i-th row and the j-th column of the display area DA, the pixel circuit 144 of the pixel PXL may be electrically connected to the i-th scan line Si and the j-th data line Dj of the display area DA.

[0123] In an embodiment, the pixel circuit 144 may also be electrically connected to at least one scan line. For example, the pixel PXL disposed in the i-th row of the display area DA may also be electrically connected to the i-1th scan line Si-1 and / or the i+1th scan line Si+1. In an embodiment, the pixel circuit 144 may be electrically connected not only to the first driving power supply VDD and the second driving power supply VSS, but also to a third power supply. For example, the pixel circuit 144 may also be connected to the initialization power supply Vint.

[0124] The pixel circuit 144 may include first to seventh transistors T1 to T7 and a storage capacitor Cst.

[0125] A first electrode (e.g., source electrode) of the first transistor T1 (driving transistor) may be electrically connected to the first driving power source VDD via the fifth transistor T5, and a second electrode (e.g., drain electrode) thereof may be electrically connected to one end of the light emitting element LD via the sixth transistor T6. A gate electrode of the first transistor T1 may be electrically connected to the first node N1. The first transistor T1 may control a driving current flowing between the first driving power source VDD and the second driving power source VSS via the light emitting element LD in response to a voltage of the first node N1.

[0126] The second transistor T2 (switching transistor) may be electrically connected between the j-th data line Dj electrically connected to the pixel PXL and the source electrode of the first transistor T1. The gate electrode of the second transistor T2 may be electrically connected to the i-th scan line Si electrically connected to the pixel PXL. In the case where a scan signal having a gate-on voltage (e.g., a low-level voltage) is supplied from the i-th scan line Si, the second transistor T2 may be turned on to electrically connect the j-th data line Dj to the source electrode of the first transistor T1. Therefore, if the second transistor T2 is turned on, the data signal supplied from the j-th data line Dj may be transmitted to the first transistor T1.

[0127] The third transistor T3 may be electrically connected between the drain electrode of the first transistor T1 and the first node N1. The gate electrode of the third transistor T3 may be electrically connected to the i-th scan line Si. In the case where a scan signal having a gate-on voltage is supplied from the i-th scan line Si, the third transistor T3 may be turned on to electrically connect the drain electrode of the first transistor T1 to the first node N1.

[0128] The fourth transistor T4 may be electrically connected between the first node N1 and an initialization power line to which the initialization power Vint is to be applied. The gate electrode of the fourth transistor T4 may be electrically connected to a previous scan line, for example, the i-1th scan line Si-1. In the case where a scan signal having a gate-on voltage is supplied to the i-1th scan line Si-1, the fourth transistor T4 may be turned on so that the voltage of the initialization power Vint may be transmitted to the first node N1. Here, the initialization power Vint may have a voltage equal to or less than the minimum voltage of the data signal.

[0129] The fifth transistor T5 may be electrically connected between the first driving power source VDD and the source electrode of the first transistor T1. The gate electrode of the fifth transistor T5 may be electrically connected to a corresponding emission control line, for example, the i-th emission control line Ei. In the case where an emission control signal having a gate-off voltage is supplied to the i-th emission control line Ei, the fifth transistor T5 may be turned off, and in other cases the fifth transistor T5 may be turned on.

[0130] The sixth transistor T6 may be electrically connected between the drain electrode of the first transistor T1 and the first end of the light emitting element LD. The gate electrode of the sixth transistor T6 may be electrically connected to the i-th emission control line Ei. In the case where an emission control signal having a gate-off voltage is supplied to the i-th emission control line Ei, the sixth transistor T6 may be turned off, and in other cases the sixth transistor T6 may be turned on.

[0131] The seventh transistor T7 may be electrically connected between the first end of the light emitting element LD and the initialization power supply line to which the initialization power supply Vint is to be applied. The gate electrode of the seventh transistor T7 may be electrically connected to any one of the scan lines of the subsequent stage, for example, the i+1th scan line Si+1. When a scan signal having a gate-on voltage is supplied to the i+1th scan line Si+1, the seventh transistor T7 may be turned on so that the voltage of the initialization power supply Vint may be supplied to the first end of the light emitting element LD.

[0132] The storage capacitor Cst may be electrically connected between the first driving power source VDD and the first node N1. The storage capacitor Cst may store a voltage corresponding to both the data signal applied to the first node N1 during each frame period and the threshold voltage of the first transistor T1.

[0133] Although in Figure 3c The transistors (eg, the first to seventh transistors T1 to T7) included in the pixel circuit 144 are shown to be formed of P-type transistors, but the present disclosure is not limited thereto. For example, at least one of the first to seventh transistors T1 to T7 may be changed to an N-type transistor.

[0134] Although Figure 3a to Figure 3c An embodiment is shown in which all light emitting elements LD of each emission unit EMU are electrically connected in parallel to each other, but the present disclosure is not limited thereto. In an embodiment, the emission unit EMU may include at least one series connection stage including a plurality of light emitting elements LD electrically connected in parallel to each other. In other words, the emission unit EMU may be formed by a series / parallel combination structure.

[0135] The structure of the pixel PXL applicable to the present disclosure is not limited to Figure 3a to Figure 3c , and the corresponding pixel PXL may have various structures. In an embodiment of the present disclosure, each pixel PXL may be configured in a passive light-emitting display device or the like. In this case, the pixel circuit 144 may be omitted, and the opposite ends of the light-emitting element LD included in the emission unit EMU may be directly electrically connected to the scan lines Si-1, Si and Si+1, the data line Dj, the first power line PL1 to which the first driving power VDD is to be applied, the second power line PL2 to which the second driving power VSS is to be applied, and / or a predetermined control line.

[0136] Figure 4 It is schematically shown that the Figure 2 A plan view of display element layers in one of the pixels shown in FIG. Figure 5 Only shows Figure 4 Schematic plan view of a first electrode and a second electrode and a light emitting element aligned between the first electrode and the second electrode. Figure 6 It is along Figure 4 A schematic cross-sectional view taken along line II'. Figure 7 It shows Figure 6 The first contact electrode and the second contact electrode are arranged on the same layer, and are arranged along Figure 4 A schematic cross-sectional view taken along line II'. Figure 8 shows that the coating layers are arranged respectively Figure 6 The embodiment shown in FIG. 1 is between the first electrode and the first contact electrode and between the second electrode and the second contact electrode, and is along Figure 4 A schematic cross-sectional view taken along line II'. Fig. 9 It is along Figure 4 A schematic cross-sectional view taken along line II-II'. Fig.10 It is along Figure 4A schematic cross-sectional view taken along line III-III'. Fig.11 Shows Fig.10 Another shape of the bank pattern shown in FIG. Figure 4 A schematic cross-sectional view taken along line III-III'.

[0137] For the sake of explanation, Figure 4 Illustration of a transistor electrically connected to a light emitting element and a signal line electrically connected to the transistor is omitted.

[0138] In addition, although Figures 4 to 11 A simplified structure of a pixel is shown, for example, each electrode is shown to have only a single electrode layer, and each insulating layer is shown to have only a single insulating layer, but the present disclosure is not limited thereto.

[0139] In the embodiments of the present disclosure, the phrase “components are disposed and / or formed on the same layer” may mean that the components are formed through the same process.

[0140] refer to Figures 1a to 11 , a display device according to an embodiment of the present disclosure may include a substrate SUB, a line assembly, and a plurality of pixels PXL.

[0141] Each of the pixels PXL may be disposed in a substrate SUB and include an emission area EMA that emits light and a peripheral area disposed around the emission area EMA. In an embodiment of the present disclosure, the emission area EMA may mean an area from which light is emitted, and the peripheral area may refer to an area from which light is not emitted. The pixel area of ​​each of the pixels PXL may include the emission area EMA of the corresponding pixel PXL and a peripheral area formed around the emission area EMA.

[0142] The substrate SUB, the pixel circuit layer PCL, and the display element layer DPL may be disposed and / or formed in a pixel region of each of the pixels PXL.

[0143] The substrate SUB may include a transparent insulating material and thus allow light to pass therethrough. The substrate SUB may be a rigid substrate or a flexible substrate.

[0144] During a process of manufacturing the display device, a material applied to the substrate SUB may have resistance (heat resistance) to a high processing temperature. In an embodiment of the present disclosure, the entirety or at least a portion of the substrate SUB may have flexibility.

[0145] The pixel circuit layer PCL may include at least one transistor disposed and / or formed on the buffer layer BFL, a driving voltage line DVL, and a passivation layer PSV configured to cover the transistor and the driving voltage line DVL.

[0146] The buffer layer BFL may prevent impurities from diffusing into the transistor. The buffer layer BFL may be provided in a single-layer structure or a multi-layer structure having two or more layers. In the case where the buffer layer BFL has a multi-layer structure, the respective layers may be formed of the same material or different materials. Depending on the material and / or process conditions of the substrate SUB, the buffer layer BFL may be omitted.

[0147] The transistor may include a first transistor T1 and a second transistor T2. In an embodiment of the present disclosure, the first transistor T1 may be a driving transistor electrically connected to the light emitting element LD of the corresponding pixel PXL and configured to drive the light emitting element LD. The second transistor T2 may be a switching transistor configured to switch the first transistor T1.

[0148] Each of the first transistor T1 and the second transistor T2 may include a semiconductor layer SCL, a gate electrode GE, and a first terminal SE and a second terminal DE. The first terminal SE may be a source electrode or a drain electrode, and the second terminal DE may be the other of the source electrode and the drain electrode. For example, in the case where the first terminal SE is a source electrode, the second terminal DE may be a drain electrode.

[0149] The semiconductor layer SCL may be disposed on the buffer layer BFL. The semiconductor layer SCL may include a first region contacting the first terminal SE and a second region contacting the second terminal DE. A region between the first region and the second region may be a channel region.

[0150] The semiconductor layer SCL may be a semiconductor pattern formed of polysilicon, amorphous silicon, an oxide semiconductor, etc. The channel region may be an intrinsic semiconductor, which is an undoped semiconductor pattern. Each of the first and second regions may be a semiconductor pattern doped with impurities.

[0151] The gate electrode GE may be disposed on the semiconductor layer SCL with the gate insulating layer GI interposed therebetween.

[0152] The first terminal SE and the second terminal DE may contact the first and second regions of the semiconductor layer SCL respectively through corresponding contact holes (or through holes) passing through the interlayer insulating layer ILD and the gate insulating layer GI. Each of the first terminal SE and the second terminal DE may include a conductive material and be formed of a single layer or multiple layers.

[0153] In an embodiment of the present disclosure, at least one transistor in the pixel circuit layer PCL of each of the pixels PXL may be formed by an LTPS thin film transistor, but the present disclosure is not limited thereto. In some embodiments, the at least one transistor may be formed by an oxide semiconductor thin film transistor. In addition, in an embodiment of the present disclosure, a case where the transistor is a thin film transistor having a top gate structure has been shown, but the present disclosure is not limited thereto. In an embodiment, the transistor may be a thin film transistor having a bottom gate structure.

[0154] The driving voltage line DVL may be disposed on the interlayer insulating layer ILD, but the present disclosure is not limited thereto. In some embodiments, the driving voltage line DVL may be disposed on any one of the insulating layers included in the pixel circuit layer PCL. The voltage of the second driving power source VSS may be applied to the driving voltage line DVL. In an embodiment of the present disclosure, the driving voltage line DVL may be a second power line PL2 to which the voltage of the second driving power source VSS is applied, such as Figure 3a to Figure 3c Each of the shown.

[0155] The passivation layer PSV may include a first contact hole CH1 exposing a portion of the second terminal DE of the first transistor T1 , and a second contact hole CH2 exposing a portion of the driving voltage line DVL.

[0156] The passivation layer PSV may be provided in the form of an organic insulating layer, an inorganic insulating layer, or a structure including an organic insulating layer provided on an inorganic insulating layer. The inorganic insulating layer may include silicon oxide (SiO x ) and silicon nitride (SiN x ). The organic insulating layer may include an organic insulating material that allows light to pass through. The organic insulating layer may include, for example, at least one of polyacrylate resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylene ether resin, polyphenylene sulfide resin, and benzocyclobutene resin.

[0157] The display element layer DPL of each of the pixels PXL may include a bank pattern PW, first and second electrodes EL1 and EL2, a plurality of light emitting elements LD, and first and second connection lines CNL1 and CNL2. In addition, the display element layer DPL of each of the pixels PXL may further selectively include at least one first contact electrode CNE1 directly electrically connected to the first electrode EL1 and at least one second contact electrode CNE2 directly electrically connected to the second electrode EL2.

[0158] The bank pattern PW may be disposed and / or formed on the passivation layer PSV of the emission area EMA of each of the pixels PXL. The bank pattern PW may include an inorganic insulating layer formed of an inorganic material or an organic insulating layer formed of an organic material. In an embodiment, the bank pattern PW may include an organic insulating layer having a single-layer structure and / or an inorganic insulating layer having a single-layer structure, but the present disclosure is not limited thereto. For example, the bank pattern PW may have a multilayer structure formed by stacking one or more organic insulating layers and one or more inorganic insulating layers.

[0159] The bank pattern PW may have a trapezoidal cross-section whose width decreases upward from the surface of the passivation layer PSV, but the present disclosure is not limited thereto. Fig.11 As shown in , the bank pattern PW may include a curved surface having a cross-section having a semi-elliptical shape, a semi-circular shape, etc., the width of which decreases upward from the surface of the passivation layer PSV. In the cross-sectional view, the shape of the bank pattern PW is not limited to the aforementioned example, and may be changed in various ways within the range in which the efficiency of light emitted from each of the light emitting elements LD can be enhanced.

[0160] Adjacent bank patterns PW may be disposed on the same plane on the passivation layer PSV and have the same height. In an embodiment of the present disclosure, adjacent bank patterns PW may have different widths. A detailed description thereof will be made with reference to the description of the first electrode EL1 and the second electrode EL2.

[0161] The display element layer DPL of each of the pixels PXL may further include a bank (not shown) disposed to surround the emission area EMA of each pixel PXL in the peripheral area of ​​the corresponding pixel PXL (e.g., a non-emission area in which the light emitting element LD is not aligned). The bank may be a structure configured to define (or divide) each emission area EMA, and may be, for example, a pixel defining layer. The bank may include at least one light shielding material and / or a reflective material, and thus prevent a light leakage defect in which light (or light rays) leaks between adjacent pixels PXL from occurring.

[0162] In an embodiment, a reflective material layer may be formed on the levee so as to further enhance the efficiency of light emitted from each of the pixels PXL. Although the levee may be formed and / or disposed on the same layer as the layer of the levee pattern PW, the present disclosure is not limited thereto. In an embodiment, the levee may be formed and / or disposed on a layer different from the layer of the levee pattern PW. In the case where the levee is formed and / or disposed on the same layer (or plane) as the layer of the levee pattern PW, the levee and the levee pattern PW may include the same material, but the present disclosure is not limited thereto. In an embodiment, the levee and the levee pattern PW may include different materials.

[0163] The first connection line CNL1 may extend in a first direction DR1 (e.g., a “row direction”) in each of the pixels PXL. The first connection line CNL1 may be disposed and / or formed to drive one pixel PXL only in the corresponding pixel PXL independently of adjacent pixels PXL, and may be electrically and / or physically separated from the first connection line CNL1 disposed and / or formed in each of the adjacent pixels PXL.

[0164] The second connection line CNL2 may extend in a direction parallel to the direction in which the first connection line CNL1 extends. The second connection line CNL2 may be provided in common to adjacent pixels PXL. Therefore, a plurality of pixels PXL arranged in the same pixel row in the first direction DR1 may be electrically connected in common to the second connection line CNL2. The second connection line CNL2 may be electrically connected to the driving voltage line DVL of the pixel circuit layer PCL of each of the pixels PXL through the second contact hole CH2 passing through the passivation layer PSV. Therefore, the voltage of the second driving power source VSS applied to the driving voltage line DVL may be transmitted to the second connection line CNL2 of the corresponding pixel PXL.

[0165] Each of the first and second electrodes EL1 and EL2 may be disposed in the emission area EMA of each of the pixels PXL and extend in a second direction DR2 (eg, a “column direction”). The first and second electrodes EL1 and EL2 may be disposed on the same plane and spaced a predetermined distance apart from each other.

[0166] The first electrode EL1 and the first connection line CNL1 may be integrally provided and electrically and / or physically connected to each other. In the case where the first electrode EL1 and the first connection line CNL1 are integrally formed and / or provided, the first connection line CNL1 may be a predetermined region of the first electrode EL1, or the first electrode EL1 may be a predetermined region of the first connection line CNL1. The first electrode EL1 may diverge from the first connection line CNL1 in the second direction DR2.

[0167] In an embodiment of the present disclosure, the first connection line CNL1 may be electrically connected to the first transistor T1 of the pixel circuit layer PCL of each of the pixels PXL through the first contact hole CH1 passing through the passivation layer PSV. Therefore, the signal (or voltage) applied to the first transistor T1 may be transmitted to the first connection line CNL1 of the corresponding pixel PXL. As described above, since the first connection line CNL1 is integrally provided and / or formed with the first electrode EL1, the signal (or voltage) applied to the first connection line CNL1 may be transmitted to the first electrode EL1.

[0168] In an embodiment of the present disclosure, the first electrode EL1 may include a plurality of first main electrodes MAE1 and a plurality of first auxiliary electrodes AUE1.

[0169] Each of the first main electrodes MAE1 may be spaced apart from adjacent first main electrodes MAE1 in the second direction DR2. Although each of the first main electrodes MAE1 may have a hexagonal shape in a plan view, the shape of the first main electrode MAE1 is not limited thereto.

[0170] Each of the first auxiliary electrodes AUE1 may be disposed between two first main electrodes MAE1 adjacently disposed in the second direction DR2 and function as a bridge for connecting the two first main electrodes MAE1 to each other. Although each of the first auxiliary electrodes AUE1 may have a rectangular shape in a plan view, the shape of the first auxiliary electrode AUE1 is not limited thereto.

[0171] In an embodiment of the present disclosure, the first main electrode MAE1 and the first auxiliary electrode AUE1 may be integrally disposed with each other and electrically and / or physically connected to each other. In the case where the first main electrode MAE1 and the first auxiliary electrode AUE1 are integrally formed and / or disposed with each other, the first auxiliary electrode AUE1 may be a corresponding predetermined region of the first main electrode MAE1.

[0172] Although in the foregoing embodiments, the first main electrode MAE1 and the first auxiliary electrode AUE1 are integrally formed and / or disposed with each other, the present disclosure is not limited thereto. In embodiments, the first main electrode MAE1 and the first auxiliary electrode AUE1 may be formed separately from each other and electrically connected to each other through a contact hole or a connector not shown.

[0173] The first main electrode MAE1 and the first auxiliary electrode AUE1 may overlap with one of the opposite ends EP1 and EP2 of each of the light emitting elements LD and directly contact the one end, and thus may be electrically and / or physically connected to each of the light emitting elements LD. However, the present disclosure is not limited thereto. For example, the first main electrode MAE1 and the first auxiliary electrode AUE1 may be electrically and / or physically connected to any one of the opposite ends EP1 and EP2 of each of the light emitting elements LD through the first contact electrode CNE1.

[0174] In an embodiment of the present disclosure, the width W1 of each of the first main electrodes MAE1 may be greater than the width W2 of each of the first auxiliary electrodes AUE1. Here, the width W1 of each of the first main electrodes MAE1 and the width W2 of each of the first auxiliary electrodes AUE1 may refer to widths extending in the first direction DR1 (horizontal direction).

[0175] The width W1 of each of the first main electrodes MAE1 may be about 10 μm. The width W2 of each of the first auxiliary electrodes AUE1 may be about 3 μm. Here, the present disclosure is not limited to the aforementioned embodiments. In embodiments, the width W2 of each of the first auxiliary electrodes AUE1 may be greater than the width W1 of each of the first main electrodes MAE1.

[0176] The bank pattern PW may be disposed and / or formed under each of the first main electrode MAE1 and the first auxiliary electrode AUE1. Each of the first main electrode MAE1 and the first auxiliary electrode AUE1 may overlap with the bank pattern PW disposed thereunder. In an embodiment of the present disclosure, the width of the bank pattern PW disposed under each of the first main electrodes MAE1 may be different from the width of the bank pattern PW disposed under each of the first auxiliary electrodes AUE1. Specifically, the width of the bank pattern PW disposed under each of the first main electrodes MAE1 may be greater than the width of the bank pattern PW disposed under each of the first auxiliary electrodes AUE1.

[0177] Hereinafter, for the sake of explanation, the bank pattern PW disposed under each of the first main electrodes MAE1 may be referred to as a 1-1th bank pattern PW, and the bank pattern PW disposed under each of the first auxiliary electrodes AUE1 may be referred to as a 1-2th bank pattern PW.

[0178] Each of the first main electrodes MAE1 may have a surface profile corresponding to the shape of the 1-1th bank pattern PW disposed thereunder. Each of the first auxiliary electrodes AUE1 may have a surface profile corresponding to the shape of the 1-2th bank pattern PW disposed thereunder.

[0179] In addition, each of the first main electrodes MAE1 may have a surface area wide (or large) enough to completely cover the 1-1 bank pattern PW. Each of the first auxiliary electrodes AUE1 may have a surface area wide (or large) enough to completely cover the 1-2 bank pattern PW. For example, in the first direction DR1, the width W1 of each of the first main electrodes MAE1 may be greater than the width of the 1-1 bank pattern PW. In the first direction DR1, the width W2 of each of the first auxiliary electrodes AUE1 may be greater than the width of the 1-2 bank pattern PW. Here, the present disclosure is not limited to the aforementioned embodiments. In an embodiment, in the first direction DR1, the width W1 of each of the first main electrodes MAE1 may be equal to or less than the width of the 1-1 bank pattern PW. In the first direction DR1, the width W2 of each of the first auxiliary electrodes AUE1 may be equal to or less than the width of the 1-2 bank pattern PW.

[0180] As described above, the first main electrode MAE1 and the first auxiliary electrode AUE1, which are integrally formed and / or disposed and electrically and / or physically connected, may form the first electrode EL1 of each of the pixels PXL. Due to the plurality of first main electrodes MAE1 and the plurality of first auxiliary electrodes AUE1, the width of the first electrode EL1 in the first direction DR1 may not be constant in the direction in which the first electrode EL1 extends. In other words, the first electrode EL1 may have at least two widths W1 and W2 in the direction in which it extends (e.g., in the second direction DR2).

[0181] In an embodiment of the present disclosure, the second electrode EL2 may include a plurality of second main electrodes MAE2 and a plurality of second auxiliary electrodes AUE2.

[0182] Each of the second main electrodes MAE2 may be spaced apart from adjacent second main electrodes MAE2 in the second direction DR2. Each of the second main electrodes MAE2 may have the same shape as the first main electrode MAE1, but the present disclosure is not limited thereto, and each of the second main electrodes MAE2 may have a shape different from that of the first main electrode MAE1.

[0183] Each of the second auxiliary electrodes AUE2 may be disposed between two second main electrodes MAE2 adjacently disposed in the second direction DR2, and serve as a bridge for connecting the two second main electrodes MAE2 to each other. Each of the second auxiliary electrodes AUE2 may have the same shape as that of the first auxiliary electrode AUE1, but the present disclosure is not limited thereto, and each of the second auxiliary electrodes AUE2 may have a shape different from that of the first auxiliary electrode AUE1.

[0184] In an embodiment of the present disclosure, the second main electrode MAE2 and the second auxiliary electrode AUE2 may be integrally disposed with each other and electrically and / or physically connected to each other. In the case where the second main electrode MAE2 and the second auxiliary electrode AUE2 are integrally formed and / or disposed with each other, the second auxiliary electrode AUE2 may be a corresponding predetermined region of the second main electrode MAE2.

[0185] Although in the foregoing embodiments, the second main electrode MAE2 and the second auxiliary electrode AUE2 are integrally formed and / or disposed with each other, the present disclosure is not limited thereto. In embodiments, the second main electrode MAE2 and the second auxiliary electrode AUE2 may be formed separately from each other and electrically connected to each other through contact holes or connectors not shown.

[0186] The width W3 of each of the second main electrodes MAE2 may be the same as the width W1 of each of the first main electrodes MAE1. The width W4 of each of the second auxiliary electrodes AUE2 may be the same as the width W2 of each of the first auxiliary electrodes AUE1. Here, the present disclosure is not limited to the aforementioned embodiment, and in an embodiment, each of the second main electrodes MAE2 may have a width W3 different from the width W1 of each of the first main electrodes MAE1, and the width W4 of each of the second auxiliary electrodes AUE2 may be different from the width W2 of each of the first auxiliary electrodes AUE1.

[0187] The bank pattern PW may be disposed and / or formed under each of the second main electrode MAE2 and the second auxiliary electrode AUE2. Each of the second main electrode MAE2 and the second auxiliary electrode AUE2 may overlap the bank pattern PW disposed thereunder.

[0188] In an embodiment of the present disclosure, the width of the bank pattern PW disposed under each of the second main electrodes MAE2 may be different from the width of the bank pattern PW disposed under each of the second auxiliary electrodes AUE2. The width of the bank pattern PW disposed under each of the second main electrodes MAE2 may be the same as the width of the 1-1 bank pattern PW. The width of the bank pattern PW disposed under each of the second auxiliary electrodes AUE2 may be the same as the width of the 1-2 bank pattern PW. Here, the present disclosure is not limited thereto. In an embodiment, the bank pattern PW disposed under each of the second main electrodes MAE2 may have a width different from the width of the 1-1 bank pattern PW, and the bank pattern PW disposed under each of the second auxiliary electrodes AUE2 may have a width different from the width of the 1-2 bank pattern PW.

[0189] Each of the second main electrodes MAE2 may have a surface profile corresponding to the shape of the bank pattern PW disposed thereunder. Each of the second auxiliary electrodes AUE2 may have a surface profile corresponding to the shape of the bank pattern PW disposed thereunder. In addition, each of the second main electrodes MAE2 may have a surface area (or size) wide enough (or large) to completely cover the bank pattern PW disposed thereunder. Each of the second auxiliary electrodes AUE2 may have a surface area (or size) wide enough (or large) to completely cover the bank pattern PW disposed thereunder.

[0190] The second main electrode MAE2 and the second auxiliary electrode AUE2 may overlap with the remaining end of the opposite ends EP1 and EP2 of each of the light emitting elements LD and directly contact the remaining end, and thus may be electrically and / or physically connected to each of the light emitting elements LD. However, the present disclosure is not limited thereto. For example, the second main electrode MAE2 and the second auxiliary electrode AUE2 may be electrically and / or physically connected to the remaining end of the opposite ends EP1 and EP2 of each of the light emitting elements LD through the second contact electrode CNE2.

[0191] As described above, the second main electrode MAE2 and the second auxiliary electrode AUE2, which are integrally formed and / or arranged and electrically and / or physically connected, may form the second electrode EL2 of each of the pixels PXL. Due to the plurality of second main electrodes MAE2 and the plurality of second auxiliary electrodes AUE2, the width of the second electrode EL2 in the first direction DR1 may not be constant in the direction in which the second electrode EL2 extends. In other words, the second electrode EL2 may have at least two widths W3 and W4 in the direction in which it extends (e.g., in the second direction DR2).

[0192] In an embodiment of the present disclosure, in a plan view, the first electrode EL1 and the second electrode EL2 may be alternately disposed on the pixel circuit layer PCL of the corresponding pixel PXL. For example, each of the first main electrodes MAE1 of the first electrode EL1 may alternate with each of the second auxiliary electrodes AUE2 of the second electrode EL2 in the first direction DR1 (or row direction). Each of the first auxiliary electrodes AUE1 of the first electrode EL1 may alternate with each of the second main electrodes MAE2 of the second electrode EL2 in the first direction DR1.

[0193] In other words, each of the first main electrodes MAE1 may be disposed in the same row as that of each of the second auxiliary electrodes AUE2 in the first direction DR1, and correspond to each of the second auxiliary electrodes AUE2. Each of the second main electrodes MAE2 may be disposed in the same row as that of each of the first auxiliary electrodes AUE1 in the first direction DR1, and correspond to each of the first auxiliary electrodes AUE1. However, the present disclosure is not limited thereto. In an embodiment, each of the first main electrodes MAE1 may be disposed in the same row as that of each of the second main electrodes MAE2 in the first direction DR1, and correspond to each of the second main electrodes MAE2. Each of the first auxiliary electrodes AUE1 may be disposed in the same row as that of each of the second auxiliary electrodes AUE2 in the first direction DR1, and correspond to each of the second auxiliary electrodes AUE2.

[0194] The first electrode EL1 including the first main electrode MAE1 and the first auxiliary electrode AUE1 and the second electrode EL2 including the second main electrode MAE2 and the second auxiliary electrode AUE2 may serve as alignment electrodes for aligning the light emitting element LD in the emission area EMA of each of the pixels PXL.

[0195] Before the light emitting element LD is aligned in the emission area EMA of each of the pixels PXL, a first alignment voltage may be applied to the first electrode EL1 through the first connection line CNL1, and a second alignment voltage may be applied to the second electrode EL2 through the second connection line CNL2. The first alignment voltage and the second alignment voltage may have different voltage levels. For example, the first alignment voltage may be a ground voltage, and the second alignment voltage may be an AC voltage.

[0196] When predetermined alignment voltages having different voltage levels are applied to the first and second electrodes EL1 and EL2, respectively, an electric field may be formed between the first and second electrodes EL1 and EL2. Thus, the light emitting element LD may be aligned between the first and second electrodes EL1 and EL2.

[0197] After the light emitting element LD is aligned in the emission area EMA of each of the pixels PXL, each of the first electrode EL1 and the second electrode EL2 may function as a driving electrode for driving the light emitting element LD.

[0198] Each of the first electrode EL1 and the second electrode EL2 may be made of a material having a predetermined reflectivity to allow light emitted from opposite ends EP1 and EP2 of each of the light emitting elements LD to travel in an image display direction of the display device (e.g., in a front direction). In an embodiment of the present disclosure, the first electrode EL1, the second electrode EL2, the first connection line CNL1, and the second connection line CNL2 may be disposed on the same layer and formed of the same material.

[0199] The first and second electrodes EL1 and EL2, the first and second connection lines CNL1 and CNL2 may be formed of a conductive material having a predetermined reflectivity. The conductive material may include a metal such as Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Ti or an alloy thereof, a transparent conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO) or indium tin zinc oxide (ITZO), and a conductive polymer such as PEDOT. In an embodiment, in the case where the first and second electrodes EL1 and EL2 and the first and second connection lines CNL1 and CNL2 include a transparent conductive oxide, a conductive polymer, etc., a separate conductive layer made of an opaque metal for reflecting light emitted from the light emitting element LD in the image display direction of the display device may be additionally provided. The material of each of the first and second electrodes EL1 and EL2 and the first and second connection lines CNL1 and CNL2 is not limited to the aforementioned materials.

[0200] In addition, although each of the first electrode EL1 and the second electrode EL2 and the first connection line CNL1 and the second connection line CNL2 is formed by a single layer, the present disclosure is not limited thereto. In an embodiment, the first electrode EL1 and the second electrode EL2 and the first connection line CNL1 and the second connection line CNL2 may have a multilayer structure formed by stacking two or more materials among metals, alloys, conductive oxides, and conductive polymers. Each of the first electrode EL1 and the second electrode EL2 and the first connection line CNL1 and the second connection line CNL2 may be formed by a multilayer including two or more layers to minimize distortion caused by signal delay when a signal (or voltage) is transmitted to the opposite ends EP1 and EP2 of each of the light emitting elements LD. For example, each of the first electrode EL1 and the second electrode EL2 and the first connection line CNL1 and the second connection line CNL2 may be formed by a multilayer structure in which layers are stacked in the order of ITO / Ag / ITO.

[0201] As described above, since each of the first electrode EL1 and the second electrode EL2 has a shape corresponding to the shape of the bank pattern PW, light emitted from the opposite ends EP1 and EP2 of each of the light emitting elements LD can be reflected by the first electrode EL1 and the second electrode EL2 and more reliably travel in the image display direction of the display device. Therefore, the efficiency of light emitted from each of the light emitting elements LD can be further enhanced.

[0202] In an embodiment of the present disclosure, the bank pattern PW and the first electrode EL1 and the second electrode EL2 can each be used as a reflective component configured to guide the light emitted from the light emitting element LD in a desired direction, and thus enhance the light efficiency of the display device. In other words, the bank pattern PW and the first electrode EL1 and the second electrode EL2 can each be used as a reflective component configured to enable the light emitted from the light emitting element LD to travel in the image display direction of the display device, thereby enhancing the light output efficiency of the light emitting element LD.

[0203] Any one of the first electrode EL1 and the second electrode EL2 may be an anode electrode, and the other electrode may be a cathode electrode. In an embodiment of the present disclosure, the first electrode EL1 may be an anode electrode, and the second electrode EL2 may be a cathode electrode.

[0204] Each of the light emitting elements LD may be formed of a light emitting diode made of a material having an inorganic crystal structure and having an ultra-small size corresponding to, for example, a nanometer level or a micrometer level. The light emitting element LD may be aligned between the first electrode EL1 and the second electrode EL2 in the pixel PXL.

[0205] Two or tens of light emitting elements LD may be aligned in the emission area EMA of each of the pixels PXL, but the present disclosure is not limited thereto. In an embodiment, the number of light emitting elements LD provided in each of the pixels PXL may be changed in various ways.

[0206] Each of the light emitting elements LD may include a cylindrical light emitting element manufactured by an etching method, or a core-shell light emitting element manufactured by a growth method.

[0207] In the case where each of the light emitting elements LD is a cylindrical light emitting element, each light emitting element LD may include an emission stack (or stacking pattern) formed by sequentially stacking a first semiconductor layer 11, an active layer 12, a second semiconductor layer 13, and an electrode layer 15 in a longitudinal direction of each light emitting element LD. In the case where each of the light emitting elements LD is a light emitting element having a core-shell structure, each light emitting element LD may include an emission pattern 10 having a first semiconductor layer 11 disposed in a central portion of the light emitting element LD, an active layer 12 surrounding at least one side of the first semiconductor layer 11, a second semiconductor layer 13 surrounding at least one side of the active layer 12, and an electrode layer 15 surrounding at least one side of the second semiconductor layer 13.

[0208] Each of the light emitting elements LD may include a first end portion EP1 and a second end portion EP2. Any one of the first semiconductor layer 11 and the second semiconductor layer 13 may be disposed in the first end portion EP1 of each of the light emitting elements LD, and the other of the first semiconductor layer 11 and the second semiconductor layer 13 may be disposed in the second end portion EP2 of each of the light emitting elements LD. Each of the light emitting elements LD may emit colored light or white light.

[0209] The light emitting element LD may be aligned between the first electrode EL1 and the second electrode EL2 in the emission area EMA of each of the pixels PXL by an electric field formed between the first electrode EL1 and the second electrode EL2 .

[0210] Specifically, after an electric field has been formed between the first electrode EL1 and the second electrode EL2, a plurality of light emitting elements LD may be input into the emission area EMA of each of the pixels PXL by spraying and / or applying a fluid solvent mixed with the light emitting element LD in an inkjet printing method or the like. In an embodiment of the present disclosure, the solvent may be any one or more of acetone, water, ethanol, and toluene, but the present disclosure is not limited thereto. For example, the solvent may include a material that can evaporate at room temperature or by heating. In addition, the solvent may have the form of ink or slurry. The method of spraying and / or applying the light emitting element LD is not limited to the method of the aforementioned embodiment. The method of spraying and / or applying the light emitting element LD may be changed in various ways. After the light emitting element LD has been input into the emission area EMA of each of the pixels PXL, the solvent may be removed.

[0211] In the case where the light emitting element LD is input into the emission area EMA of each of the pixels PXL, the self-alignment of the light emitting element LD can be induced by the electric field formed between the first electrode EL1 and the second electrode EL2. Therefore, the light emitting element LD can be aligned between the first electrode EL1 and the second electrode EL2. In other words, the light emitting element LD can be aligned in various directions in the target area (e.g., the emission area EMA of each of the pixels PXL).

[0212] In an embodiment of the present disclosure, the first electrode EL1 may include a first main electrode MAE1 and a first auxiliary electrode AUE1, and the second electrode EL2 may include a second main electrode MAE2 and a second auxiliary electrode AUE2. Therefore, the light emitting element LD may be aligned between the first main electrode MAE1 and the second auxiliary electrode AUE2 and between the second main electrode MAE2 and the first auxiliary electrode AUE1. In addition, in an embodiment of the present disclosure, in a plan view, some light emitting elements LD may be aligned between the first main electrode MAE1 and the second main electrode MAE2 facing each other in a diagonal direction.

[0213] The light emitting element LD may be aligned between the first electrode EL1 and the second electrode EL2 in the emission area EMA of each of the pixels PXL. In particular, any one of the opposite ends EP1 and EP2 of the light emitting element LD may be electrically connected to the first electrode EL1, and the other of the opposite ends EP1 and EP2 of the light emitting element LD may be electrically connected to the second electrode EL2. Therefore, the signal (or voltage) of the first transistor T1 of the pixel circuit layer PCL of each of the pixels PXL may be applied to any one of the opposite ends EP1 and EP2 of the light emitting element LD via the first electrode EL1. The voltage of the second driving power supply VSS of the driving voltage line DVL may be applied to the other end via the second electrode EL2.

[0214] The light emitting element LD may form an effective light source for each of the pixels PXL. For example, if a driving current flows through each of the pixels PXL during each frame period, the light emitting element LD electrically connected to the first and second electrodes EL1 and EL2 of each pixel PXL may emit light having a brightness corresponding to the driving current.

[0215] The above-described light emitting element LD may be aligned on the first insulating layer INS1 in the emission area EMA of each of the pixels PXL.

[0216] The first insulating layer INS1 may be formed in the emission area EMA of each of the pixels PXL and / or disposed under each of the light emitting elements LD between the first electrode EL1 and the second electrode EL2. The first insulating layer INS1 may be filled in the space between the passivation layer PSV and each of the light emitting elements LD to stably support the light emitting element LD and prevent the light emitting element LD from being removed from the passivation layer PSV.

[0217] In the emission area EMA of each of the pixels PXL, the first insulating layer INS1 may expose a predetermined area of ​​the first electrode EL1 and cover the remaining area except the exposed predetermined area to protect the remaining area of ​​each of the first electrodes EL1. In addition, the first insulating layer INS1 may expose a predetermined area of ​​the second electrode EL2 and cover the remaining area except the exposed predetermined area to protect the remaining area of ​​each of the second electrodes EL2. In addition, the first insulating layer INS1 may be formed in the peripheral area of ​​each of the pixels PXL and / or disposed on the passivation layer PSV to protect components disposed in the peripheral area.

[0218] The first insulating layer INS1 may be formed of an inorganic insulating layer including an inorganic material or an organic insulating layer including an organic material. Although in an embodiment of the present disclosure, the first insulating layer INS1 may be formed of an inorganic insulating layer having an advantage in protecting the light emitting element LD from the pixel circuit layer PCL, the present disclosure is not limited thereto. In an embodiment, the first insulating layer INS1 may be formed of an organic insulating layer having an advantage in planarizing the support surface of the light emitting element LD.

[0219] The second insulating layer INS2 may be disposed and / or formed on the light emitting element LD. The second insulating layer INS2 may be disposed and / or formed on each of the light emitting elements LD to cover a portion of the upper surface of each light emitting element LD, and may expose the opposite ends EP1 and EP2 of each light emitting element LD to the outside. The second insulating layer INS2 may be formed in an independent pattern in the emission area EMA of each of the pixels PXL, but the present disclosure is not limited thereto. In an embodiment, the second insulating layer INS2 may be omitted. In this case, the first contact electrode CNE1 may directly contact one of the opposite ends EP1 and EP2 of each of the light emitting elements LD. The second contact electrode CNE2 may directly contact the other of the opposite ends EP1 and EP2 of each of the light emitting elements LD. Here, the first contact electrode CNE1 and the second contact electrode CNE2 may be electrically disconnected from each other.

[0220] The second insulating layer INS2 may be formed of a single layer or a multilayer, and include an inorganic insulating layer including at least one inorganic material or an organic insulating layer including at least one organic material. The second insulating layer INS2 may be fixed to each of the light emitting elements LD aligned in the emission area EMA of each of the pixels PXL. In an embodiment of the present disclosure, the second insulating layer INS2 may include an inorganic insulating layer having advantages in protecting the active layer 12 of each of the light emitting elements LD from external oxygen, water, etc. However, the present disclosure is not limited thereto. According to the design conditions of the display device to which the light emitting element LD is applied, the second insulating layer INS2 may be formed of an organic insulating layer including an organic material.

[0221] In an embodiment of the present disclosure, after alignment of the light emitting element LD in the emission area EMA of each of the pixels PXL has been completed, a second insulating layer INS2 is formed on the light emitting element LD so that the light emitting element LD can be prevented from being removed from the aligned position. If there is a space between the first insulating layer INS1 and the light emitting element LD before the second insulating layer INS2 is formed, the space can be filled with the second insulating layer INS2 during the process of forming the second insulating layer INS2. Therefore, the light emitting element LD can be stably supported. Therefore, the second insulating layer INS2 can be formed of an organic insulating layer that has an advantage in filling the space between the first insulating layer INS1 and the light emitting element LD with the second insulating layer INS2.

[0222] In an embodiment of the present disclosure, a second insulating layer INS2 may be formed on each of the light emitting elements LD so that the active layer 12 of each light emitting element LD can be prevented from contacting an external conductive material. The second insulating layer INS2 may cover only a portion of the upper surface of each of the light emitting elements LD so that opposite ends EP1 and EP2 of each light emitting element LD may be exposed to the outside.

[0223] The first contact electrode CNE1 may be disposed on the first electrode EL1 of each of the pixels PXL to reliably electrically and / or physically connect the first electrode EL1 to one of the opposite ends EP1 and EP2 of each of the light emitting elements LD. The second contact electrode CNE2 may be disposed on the second electrode EL2 of each of the pixels PXL to reliably electrically and / or physically connect the second electrode EL2 to the other of the opposite ends EP1 and EP2 of each of the light emitting elements LD.

[0224] In an embodiment, each of the first contact electrode CNE1 and the second contact electrode CNE2 may be formed of various transparent conductive materials. For example, each of the first contact electrode CNE1 and the second contact electrode CNE2 may be formed of a transparent conductive material for minimizing the loss of light emitted from each of the light emitting elements LD and reflected by the corresponding electrode in the front direction of the display device. The transparent conductive material may include at least one of various conductive materials such as ITO, IZO, and ITZO, and may be substantially transparent or translucent to satisfy a predetermined transmittance. The materials of the first contact electrode CNE1 and the second contact electrode CNE2 are not limited to the above materials.

[0225] Each of the first contact electrode CNE1 and the second contact electrode CNE2 may have a rod shape extending in the second direction DR2. The first contact electrode CNE1 may partially overlap one of the opposite ends EP1 and EP2 of each of the light emitting elements LD. The second contact electrode CNE2 may partially overlap the other of the opposite ends EP1 and EP2 of each of the light emitting elements LD.

[0226] In an embodiment of the present disclosure, the first contact electrode CNE1 and the second contact electrode CNE2 may be disposed on corresponding different layers. In this case, the first contact electrode CNE1 may be disposed and / or formed on the second insulating layer INS2 and covered with the third insulating layer INS3. In addition, the second contact electrode CNE2 may be disposed and / or formed on the third insulating layer INS3 and covered with the fourth insulating layer INS4. The third insulating layer INS3 and the fourth insulating layer INS4 may be formed of any one of an inorganic insulating layer including an inorganic material or an organic insulating layer including an organic material. An overcoat layer OC may be disposed and / or formed on the fourth insulating layer INS4.

[0227] Although it has been described in the foregoing embodiments that the first contact electrode CNE1 and the second contact electrode CNE2 are disposed and / or formed on respective different layers, the present disclosure is not limited thereto. Figure 7 As shown in , the first contact electrode CNE1 and the second contact electrode CNE2 may be disposed and / or formed on the same layer. In this case, the first contact electrode CNE1 and the second contact electrode CNE2 may be spaced apart from each other by a predetermined distance on the second insulating layer INS2 and thus electrically disconnected from each other, and may be covered with a third insulating layer INS3. An overcoat layer OC may be disposed and / or formed on the third insulating layer INS3. Here, in the case where the first contact electrode CNE1 and the second contact electrode CNE2 are disposed and / or formed on respective different layers, the third insulating layer INS3 may correspond to the fourth insulating layer INS4.

[0228] The overcoat layer OC may be an encapsulation layer configured to relieve a step difference formed by the bank pattern PW, the first and second contact electrodes CNE1 and CNE2, and the first and second electrodes EL1 and EL2 disposed under the overcoat layer OC, and prevent oxygen or water from penetrating the light emitting element LD. In an embodiment, the overcoat layer OC may be omitted in consideration of design conditions of the display device, etc.

[0229] As described above, a predetermined voltage is applied to the opposite ends EP1 and EP2 of each of the light emitting elements LD through the first electrode EL1 and the second electrode EL2, so that each of the light emitting elements LD can emit light by coupling of electron-hole pairs in the active layer 12 of each light emitting element LD. Each of the light emitting elements LD can emit light having a wavelength band ranging from 400 nm to 900 nm, for example.

[0230] In an embodiment, if Figure 8 As shown in FIG. 1 , in the emission area EMA of each of the pixels PXL, a cladding layer CPL may be disposed and / or formed.

[0231] The cover layer CPL may be disposed between the first electrode EL1 and the first contact electrode CNE1 and between the second electrode EL2 and the second contact electrode CNE2, respectively. In addition, the cover layer CPL may be disposed and / or formed on each of the first connection line CNL1 and the second connection line CNL2.

[0232] The cladding layer CPL may prevent the corresponding electrode from being damaged due to a malfunction caused during a process of manufacturing the display device, and enhance adhesion between the corresponding electrode and the passivation layer PSV. The cladding layer CPL may be formed of a transparent conductive material such as indium zinc oxide (IZO) to minimize loss of light emitted from each of the light emitting elements LD and reflected by the corresponding electrode in an image display direction of the display device.

[0233] As described above, the first electrode EL1 may include a plurality of first main electrodes MAE1 and a plurality of first auxiliary electrodes AUE1 having different shapes and different widths, so that the width of the first electrode EL1 in the first direction DR1 may not be constant in the direction in which the first electrode EL1 extends. In other words, the first electrode EL1 may have at least two widths W1 and W2 in the extending direction thereof.

[0234] Likewise, since the second electrode EL2 includes a plurality of second main electrodes MAE2 and a plurality of second auxiliary electrodes AUE2 having different shapes and different widths, the width of the second electrode EL2 in the first direction DR1 may not be constant in the direction in which the second electrode EL2 extends. In other words, the second electrode EL2 may have at least two widths W3 and W4 in the direction in which it extends.

[0235] If the first electrode EL1 and the second electrode EL2 are supplied with corresponding alignment voltages before the light emitting element LD is aligned in the emission area EMA of each of the pixels PXL, an electric field may be formed between the first electrode EL1 and the second electrode EL2. As described above, since the width of each of the first electrode EL1 and the second electrode EL2 in the first direction DR1 is not constant in the extending direction thereof (or has at least two widths in the extending direction thereof), the magnitude of the electric field and the direction of the electric field may vary by region between the first electrode EL1 and the second electrode EL2.

[0236] Therefore, some of the light emitting elements LD may be aligned so that their longitudinal directions are parallel to the first direction DR1, other some of the light emitting elements LD may be aligned so that their longitudinal directions are parallel to a direction inclined at a predetermined angle relative to the first direction DR1, and other some of the light emitting elements LD may be aligned so that their longitudinal directions are parallel to a direction opposite to the inclined direction. Therefore, the light emitting elements LD may be aligned around each of the first main electrode MAE1 of the first electrode EL1 and / or the second main electrode MAE2 of the second electrode EL2 in four directions. In addition, the light emitting elements LD may be aligned around each of the first auxiliary electrode AUE1 of the first electrode EL1 and / or the second auxiliary electrode AUE2 of the second electrode EL2 in four directions thereof.

[0237] Since the respective widths of the first electrode EL1 and the second electrode EL2 in the first direction DR1 are not constant in the respective extension directions of the first electrode EL1 and the second electrode EL2, the light emitting element LD can be prevented from being biasedly aligned in a specific direction, for example, in the first direction DR1, in the emission area EMA of each of the pixels PXL. Therefore, light emitted from each of the light emitting elements LD can be prevented from being concentrated in a specific direction. Therefore, the display device according to an embodiment of the present disclosure can have a uniform light output distribution in its entire area.

[0238] If, in the same manner as a conventional display device, the width of each of the first electrode EL1 and the second electrode EL2 in the first direction DR1 is constant in the extension direction of each of the first electrode EL1 and the second electrode EL2, the distance between the first electrode EL1 and the second electrode EL2 may be constant regardless of the area. In this case, the electric field formed between the first electrode EL1 and the second electrode EL2 has a constant magnitude and a constant orientation, the light emitting element LD may be aligned in the same direction in the emission area EMA of each of the pixels PXL, for example, aligned in the first direction DR1, and the light emitted from each of the light emitting elements LD may travel in the first direction DR1. Therefore, in the alignment direction of the light emitting element LD, the light emitted from each of the light emitting elements LD may be concentrated. In the case where the light is concentrated in a specific direction in the emission area EMA of each of the pixels PXL, the light output distribution of the light by the area of ​​the display device may be different from each other, which may cause image quality failure.

[0239] Therefore, in the display device according to an embodiment of the present disclosure, by changing the shapes of the first electrode EL1 and the second electrode EL2, the light emitting element LD can be aligned in different directions in the emission area EMA of each of the pixels PXL, so that the light emitted from each of the light emitting elements LD can be prevented from being concentrated in a specific direction.

[0240] Figures 12 to 19Shows Figure 4 1 and 2 are other embodiments of a pixel, and are plan views schematically showing a pixel including only some components of a display element layer.

[0241] Although Figures 12 to 19 The structure of each of the pixels is schematically shown, for example, only the first and second electrodes, the first and second connection lines, and the light emitting element included in the display element layer of each of the pixels are shown, but the present disclosure is not limited thereto.

[0242] In addition, Figures 12 to 19 , for the sake of explanation, illustration of a pixel circuit layer (at least one transistor and a signal line electrically connected to the transistor) electrically connected to a light emitting element is omitted.

[0243] The following Figures 12 to 19 The description of the embodiment of will focus on the differences from the description of the previous embodiment to avoid repeated description thereof. Figures 12 to 19 Components that are not explained separately in the description of the embodiment of the present invention are consistent with the components of the aforementioned embodiment. The same reference numerals will be used to represent the same components, and similar reference numerals will be used to represent similar components.

[0244] refer to Figures 1a to 1f , Figure 2 as well as Figures 12 to 19 Each of the pixels PXL according to the embodiment of the present disclosure may include a substrate SUB, a pixel circuit layer (refer to Figure 6 PCL) and display component layer (reference Figure 6 of DPL).

[0245] The display element layer of each of the pixels PXL may include first and second electrodes EL1 and EL2, a plurality of light emitting elements LD, and first and second connection lines CNL1 and CNL2. Figures 12 to 19 Although not directly shown in the figure, the display element layer of each of the pixels PXL may further include a bank pattern disposed and / or formed under each of the first electrode EL1 and the second electrode EL2 (refer to Figure 4 PW), and first contact electrodes and second contact electrodes (reference Figure 4 of CNE1 and CNE2).

[0246] Each of the first and second electrodes EL1 and EL2 may be disposed in the emission area EMA of each of the pixels PXL and extend in a second direction DR2 (eg, a “column direction”). The first and second electrodes EL1 and EL2 may be disposed on the same plane and spaced apart from each other by a predetermined distance.

[0247] In an embodiment of the present disclosure, the first electrode EL1 may include a plurality of first main electrodes MAE1 and a plurality of first auxiliary electrodes AUE1.

[0248] Each of the first main electrodes MAE1 may be spaced apart from the adjacent first main electrodes MAE1 in the second direction DR2. Although each of the first main electrodes MAE1 may have a rectangular shape in a plan view, the shape of each of the first main electrodes MAE1 is not limited to the aforementioned embodiment. In an embodiment, each of the first main electrodes MAE1 may have a circular shape, a diamond shape, or an elliptical shape. In other words, the first main electrode MAE1 may have various shapes.

[0249] Furthermore, some of the first main electrodes MAE1 and / or some of the other first main electrodes MAE1 may have different shapes. Fig.19 As shown in , the first main electrode MAE1 disposed at the first position in the second direction DR2 may have a rectangular shape. The first main electrode MAE1 adjacent to the rectangular first main electrode MAE1 in the second direction DR2 may have a circular shape. The first main electrode MAE1 adjacent to the circular first main electrode MAE1 in the second direction DR2 may have a rhombus shape. The first main electrode MAE1 adjacent to the rhombus first main electrode MAE1 in the second direction DR2 may have a rectangular shape. The first main electrodes MAE1 having different shapes in the second direction DR2 may have different widths in the first direction DR1.

[0250] As described above, the first main electrodes MAE1 having different shapes in the second direction DR2 may be disposed and / or formed on the same layer and manufactured through the same process.

[0251] Each of the first auxiliary electrodes AUE1 may function as a bridge for coupling two first main electrodes MAE1 disposed adjacent to each other in the second direction DR2 and have a rectangular shape, but the present disclosure is not limited thereto, and each of the first auxiliary electrodes AUE1 may have various shapes including a circular shape, an elliptical shape, and a diamond shape.

[0252] In an embodiment of the present disclosure, the first main electrode MAE1 and the first auxiliary electrode AUE1 may be integrally provided with each other and electrically and / or physically connected to each other. In addition, since the first main electrode MAE1 and the first auxiliary electrode AUE1 have different shapes, the surface area (or size) of each of the first main electrode MAE1 and the surface area (or size) of each of the first auxiliary electrode AUE1 may be different from each other.

[0253] In an embodiment of the present disclosure, the width W1 of each of the first main electrodes MAE1 in the first direction DR1 may be greater than the width W2 of each of the first auxiliary electrodes AUE1 in the first direction DR1, so that the surface area (or size) of each of the first main electrodes MAE1 may be greater than the surface area (or size) of each of the first auxiliary electrodes AUE1. However, the present disclosure is not limited thereto, and the opposite is also possible. In other words, the width W2 of each of the first auxiliary electrodes AUE1 in the first direction DR1 may be greater than the width W1 of each of the first main electrodes MAE1 in the first direction DR1, so that the surface area (or size) of each of the first auxiliary electrodes AUE1 may be greater than the surface area (or size) of each of the first main electrodes MAE1.

[0254] In addition, if Fig.17 As shown in , the first auxiliary electrode AUE1 may include a 1-1 auxiliary electrode AUE1_1 and a 1-2 auxiliary electrode AUE1_2 having different widths in the first direction DR1. A width W2 of the 1-1 auxiliary electrode AUE1_1 in the first direction DR1 may be smaller than a width W3 of the 1-2 auxiliary electrode AUE1_2 in the first direction DR1, but the present disclosure is not limited thereto, and the opposite is also possible. In other words, a width W2 of the 1-1 auxiliary electrode AUE1_1 in the first direction DR1 may be larger than a width W3 of the 1-2 auxiliary electrode AUE1_2 in the first direction DR1.

[0255] As described above, the first main electrode MAE1 and the first auxiliary electrode AUE1, which are integrally formed and / or disposed and electrically and / or physically connected and have different shapes and / or surface areas (or sizes), may form the first electrode EL1 of each of the pixels PXL. Due to the plurality of first main electrodes MAE1 and the plurality of first auxiliary electrodes AUE1, the width of the first electrode EL1 may not be constant in the direction in which the first electrode EL1 extends. In other words, the first electrode EL1 may have at least two widths W1 and W2 in the direction in which it extends (e.g., in the second direction DR2).

[0256] In an embodiment of the present disclosure, the shape of each of the first main electrode MAE1 and the first auxiliary electrode AUE1 may be variously changed within a range in which each of the first main electrode MAE1 and the first auxiliary electrode AUE1 has at least two widths (or variable widths) in a direction in which the first electrode EL1 extends.

[0257] In an embodiment of the present disclosure, the second electrode EL2 may include a plurality of second main electrodes MAE2 and a plurality of second auxiliary electrodes AUE2.

[0258] Each of the second main electrodes MAE2 may be spaced apart from the adjacent second main electrodes MAE2 in the second direction DR2. Although each of the second main electrodes MAE2 may have a rectangular shape in a plan view, the shape of each of the second main electrodes MAE2 is not limited to the shape of the aforementioned embodiment. In an embodiment, each of the second main electrodes MAE2 may have a circular shape, a diamond shape, or an elliptical shape. In other words, the second main electrode MAE2 may have various shapes.

[0259] Furthermore, some of the second main electrodes MAE2 and / or some other second main electrodes MAE2 may have different shapes. Fig.19 As shown in , the second main electrode MAE2 disposed at the first position in the second direction DR2 may have a hexagonal shape. The second main electrode MAE2 adjacent to the hexagonal second main electrode MAE2 in the second direction DR2 may have a rectangular shape. The second main electrode MAE2 adjacent to the rectangular second main electrode MAE2 in the second direction DR2 may have an elliptical shape. The second main electrode MAE2 adjacent to the elliptical second main electrode MAE2 in the second direction DR2 may have a circular shape. The second main electrodes MAE2 having different shapes in the second direction DR2 may have different widths in the first direction DR1.

[0260] As described above, the second main electrodes MAE2 having different shapes in the second direction DR2 may be disposed and / or formed on the same layer and manufactured through the same process.

[0261] In an embodiment of the present disclosure, each of the second main electrodes MAE2 and each of the first main electrodes MAE1 may have the same shape, but the present disclosure is not limited thereto. In an embodiment, each of the second main electrodes MAE2 and each of the first main electrodes MAE1 may have different shapes. For example, Fig.16 As shown in , in the case where the first main electrode MAE1 has a rectangular shape, the second main electrode MAE2 may have an elliptical shape, and in the case where the first main electrode MAE1 has an elliptical shape, the second main electrode MAE2 may have a rectangular shape. In this case, a width W1 of each of the first main electrodes MAE1 in the first direction DR1 may be the same as or different from a width W3 of each of the second main electrodes MAE2 in the first direction DR1.

[0262] In the case where each of the second main electrodes MAE2 and each of the first main electrodes MAE1 have the same shape, the second main electrodes MAE2 and the first main electrodes MAE1 may have the same surface area (or size) or may have different surface areas (or sizes). Fig.18As shown in , in the case where each of the second main electrodes MAE2 and each of the first main electrodes MAE1 have different surface areas (or sizes), each of the second main electrodes MAE2 may have a surface area (or size) larger than the surface area (or size) of each of the first main electrodes MAE1. However, the present disclosure is not limited thereto, and the opposite is also possible. In other words, each of the second main electrodes MAE2 may have a surface area (or size) smaller than the surface area (or size) of each of the first main electrodes MAE1.

[0263] According to an embodiment, each of the second auxiliary electrodes AUE2 may function as a bridge for electrically connecting two second main electrodes MAE2 disposed adjacent to each other in the second direction DR2 , and the second auxiliary electrode AUE2 and the first auxiliary electrode AUE1 may have the same shape or different shapes.

[0264] In an embodiment of the present disclosure, the second main electrode MAE2 and the second auxiliary electrode AUE2 may be integrally disposed with each other and electrically and / or physically connected to each other. In addition, since the second main electrode MAE2 and the second auxiliary electrode AUE2 have different shapes, the surface area (or size) of each of the second main electrodes MAE2 and the surface area (or size) of each of the second auxiliary electrodes AUE2 may be different from each other.

[0265] In an embodiment of the present disclosure, the width W3 of each of the second main electrodes MAE2 in the first direction DR1 may be greater than the width W4 of each of the second auxiliary electrodes AUE2 in the first direction DR1, so that the surface area (or size) of each of the second main electrodes MAE2 may be greater than the surface area (or size) of each of the second auxiliary electrodes AUE2. However, the present disclosure is not limited thereto, and the opposite is also possible. In other words, the width W4 of each of the second auxiliary electrodes AUE2 in the first direction DR1 may be greater than the width W3 of each of the second main electrodes MAE2 in the first direction DR1, so that the surface area (or size) of each of the second auxiliary electrodes AUE2 may be greater than the surface area (or size) of each of the second main electrodes MAE2.

[0266] In addition, if Fig.17As shown in , the second auxiliary electrode AUE2 may include a 2-1st auxiliary electrode AUE2_1 and a 2-2nd auxiliary electrode AUE2_2 having different widths in the first direction DR1. A width W5 of the 2-1st auxiliary electrode AUE2_1 in the first direction DR1 may be smaller than a width W6 of the 2-2nd auxiliary electrode AUE2_2 in the first direction DR1, but the present disclosure is not limited thereto, and the opposite is also possible. In other words, a width W5 of the 2-1st auxiliary electrode AUE2_1 in the first direction DR1 may be larger than a width W6 of the 2-2nd auxiliary electrode AUE2_2 in the first direction DR1.

[0267] In an embodiment of the present disclosure, each of the second main electrodes MAE2 of the second electrode EL2 may alternate with each of the first auxiliary electrodes AUE1 of the first electrode EL1 in the first direction DR1. Each of the second auxiliary electrodes AUE2 of the second electrode EL2 may alternate with each of the first main electrodes MAE1 of the first electrode EL1 in the first direction DR1. In other words, each of the second main electrodes MAE2 may be disposed in the same row as that of the first auxiliary electrode AUE1 and correspond to the first auxiliary electrode AUE1. Each of the second auxiliary electrodes AUE2 may be disposed in the same row as that of the first main electrode MAE1 and correspond to the first main electrode MAE1. Here, the present disclosure is not limited thereto. Each of the second main electrodes MAE2 may be disposed in the same row as that of the first main electrode MAE1. Each of the second auxiliary electrodes AUE2 may be disposed in the same row as that of the first auxiliary electrode AUE1.

[0268] As described above, a plurality of second main electrodes MAE2 and a plurality of second auxiliary electrodes AUE2 that are integrally formed and / or disposed and electrically and / or physically connected and have different shapes and / or surface areas (or sizes) may form the second electrode EL2 of each of the pixels PXL. Due to the plurality of second main electrodes MAE2 and the plurality of second auxiliary electrodes AUE2, the width of the second electrode EL2 in the first direction DR1 may not be constant in the direction in which the second electrode EL2 extends. In other words, the second electrode EL2 may have at least two widths W3 and W4 in the direction in which it extends (e.g., in the second direction DR2).

[0269] Since each of the first electrode EL1 and the second electrode EL2 has at least two widths in the second direction DR2 (or the width of each of the first electrode EL1 and the second electrode EL2 in the first direction DR1 is not constant), the light emitting elements LD in the emission area EMA of each of the pixels PXL can be aligned in various directions rather than in a specific direction. Therefore, the light emitted from each of the light emitting elements LD can travel in various directions rather than being concentrated in a specific direction. Therefore, the display device according to an embodiment of the present disclosure can have a uniform light output distribution in its entire area, so that image quality failures caused by different light output distributions by area can be minimized.

[0270] Fig. 20 Shows Figure 4 1 is another embodiment of a pixel of the present invention, and is a plan view schematically showing a pixel including only some components of a display element layer. Fig.21 It is along Fig. 20 Schematic cross-sectional view taken along line IV-IV'.

[0271] Although Fig. 20 and Fig.21 The structure of each of the pixels is schematically shown, for example, only the first and second electrodes, the first and second connection lines, and the light emitting element included in the display element layer of each of the pixels are shown, but the present disclosure is not limited thereto.

[0272] In addition, Fig. 20 and Fig.21 , for the sake of explanation, illustration of a pixel circuit layer (at least one transistor and a signal line electrically connected to the transistor) electrically connected to a light emitting element is omitted.

[0273] also, Fig. 20 and Fig.21 The structure of one pixel PXL is more schematically shown, for example, where each electrode is a single electrode layer and each insulating layer is a single insulating layer.

[0274] The following Fig. 20 and Fig.21 The description of the embodiment of will focus on the differences from the description of the previous embodiment to avoid repeated description thereof. Fig. 20 and Fig.21 Components not described separately in the description of the embodiment of the present invention are consistent with the components of the previous embodiment. The same reference numerals will be used to represent the same components, and similar reference numerals will be used to represent similar components.

[0275] refer to Figures 1a to 1f , Figure 2 , Fig. 20 as well as Fig.21, each of the pixels PXL according to an embodiment of the present disclosure may include a substrate SUB, a pixel circuit layer PCL, and a display element layer DPL.

[0276] The pixel circuit layer PCL may include first and second transistors T1 and T2 , a driving voltage line DVL, and a passivation layer PSV configured to cover the first and second transistors T1 and T2 and the driving voltage line DVL.

[0277] The display element layer DPL may include a bank pattern PW, a plurality of first main electrodes MAE1, a plurality of second main electrodes MAE2, a first cladding layer CPL1 and a second cladding layer CPL2, a plurality of light emitting elements LD, and first and second connection lines CNL1 and CNL2. In addition, although not directly shown in the drawings, the display element layer DPL may include a contact electrode configured to connect any one of the opposite ends EP1 and EP2 of the light emitting element LD to each of the first main electrodes MAE1 and a contact electrode configured to connect the other of the opposite ends EP1 and EP2 of the light emitting element LD to each of the second main electrodes MAE2.

[0278] Each of the first connection line CNL1 and the second connection line CNL2 may extend in a first direction DR1 (eg, a “row direction”) in each of the pixels PXL. The second connection line CNL2 may be electrically connected to the driving voltage line DVL through a second contact hole CH2 passing through the passivation layer PSV so that the second driving power source (reference Figure 3a A voltage of “VSS”) may be applied to the second connection line CNL2.

[0279] In an embodiment of the present disclosure, each of the first main electrodes MAE1 may be disposed in the second direction DR2 (e.g., a “column direction”) and spaced apart from a first main electrode MAE1 adjacent thereto in the second direction DR2 by a predetermined distance. Thus, each of the first main electrodes MAE1 may be electrically and / or physically separated from a first main electrode MAE1 adjacent thereto in the second direction DR2. In an embodiment of the present disclosure, each of the first main electrodes MAE1 may be a first electrode EL1. Here, for the sake of explanation, each of the first main electrodes MAE1 will be referred to as a first electrode EL1.

[0280] Likewise, each of the second main electrodes MAE2 may be disposed in the second direction DR2 and spaced apart from a second main electrode MAE2 adjacent thereto in the second direction DR2 by a predetermined distance. Thus, each of the second main electrodes MAE2 may be electrically and / or physically separated from a second main electrode MAE2 adjacent thereto in the second direction DR2. In an embodiment of the present disclosure, each of the second main electrodes MAE2 may be a second electrode EL2. Here, for the sake of explanation, each of the second main electrodes MAE2 will be referred to as a second electrode EL2.

[0281] In an embodiment of the present disclosure, the first cladding layer CPL1 may include a 1-1 cladding layer CPL1_1 extending in the second direction DR2 and a 1-2 cladding layer CPL1_2 extending in the first direction DR1. The first cladding layer CPL1 may be formed of a transparent conductive material to minimize the loss of light emitted by each of the light emitting elements LD and traveling in the image display direction of the display device. The transparent conductive material may include, for example, ITO, IZO, ITZO, etc., but the present disclosure is not limited thereto. The transparent conductive material may include a material that minimizes the loss of light and has conductivity.

[0282] The 1-1 cladding layer CPL1_1 may be directly disposed and / or formed on the first electrode EL1, MAE1, and may be electrically and / or physically connected to the first electrode EL1, MAE1. The 1-1 cladding layer CPL1_1 may prevent the first electrode EL1, MAE1 from being damaged by defects that may occur during a process of manufacturing the display device, and may play a role in enhancing adhesion between the first electrode EL1, MAE1 and the passivation layer PSV.

[0283] The 1-1 cladding layer CPL1_1 may be electrically connected to the first transistor T1 of the pixel circuit layer PCL through the first contact hole CH1 penetrating the passivation layer PSV. Therefore, a signal (or voltage) applied to the first transistor T1 may be transmitted to the 1-1 cladding layer CPL1_1.

[0284] The 1-2 cladding layer CPL1_2 may be directly disposed and / or formed on the first connection line CNL1 and electrically and / or physically connected to the first connection line CNL1. The 1-2 cladding layer CPL1_2 may protect the first connection line CNL1 and enhance adhesion between the first connection line CNL1 and the passivation layer PSV.

[0285] In an embodiment of the present disclosure, the 1-1 cladding layer CPL1_1 and the 1-2 cladding layer CPL1_2 may be integrally provided and electrically and / or physically connected to each other. In the case where the 1-1 cladding layer CPL1_1 and the 1-2 cladding layer CPL1_2 are integrally formed and / or provided, the 1-2 cladding layer CPL1_2 may be a predetermined region of the 1-1 cladding layer CPL1_1, or the 1-1 cladding layer CPL1_1 may be a predetermined region of the 1-2 cladding layer CPL1_2.

[0286] In an embodiment of the present disclosure, the 1-1 cladding layer CPL1_1 may be designed to have a relatively large width in a region where the 1-1 cladding layer CPL1_1 overlaps with the first electrode EL1, MAE1, compared to the width of a region where the 1-1 cladding layer CPL1_1 does not overlap with the first electrode EL1, MAE1. In particular, the 1-1 cladding layer CPL1_1 may be designed to have a surface area (or size) greater than the surface area (or size) of each of the first electrodes EL1, MAE1, so as to ensure reliable electrical and / or physical connection with the first electrodes EL1, MAE1. Therefore, the 1-1 cladding layer CPL1_1 may have a shape in which its width relative to the first direction DR1 is not constant in its extension direction.

[0287] The 1-1 cladding layer CPL1_1 may extend in the second direction DR2 and overlap with the first electrodes EL1 and MAE1, so that the first electrodes EL1 and MAE1 may be electrically connected to each other through the 1-1 cladding layer CPL1_1. Therefore, a signal (or voltage) transmitted to the 1-1 cladding layer CPL1_1 may be transmitted to each of the first electrodes EL1 and MAE1. Therefore, a predetermined signal (or voltage) may be supplied to any one of the opposite ends EP1 and EP2 of each of the light emitting elements LD through the first electrodes EL1 and MAE1.

[0288] In an embodiment of the present disclosure, the second cladding layer CPL2 may include a 2-1 cladding layer CPL2_1 extending in the second direction DR2 and a 2-2 cladding layer CPL2_2 extending in the first direction DR1. The second cladding layer CPL2 and the first cladding layer CPL1 may include the same material.

[0289] The 2-1st cladding layer CPL2_1 may be directly disposed and / or formed on the second electrode EL2, MAE2, and may be electrically and / or physically connected to the second electrode EL2, MAE2. The 2-1st cladding layer CPL2_1 may cover and protect the second electrode EL2, MAE2, and may play a role in enhancing the adhesion between the second electrode EL2, MAE2 and the passivation layer PSV.

[0290] The 2-2 cladding layer CPL2_2 may be directly disposed and / or formed on the second connection line CNL2 and electrically and / or physically connected to the second connection line CNL2. The 2-2 cladding layer CPL2_2 may protect the second connection line CNL2 and enhance the adhesion between the second connection line CNL2 and the passivation layer PSV. Since the second connection line CNL2 is electrically connected to the 2-2 cladding layer CPL2_2, the second driving power VSS (see Figure 3a ) voltage can be transmitted to the 2-2 cladding layer CPL2_2.

[0291] In an embodiment of the present disclosure, the 2-1 cladding layer CPL2_1 and the 2-2 cladding layer CPL2_2 may be integrally arranged and electrically and / or physically connected to each other. In the case where the 2-1 cladding layer CPL2_1 and the 2-2 cladding layer CPL2_2 are integrally formed and / or arranged, the 2-2 cladding layer CPL2_2 may be a predetermined region of the 2-1 cladding layer CPL2_1, or the 2-1 cladding layer CPL2_1 may be a predetermined region of the 2-2 cladding layer CPL2_2.

[0292] In an embodiment of the present disclosure, the 2-1st cladding layer CPL2_1 may be designed to have a relatively large width in an area where the 2-1st cladding layer CPL2_1 overlaps with the second electrode EL2, MAE2, compared to the width of an area where the 2-1st cladding layer CPL2_1 does not overlap with the second electrode EL2, MAE2. In particular, the 2-1st cladding layer CPL2_1 may be designed to have a surface area (or size) greater than the surface area (or size) of each of the second electrodes EL2, MAE2, so as to ensure reliable electrical and / or physical connection with the second electrodes EL2, MAE2. Therefore, the 2-1st cladding layer CPL2_1 may have a shape in which the width of the 2-1st cladding layer CPL2_1 relative to the first direction DR1 is not constant in its extension direction.

[0293] The 2-1 cladding layer CPL2_1 may extend in the second direction DR2 and overlap the second electrodes EL2 and MAE2, so that the second electrodes EL2 and MAE2 may be electrically connected to each other through the 2-1 cladding layer CPL2_1. Figure 3a ) can be transmitted to each of the second electrodes EL2, MAE2. Figure 3a ) can be supplied to the other of the opposite ends EP1 and EP2 of each of the light emitting elements LD through the second electrodes EL2, MAE2.

[0294] As described above, in the case where each of the first electrodes EL1, MAE1 is spaced apart from the first electrodes EL1, MAE1 adjacent thereto in the second direction DR2, the surface area occupied by the first electrodes EL1, MAE1 in the emission area EMA of each of the pixels PXL can be reduced. Similarly, in the case where each of the second electrodes EL2, MAE2 is spaced apart from the second electrodes EL2, MAE2 adjacent thereto in the second direction DR2, the surface area occupied by the second electrodes EL2, MAE2 in the emission area EMA of each of the pixels PXL can be reduced.

[0295] In the emission area EMA of each of the pixels PXL, if the surface area occupied by the first electrode EL1, MAE1 and the second electrode EL2, MAE2 made of an opaque conductive material having a predetermined reflectivity is reduced, a sufficient aperture ratio of the corresponding pixel PXL can be ensured. In particular, in the case where the display device according to an embodiment of the present disclosure is a transparent display device, since a sufficient aperture ratio of each of the pixels PXL is ensured, the transmittance of light extracted from the rear surface and / or the front surface of the substrate SUB is improved. Therefore, the image quality of the transparent display device can be enhanced.

[0296] As described above, the display device according to various embodiments of the present disclosure may be provided with a first electrode EL1 and a second electrode EL2, each of which has a non-constant width in its extension direction, so that the light-emitting element LD can be aligned in various directions in the emission area EMA of each of the pixels PXL, thereby preventing the light emitted from each of the light-emitting elements LD from being concentrated in a specific direction.

[0297] Therefore, the display device according to various embodiments of the present disclosure may have uniform light output distribution throughout its entire area.

[0298] While various embodiments have been described above, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope of the present disclosure.

[0299] Therefore, the embodiments disclosed in this specification are only for illustrative purposes and do not limit the technical scope of the present disclosure. The scope of the present invention to be protected must be defined by the appended claims.

Claims

1. A display device, comprising: A substrate including a display area and a non-display area; as well as at least one pixel is disposed in the display area and includes a pixel circuit layer and a display element layer, the pixel circuit layer includes at least one transistor, and the display element layer includes a plurality of light emitting elements that emit light, Wherein, the display element layer further includes: a first electrode and a second electrode, each extending in a first direction and spaced apart from each other on the substrate in a second direction intersecting the first direction, wherein each of the plurality of light emitting elements is electrically connected to each of the first electrode and the second electrode, wherein each of the first electrode and the second electrode has at least two widths in its extending direction, Wherein, the first electrode comprises: A plurality of first main electrodes arranged in the first direction; and a plurality of first auxiliary electrodes electrically connected to the first main electrode, and The second electrode comprises: a plurality of second main electrodes spaced apart from the first main electrodes and arranged in the first direction; and a plurality of second auxiliary electrodes electrically connected to the second main electrode, and The first light-emitting element among the multiple light-emitting elements is connected between the first main electrode and the second auxiliary electrode, and the second light-emitting element among the multiple light-emitting elements is connected between the first main electrode and the second main electrode, so that the first light-emitting element and the second light-emitting element are not parallel to each other.

2. The display device according to claim 1, wherein: The first main electrode and the first auxiliary electrode are integrated with each other, and the second main electrode and the second auxiliary electrode are integrated with each other.

3. The display device according to claim 2, wherein: The first main electrode and the first auxiliary electrode have shapes different from each other, and The second main electrode and the second auxiliary electrode have shapes different from each other.

4. The display device according to claim 2, wherein: A width of each of the first main electrodes is greater than a width of each of the first auxiliary electrodes, and A width of each of the second main electrodes is greater than a width of each of the second auxiliary electrodes.

5. The display device according to claim 2, wherein: Each of the first main electrodes has a shape different from a shape of the first main electrode adjacent thereto in the first direction, and Each of the second main electrodes has a shape different from a shape of the second main electrodes adjacent thereto in the first direction.

6. The display device according to claim 2, wherein: Each of the first main electrodes and each of the second main electrodes have the same shape, and Each of the first auxiliary electrodes and each of the second auxiliary electrodes have the same shape.

7. The display device according to claim 6, wherein: The first auxiliary electrode includes a plurality of 1-1 auxiliary electrodes and a plurality of 1-2 auxiliary electrodes having widths different from each other, and The second auxiliary electrode includes a plurality of 2-1 auxiliary electrodes and a plurality of 2-2 auxiliary electrodes having widths different from each other.

8. The display device according to claim 2, wherein: Each of the first main electrodes and each of the second main electrodes have different shapes.

9. The display device according to claim 2, wherein: In a plan view, the first main electrodes and the second auxiliary electrodes are alternately arranged in a second direction intersecting the first direction, and the second main electrodes and the first auxiliary electrodes are alternately arranged in the second direction.

10. The display device according to claim 9, wherein: The first main electrodes and the second main electrodes are not arranged in the same row.

11. The display device according to claim 10, wherein: In the second direction, the first main electrode and the second auxiliary electrode correspond to each other, and the second main electrode and the first auxiliary electrode correspond to each other.

12. The display device according to claim 1, wherein: Among the first main electrodes, the first main electrodes arranged in the same column are spaced apart from each other, and Among the second main electrodes, the second main electrodes disposed in the same column are spaced apart from each other.

13. The display device according to claim 12, wherein: The display element layer further comprises: a first cladding layer directly disposed on the first main electrode and electrically connecting the first main electrodes adjacent to each other in the first direction; and The second cladding layer is directly disposed on the second main electrode and electrically connects the second main electrodes adjacent to each other in the first direction.

14. The display device according to claim 9, wherein: The display element layer further comprises: a first connecting line extending in the second direction and electrically connected to the first electrode; a second connecting line, parallel to the first connecting line and electrically connected to the second electrode; a bank pattern disposed under each of the first electrode and the second electrode; a first contact electrode electrically connecting the first electrode to any one of the opposite ends of the light emitting element; and A second contact electrode electrically connects the second electrode to the other of the opposite ends of the light emitting element.

15. The display device according to claim 14, wherein: The first connection line and the first electrode are integrated with each other, and the second connection line and the second electrode are integrated with each other.

16. The display device according to claim 14, wherein: The display element layer further includes a first insulating layer and a second insulating layer, the first insulating layer overlapping a portion of each of the first electrode and the second electrode, the second insulating layer being disposed on an upper surface of the light emitting element, and The first contact electrode and the second contact electrode are spaced apart from each other on the second insulating layer and are electrically disconnected from each other.

17. A pixel comprising: a first electrode and a second electrode, each extending in a first direction and spaced apart from each other on the same plane in a second direction intersecting the first direction; as well as a plurality of light emitting elements, each electrically connected to each of the first electrode and the second electrode, wherein each of the first electrode and the second electrode has at least two widths in its extending direction, Wherein, the first electrode comprises: A plurality of first main electrodes arranged in the first direction; and a plurality of first auxiliary electrodes electrically connected to the first main electrode, and The second electrode comprises: a plurality of second main electrodes spaced apart from the first main electrodes and arranged in the first direction; and a plurality of second auxiliary electrodes electrically connected to the second main electrode, and The first light-emitting element among the multiple light-emitting elements is connected between the first main electrode and the second auxiliary electrode, and the second light-emitting element among the multiple light-emitting elements is connected between the first main electrode and the second main electrode, so that the first light-emitting element and the second light-emitting element are not parallel to each other.

18. The pixel according to claim 17, wherein: The first main electrode and the first auxiliary electrode are integrated with each other, and the second main electrode and the second auxiliary electrode are integrated with each other.

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