Memory, storage system and operation method

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By using multiple programming pulses and alternating programming verification methods in three-dimensional memory, the programming verification process is optimized, and the problem of long programming verification time in the prior art is solved, the programming speed is improved and the threshold voltage distribution degradation is avoided.

CN114639425BActive Publication Date: 2025-03-25YANGTZE MEMORY TECH CO LTD

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Patent Information

Application Number: CN202210137528.8
Authority / Receiving Office: CN · China
Patent Type: Patents(China)
Current Assignee / Owner
Filing Date: 2022-02-15
Publication Date: 2025-03-25
Estimated Expiration: 2042-02-15

Application Information

Patent Timeline

15 Feb 2022

Application

CN202210137528.8

25 Mar 2025

Publication

CN114639425B

IPC: G11C16/10

CPC: G11C16/10

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Read-only memories

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AI Technical Summary

Technical Problem

The programming verification process of existing three-dimensional memory is long, accounting for at least half of the programming process, resulting in a reduced programming speed.

Method used

By introducing a plurality of programming pulses and an alternating first programming verification method and a second programming verification method in the memory, the verification operation is optimized and the number of verification sub-operations is reduced.

Benefits of technology

Shorten programming verification time, improve overall programming speed, and avoid degradation of threshold voltage distribution.

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Abstract

The present application discloses a memory, a storage system and an operation method, and belongs to the field of storage technology. In the present application, a first programming verification method is used to verify a first number of programming states during a first verification sub-operation, and a second programming verification method is used to verify a second number of programming states during a second verification sub-operation, and the first number and the second number are different, and the same programming state exists in the programming state required to be verified by the first verification sub-operation and the programming state required to be verified by the second verification sub-operation. In this way, when one of the programming verification methods verifies each programming state one by one, there will be a verification sub-operation in another programming verification method to verify multiple programming states at the same time, and the time used by the programming verification method is relatively short, so the present application combines the first programming verification method and the second programming verification method, which can shorten the overall programming verification time, thereby improving the overall programming speed.

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