Fabrication of qubits with self-defined josephson junctions

Abstract

A method of fabricating a Josephson junction in a superconducting qubit includes providing a substrate (100) having a protruding structure with a first face (402A) and a second face (402B) that intersect at an edge (402C); depositing a first layer (502A) of superconducting material on the first face; oxidizing the first layer to form a layer of oxide material (504A) on a surface of the first layer; and depositing a second layer (506A) of superconducting material on the second face. A portion of the second layer contacts a portion of the layer of oxide material at or near the edge, such that the portion of the layer of oxide material is sandwiched between a portion of the first layer and the portion of the second layer to define a Josephson junction at or near the edge.

Description

Technical Field

[0001] The presently claimed embodiments of the present invention relate to superconducting qubits, and more specifically, to a method for fabricating a Josephson junction in a superconducting qubit and a superconducting qubit device. Background Technology

[0002] Quantum computing is based on reliable control of quantum bits (referred to as qubits throughout this document). The fundamental operations required to implement quantum algorithms are a set of single-qubit and two-qubit operations that establish correlation between two individual qubits. To meet the error threshold of quantum computing and to achieve reliable quantum simulation, high-fidelity implementation of two-qubit operations is desirable.

[0003] A superconducting quantum processor (having one or more superconducting qubits) comprises a superconducting metal (e.g., Al, Nb, etc.) on an insulating substrate (e.g., Si or high-resistivity Si, Al₂O₃, etc.). Superconducting quantum processors are typically planar two-dimensional lattice structures of individual qubits linked by couplers with various lattice symmetries (e.g., square, hexagonal, etc.), and readout structures located on a flip chip. The couplers can be made of capacitors, resonators, coils, or any microwave component that provides coupling between qubits.

[0004] The conventional method for fabricating superconducting qubits is based on the standard Josephson junction, which is formed using the Dolan or Manhattan method to create a bridge. These methods require numerous steps, including many photolithography steps, and the resulting qubits can be relatively large, and thus may be sensitive to far-field and / or near-field coupling to the external environment. Summary of the Invention

[0005] One aspect of the present invention provides a method for fabricating a Josephson junction in a superconducting qubit. The method includes: providing a substrate having a protruding structure having a first face and a second face intersecting at an edge; and depositing a first layer of superconducting material on the first face of the substrate material. The method further includes: oxidizing the first layer of superconducting material to form an oxide material layer on a surface of the first layer of superconducting material; and depositing a second layer of superconducting material on the second face of the substrate material. A portion of the second layer contacts a portion of the oxide material layer at or near the edge, such that the portion of the oxide material layer is sandwiched between the portion of the first layer of superconducting material and the portion of the second layer of superconducting material to define a Josephson junction at or near the edge.

[0006] Another aspect of the present invention provides a qubit device. The qubit device includes a substrate having a protruding structure having a first facet and a second facet that intersect at an edge and form an angle therebetween. The qubit device further includes: a first layer of superconducting material deposited on the first facet of the substrate material; and an oxide material layer on the surface of the first layer of superconducting material. The qubit device further includes: a second layer of superconducting material on the second facet of the substrate material. A portion of the second layer contacts a portion of the oxide material layer at or near the edge, such that the portion of the oxide material layer is sandwiched between the portion of the first layer of superconducting material and the portion of the second layer of superconducting material to define a Josephson junction at or near the edge.

[0007] Another aspect of the present invention provides a method for fabricating a Josephson junction in a superconducting qubit. The method includes: providing a substrate; depositing a superconducting material on a surface of the substrate; and depositing a sacrificial material layer on the superconducting material. The method further includes: removing a portion of the sacrificial material layer to expose a portion of the surface of the substrate to define a qubit pocket; and etching the portion of the surface of the substrate to form a protruding shape in the substrate, the protruding shape having a first face and a second face intersecting at an edge. The method further includes: forming the Josephson junction at or near the edge without applying electron beam or beam lithography to connect capacitor pads to the Josephson junction to a plurality of buses.

[0008] In one embodiment, forming the Josephson junction includes: depositing a first layer of superconducting material on a first surface of the protruding shape in the substrate material; oxidizing the first layer of superconducting material to form an oxide material layer on the surface of the first layer of superconducting material; and depositing a second layer of superconducting material on a second surface of the protruding shape in the substrate material. A portion of the second layer contacts a portion of the oxide material layer at or near the edge, such that the portion of the oxide material layer is sandwiched between the portion of the first layer of superconducting material and the portion of the second layer of superconducting material to define the Josephson junction at or near the edge.

[0009] In one embodiment, the method further includes: using photolithography to define the plurality of buses and the plurality of readout resonators; removing a portion of the superconducting material to form the plurality of buses and readout resonators on the substrate. In one embodiment, removing a portion of the sacrificial material layer includes: applying a single photolithography step. Attached Figure Description

[0010] The functionality of the relevant elements of this disclosure, as well as the economy of combination and manufacture of the components, will become more apparent when the following description and appended claims are considered in conjunction with the accompanying drawings, all of which form part of this specification, wherein the same reference numerals denote corresponding components in the various drawings. However, it should be clearly understood that the drawings are for illustrative and descriptive purposes only and are not intended to be limiting of the invention.

[0011] Figure 1 This is a schematic side view of a substrate having a superconducting material layer deposited thereon, according to an embodiment of the present invention;

[0012] Figure 2A A schematic top view of a substrate according to an embodiment of the present invention is shown, on which a superconducting material layer is deposited and some portions of the superconducting material layer are removed;

[0013] Figure 2B It is the edge of the substrate according to an embodiment of the present invention Figure 2A The cross-sectional view of line 2B-2B shown shows a superconducting material layer deposited on the substrate;

[0014] Figure 3A A schematic top view of a substrate according to an embodiment of the present invention is shown, on which a superconducting material layer and a sacrificial material layer are deposited, wherein a portion of the sacrificial material layer is removed to expose a portion of the surface of the substrate 100 to define a qubit pocket;

[0015] Figure 3B It is the edge of the substrate according to an embodiment of the present invention Figure 3A The cross-sectional view shown by line 3B-3B shows a superconducting material layer and a sacrificial material layer deposited on the substrate, wherein a portion of the sacrificial material layer is removed to expose a portion of the substrate surface to define a qubit pocket;

[0016] Figure 4A A schematic top view of a substrate according to an embodiment of the invention is shown, wherein an exposed portion of the surface of the substrate defines a qubit bag and defines the undercut range when the exposed portion is etched;

[0017] Figure 4B It is the edge of the substrate according to an embodiment of the present invention Figure 4A The cross-sectional view of line 4B-4B shown, wherein the exposed portion of the surface of the substrate defines the qubit bag and the undercut range when the exposed portion is etched;

[0018] Figure 4C It is the edge of the substrate according to an embodiment of the present invention Figure 4A The cross-sectional view of line 4C-4C shown indicates that the exposed portion of the substrate surface defines the qubit bag and the degree of undercut during etching of the exposed portion;

[0019] Figure 5 This is a cross-sectional view of a substrate with a wedge-shaped structure according to an embodiment of the present invention;

[0020] Figure 6A This is a top view of a qubit device formed including a Josephson junction (JJ), a bus, and a resonator according to an embodiment of the present invention;

[0021] Figure 6B It is according to an embodiment of the present invention. Figure 6A The cross-sectional view of the qubit device formed by lines 6B-6B shown; and

[0022] Figure 6C It is according to an embodiment of the present invention. Figure 6A The cross-sectional view of the qubit device formed by line 6C-6C is shown. Detailed Implementation

[0023] In one embodiment, this document provides a method for fabricating a Josephson junction for a superconducting qubit device. In one embodiment, the method includes: providing a substrate 100 and depositing a superconducting material layer 102 on a surface 100S of the substrate 100. Figure 1 This is a schematic side view of a substrate 100 having a superconducting material layer 102 deposited thereon, according to an embodiment of the present invention. In one embodiment, the substrate 100 may be any nonconducting material, including but not limited to silicon (Si) and sapphire. In one embodiment, the superconducting material 102 may be any superconducting material, including but not limited to niobium (Nb), aluminum (Al), etc.

[0024] The method further includes removing a portion of the superconducting material 102 to expose a first portion 100A of the surface 100S of the substrate 100 to form a plurality of buses 202 and a readout resonator 204 on the substrate. In one embodiment, the removal of a portion of the superconducting material layer 102 can be performed by etching (e.g., using chemical etching such as acid etching) a portion of the superconducting material layer 102.

[0025] Figure 2A A schematic top view of a substrate 100 according to an embodiment of the present invention is shown, on which a superconducting material layer 102 is deposited, and some portions of the superconducting material layer 102 are removed. Figure 2B It is the edge of the substrate according to an embodiment of the present invention Figure 2A The cross-sectional view shown by line 2B-2B shows a superconducting material layer 102 deposited on the substrate.

[0026] The method further includes depositing a sacrificial material layer 302 on the superconducting material layer 102 and on an exposed portion 100A of the surface 100S of the substrate 100. The method also includes applying electron beam or beam lithography to expose a portion of the sacrificial material layer 302; and removing the exposed portion of the sacrificial material layer 302 to expose a portion 100B of the surface 100S of the substrate 100 to define a qubit pocket 304. In one embodiment, removing the exposed portion of the sacrificial material layer 302 includes applying a single lithography step.

[0027] Figure 3A A schematic top view of a substrate 100 according to an embodiment of the present invention is shown, on which a superconducting material layer 102 and a sacrificial material layer 302 are deposited, wherein a portion of the sacrificial material layer 302 is removed to expose a portion 100B of the surface 100S of the substrate 100 to define a qubit pocket 304. Figure 3B It is the edge of the substrate 100 according to an embodiment of the present invention. Figure 3A The cross-sectional view shown by line 3B-3B shows a superconducting material layer 102 and a sacrificial material layer 302 deposited on the substrate, wherein a portion of the sacrificial material layer 302 is removed to expose a portion 100B of the surface 100S of the substrate 100 to define a qubit pocket 304.

[0028] In one embodiment, depositing a sacrificial material layer 302 on the superconducting material layer 102 and on the exposed portion 100B of the substrate 100 includes depositing germanium (Ge) on the superconducting material layer 102 and on the exposed portion 100B of the substrate 100.

[0029] like Figure 3A As shown, in one embodiment, the exposed portion 102B of the surface 100 of the substrate 100 defining the bag 304 has two mirror-symmetrical shapes 304A and 304B. Figure 3A As shown, the exposed portion 100B of the surface 100S of the substrate 100 has an H-shaped form. Two mirror-symmetrical shapes 304A and 304B face each other to form a relatively narrow band 304C of the sacrificial material layer 302 between the two mirror-symmetrical shapes 304A and 304B.

[0030] In one embodiment, the method further includes: etching a portion 100B of the surface 100S of the substrate 100 to form a protrusion 402 in the substrate 100 (e.g., Figure 4C and 5 (As shown). In one embodiment, etching portion 100B includes etching using potassium hydroxide (KOH) or tetramethylammonium hydroxide (TMAH).

[0031] Figure 4AA schematic top view of a substrate 100 according to an embodiment of the present invention is shown, wherein an exposed portion 100B of the surface 100S of the substrate 100 defines a qubit pocket 304 and defines an undercut range 404 when the exposed portion 100B is etched. In one embodiment, the undercut range 404 resulting from the etching of the portion 100B is defined by a dashed line, as shown below. Figure 4A As shown.

[0032] Figure 4B It is the edge of the substrate 100 according to an embodiment of the present invention. Figure 4A The cross-sectional view shown is along line 4B-4B, where the exposed portion 100B of the surface 100S of the substrate 100 defines a qubit pocket 304, and defines the undercut range 404 when the exposed portion 100B is etched. Along Figure 4B As shown in the 4B-4B cross section, the sacrificial material layer 302 forms a bridge structure 406 that extends on top of the surface 100S of the substrate 100 and spans the gap 408 formed after etching the portion 100B of the surface 100S of the substrate 100.

[0033] Figure 4C It is the edge of the substrate 100 according to an embodiment of the present invention. Figure 4A The cross-sectional view shown along line 4C-4C shows that the exposed portion 100B of the surface 100S of the substrate 100 defines a qubit pocket 304, and defines the undercut range 404 when the exposed portion 100B is etched. Along Figure 4C As shown in the 4C-4C cross section, the sacrificial material layer 302 forms a bridge structure 406 that extends on top of the surface 100S of the substrate 100 and on top of the protruding structure 402 formed after etching the portion 100B of the surface 100S of the substrate 100.

[0034] In one embodiment, the protrusion 402 may be, for example, wedge-shaped or triangular prism-shaped. Typically, the protrusion 402 has a first face 402A and a second face 402B that meet at an edge 402C. The two faces 402A and 402B define an angle (e.g., an acute angle less than 90 degrees) at the edge 402C. In one embodiment, such as... Figure 4C As shown, the cross-section of the protruding structure along line 4C-4C has a triangular shape. In one embodiment, the first surface 402A and the second surface 402B are formed in the (111) crystal plane of the substrate 100.

[0035] Figure 5This is a cross-sectional view of a substrate illustrating a wedge-shaped structure according to an embodiment of the present invention. In one embodiment, the method further includes depositing a first layer 502 of superconducting material on a first surface 402A of the protrusion 402 in the substrate 100. In one embodiment, the first layer 502 of superconducting material can be deposited using a first vapor deposition method, such as... Figure 5 As shown. In one embodiment, a first layer 502 of superconducting material is also deposited in the first trench 510 and the second trench 512 formed during the etching of the substrate 100.

[0036] The method further includes: after depositing a first layer 502 of superconducting material, oxidizing the first layer 502 of superconducting material to form an oxide material layer 504 on the surface of the first layer 502 of superconducting material. The oxide material layer 504 is formed at a location where the first layer 502 of superconducting material is not in contact with the substrate 100. Specifically, the end 502A of the first layer 502 of superconducting material near the edge 402C is also oxidized, and a portion 504A of the oxide layer 504 is formed on the end 502A of the first layer 502 of superconducting material. In addition, the oxide layer 504 is also formed at the bottom of the trenches 510 and 512 on the top of the first layer 502 of superconducting material.

[0037] The method further includes depositing a second layer 506 of superconducting material on the second surface 402B of the protrusion 402. In one embodiment, the second layer 506 of superconducting material can be deposited using a second evaporation process, such as... Figure 5 As shown. A portion 506A of the second layer 506 of the superconducting material is deposited to contact a portion 504A of the oxide material layer 504 at or near edge 402C, such that a portion of the oxide material layer 504A is sandwiched between a portion 502A of the first layer 502 of the superconducting material and a portion 506A of the second layer 506 of the superconducting material to define a Josephson junction (JJ) at or near edge 402C. In one embodiment, the oxide material layer 504 is selected from the group consisting of alumina and niobium oxide. In one embodiment, the second layer 506 of the superconducting material is also deposited within trenches 510 and 512 on top of the oxide layer 504.

[0038] In one embodiment, the first layer 502 and the second layer 506 of the superconducting material can be derived from the same or different superconducting materials. For example, in one embodiment, both the first layer 502 and the second layer 506 of the superconducting material can be aluminum layers. In another embodiment, the first layer 502 of the superconducting material can be an aluminum layer, and the second layer of the superconducting material can be a niobium layer. Furthermore, the first layer 502 and / or the second layer 506 of the superconducting material can be the same as or different from the superconducting material layer 102.

[0039] The method also includes removing the remaining sacrificial material layer (e.g., germanium) 302 to form a Josephson junction (JJ) and a qubit device 600. Figure 6A This is a top view of a qubit device 600 formed including a Josephson junction (JJ), a bus, and resonators 202 and 204 according to an embodiment of the present invention. Figure 6B It is according to an embodiment of the present invention. Figure 6A The cross-sectional view of the qubit device 600 formed by lines 6B-6B is shown. Figure 6C It is according to an embodiment of the present invention. Figure 6A The cross-sectional view of the qubit device 600 formed by line 6C-6C is shown.

[0040] like Figures 6A-6C As shown, the qubit device 600 includes: a substrate 100 having a protrusion structure 402 having a first surface 402A and a second surface 402B that intersect at an edge 402C and form an angle therebetween. The qubit device 600 also includes a first layer 502 of superconducting material deposited on the first surface 402A of the protrusion structure 402 of the substrate material 100. The qubit device 600 further includes an oxide material layer 504 on the surface of the first superconducting material layer 502. The qubit device 600 also includes a second layer 506 of superconducting material on the second surface 402B of the substrate material. A portion 506A of the second layer 506 of the superconducting material is deposited to contact a portion 504A of the oxide material layer 504 at or near edge 402C, such that a portion 504A of the oxide material layer is sandwiched between a portion 502A of the first layer 502 of the superconducting material and a portion 506A of the second layer 506 of the superconducting material to define a Josephson junction (JJ) at or near edge 402C.

[0041] In one embodiment, a first capacitor pad 602, also defined by a first layer 502 and a second layer 506 of superconducting material deposited in the first trench 510, is electrically connected to a Josephson junction (JJ), as shown below. Figure 6A and 6B As shown. A first layer 502 and a second layer 506 of superconducting material, also deposited in the second trench 512, define a second capacitor pad 604 for electrical connection to a Josephson junction (JJ), as... Figure 6A and 6BAs shown. In one embodiment, the Josephson junction (JJ) is formed at or near edge 402C without using electron beam or beam lithography to connect capacitor pads 602 and 604 to the Josephson junction (JJ) and to the plurality of buses 202 and / or the plurality of sense resonators 204. As described in the preceding paragraph, lithography is used to define the plurality of buses 202 and the plurality of sense resonators 204, and portions of the superconducting material layer 102 are removed to form the plurality of buses 202 and sense resonators 204 on the substrate 100. The gaps between the first capacitor pad 602 and the plurality of buses 202 and sense resonators 204, and the gaps between the second capacitor pad 604 and the plurality of buses 202 and sense resonators 204, define coupling capacitors to couple microwave energy to the Josephson junction (JJ).

[0042] In conventional methods, ion milling is used to open up the naturally formed oxide on the capacitor pad material in order to attach the Josephson junction to the capacitor pad material. In conventional methods, this ion milling step is typically performed before junction metal deposition and in situ. Conversely, in some embodiments of the present invention, capacitor pads 602 and 604, as well as the Josephson junction (JJ) of the qubits, are formed in the same step. As a result, it is not necessary to use ion milling to open up the naturally formed oxide on the capacitor pad material to attach the Josephson junction to the capacitor pads. In practice, the ion milling step can damage the substrate 100 (e.g., silicon) in the exposed region, and thus negatively affect coherence. Therefore, by using the method according to some embodiments of the present invention, this problem can be avoided, and this challenge can be overcome.

[0043] Furthermore, the method according to some embodiments of the invention allows for the fabrication of a qubit device 600 that substantially reduces far-field and near-field coupling with the external environment. Moreover, the overall size of the resulting qubit device 600 is also reduced, thereby providing a compact qubit device that reduces losses and allows for the assembly of 2D lattice components with symmetry of qubits.

[0044] Various embodiments of the invention have been described for illustrative purposes, but are not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen to best explain the principles of the embodiments, their practical application, or technical improvements to technologies found in the market, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A method for fabricating a Josephson junction in a superconducting qubit, comprising: A substrate is provided with a protruding structure having a wedge shape or a triangular prism shape, the protruding structure having a first face and a second face that intersect at an edge and form an acute angle therebetween, wherein the first face and the second face are formed in the crystal plane of the substrate; A first layer of superconducting material is deposited on the first surface of the substrate material; Oxidize the first layer of the superconducting material to form an oxide material layer on the surface of the first layer of the superconducting material; and A second layer of the superconducting material is deposited on the second surface of the substrate material, wherein a portion of the second layer contacts a portion of the oxide material layer at or near the edge, such that the portion of the oxide material layer is sandwiched between a portion of the first layer of the superconducting material and the portion of the second layer of the superconducting material to define a Josephson junction at or near the edge.

2. The method according to claim 1, further comprising: Deposit a superconducting material on the surface of the substrate; as well as A portion of the superconducting material is removed to expose a first portion of the surface of the substrate, in order to form a plurality of buses and readout resonators on the substrate.

3. The method according to claim 2, further comprising: A sacrificial material layer is deposited on the superconducting material and on the exposed first portion of the surface of the substrate; Electron beam or beam lithography is used to expose a portion of the sacrificial material layer; as well as The exposed portion of the sacrificial material layer is removed to expose a second portion of the surface of the substrate, thereby defining a qubit pocket.

4. The method of claim 3, wherein, Depositing the sacrificial material layer on the superconducting material and on the exposed first portion of the substrate includes depositing germanium (Ge) on the superconducting material and on the exposed first portion of the substrate.

5. The method according to claim 3, wherein, The exposed second portion of the surface of the substrate has two mirror-symmetrical shapes.

6. The method according to claim 5, wherein, The exposed second portion of the surface of the substrate has an H-shaped form.

7. The method according to claim 5, wherein, The two mirror-symmetrical shapes of the exposed second portion of the surface of the substrate are separated at the midpoint of the two mirror-symmetrical shapes by a narrower band of the sacrificial material layer.

8. The method according to claim 3, further comprising: The second portion of the surface of the substrate is etched to form the protrusion structure in the substrate.

9. The method according to claim 8, wherein, Etching the second portion of the surface of the substrate includes etching using potassium hydroxide (KOH) or tetramethylammonium hydroxide (TMAH).

10. The method according to claim 8, further comprising: The remaining sacrificial material layer is removed to form the Josephson junction.

11. The method according to any one of claims 1-10, wherein, The substrate comprises silicon (Si).

12. The method according to any one of claims 1-10, wherein, The superconducting material is selected from the group consisting of aluminum (Al) and niobium (Nb).

13. The method according to any one of claims 1-10, wherein, The oxide material is selected from the group consisting of alumina and niobium oxide.

14. A qubit device, comprising: A substrate having a protruding structure, the protruding structure being wedge-shaped or triangular prism-shaped, the protruding structure having a first face and a second face that intersect at an edge and form an acute angle therebetween, wherein the first face and the second face are formed in the crystal plane of the substrate; A first layer of superconducting material deposited on the first surface of the substrate material; An oxide material layer on the surface of the first layer of the superconducting material; and The second layer of the superconducting material on the second surface of the substrate material. In this embodiment, a portion of the second layer contacts a portion of the oxide material layer at or near the edge, such that the portion of the oxide material layer is sandwiched between a portion of the first layer of the superconducting material and a portion of the second layer of the superconducting material to define a Josephson junction at or near the edge.

15. The qubit device according to claim 14, wherein, The substrate comprises silicon (Si).

16. The qubit device according to any one of claims 14 to 15, wherein, The superconducting material is selected from the group consisting of aluminum (Al) and niobium (Nb).

17. The qubit device according to any one of claims 14 to 15, wherein, The oxide material is selected from the group consisting of alumina and niobium oxide.

18. A method for fabricating a Josephson junction in a superconducting qubit, comprising: Provide substrate; Deposit a superconducting material on the surface of the substrate; A sacrificial material layer is deposited on the superconducting material; A portion of the sacrificial material layer is removed to expose a portion of the surface of the substrate, thereby defining a qubit pocket; Etching a portion of the surface of the substrate to form a protruding structure in the substrate, the protruding structure having a wedge shape or a triangular prism shape, the protruding structure having a first face and a second face that intersect at the edges and form an acute angle therebetween; as well as A Josephson junction is formed at or near the edge without applying electron beam or beam lithography to connect the capacitor pads to the Josephson junction to multiple buses.

19. The method according to claim 18, wherein, Forming the Josephson junction includes: A first layer of superconducting material is deposited on the first surface of the protruding structure in the substrate material; Oxidize the first layer of the superconducting material to form an oxide material layer on the surface of the first layer of the superconducting material; and A second layer of the superconducting material is deposited on the second surface of the protruding structure in the substrate material. Wherein, a portion of the second layer contacts a portion of the oxide material layer at or near the edge, such that the portion of the oxide material layer is sandwiched between a portion of the first layer of the superconducting material and the portion of the second layer of the superconducting material to define the Josephson junction at or near the edge.

20. The method according to any one of claims 18 to 19, further comprising: Photolithography is used to define the plurality of buses and the plurality of readout resonators; A portion of the superconducting material is removed to form the plurality of buses and readout resonators on the substrate.

21. The method according to any one of claims 18 to 19, wherein, Removing a portion of the sacrificial material layer includes applying a single photolithography step.

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