Pixelated silicon drift detector and method of manufacturing the same

Abstract

The application provides a pixel type silicon drift detector, which is composed of an array of pixel units; the pixel unit comprises a middle collecting electrode, a first cathode ring, a second cathode ring, a substrate and a back surface incident window; the middle collecting electrode is an anode and is doped at the top center of the substrate; the first cathode ring and the second cathode ring are cathodes and are doped at the top of the substrate; the first cathode ring and the second cathode ring are distributed around the middle collecting electrode in opposite directions; the electrode of the back surface incident window is a cathode and is doped at the bottom of the substrate; the anode and the cathode are both coated with an aluminum film; the first cathode rings between each pixel unit are connected, and the second cathode rings between each pixel unit are connected. The detector provided by the application has small anode capacitance and low power consumption, can measure x-rays between 0.5 and 15 keV, has the characteristics of several microseconds of time resolution and fast reading, has no dead zone, and has good detector quantum efficiency for low-energy photons.

Description

Technical Field

[0001] This invention belongs to the field of radiation-resistant detector technology, and relates to a pixel-type silicon drift detector and its fabrication method. Background Technology

[0002] Studying high-energy radiation from celestial bodies is one of the most powerful methods for acquiring and understanding the underlying mechanisms of the most dynamic and violent phenomena in the universe. Currently, mature detectors and optical techniques detect X-rays in the range of 0.5–10 keV. Under extreme gravitational, density, or magnetic field conditions, probing the spectral and timing characteristics of radiation at these energies is the most direct research approach. In recent years, the need for high-sensitivity spectral and temporal resolution has spurred research and development projects focused on innovative, rapid, pixelated detectors. Indeed, when imaging X-rays, the size of the optical point spread function (PSF) is typically in the range of 1 mm or smaller. Where imaging is not the primary scientific objective, the ideal pixel size is as small as the pixel size required for PSF oversampling, but with minimal charge loss and power consumption by reducing the number of required electronic readout channels. Within this energy range, silicon is likely the most suitable detector material due to its quantum efficiency and advanced fabrication techniques.

[0003] Various large-pixel detectors have been proposed as focal plane array sensors for studying the X-ray spectra of celestial objects. The widely used Si-PIN has significant advantages in X-ray detection efficiency and effective area. However, its performance is limited by the anode capacitance, making it unsuitable for low-energy resolution detection. Similarly, charge-coupled devices (CCDs) with large pixel areas face the same problem. Furthermore, since CCDs are integrated imaging detectors, they are unsuitable for detecting the spectral and temporal information of high-rate photons, failing to meet the requirements of astrophysical research. In recent years, p-channel field-effect transistors (DePFETs) have been developed and manufactured. When frame rates of around 10 kHz are required, DePFETs have prominent applications in space imaging and high-resolution X-ray spectroscopy. All pixels of a DePFET are read out simultaneously at rates of several megahertz, but high-speed readout requires high power consumption and heat dissipation. Summary of the Invention

[0004] To achieve the above objectives, the present invention provides a pixel-type silicon drift detector and its fabrication method, which solves the problems of large anode capacitance and high power consumption in existing pixel detectors.

[0005] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is a pixel-type silicon drift detector, which is composed of a pixel unit array; the pixel unit includes a central collecting electrode, a first cathode ring, a second cathode ring, a substrate, and a reverse incident window; the central collecting electrode is an anode, doped at the center of the top of the substrate; the first cathode ring and the second cathode ring are cathodes, doped at the top of the substrate, and the first cathode ring and the second cathode ring are distributed around the central collecting electrode in opposite directions; the electrode of the reverse incident window is a cathode, doped at the bottom of the substrate; both the anode and the cathode are coated with an aluminum film; the first cathode rings between each pixel unit are connected, and the second cathode rings are connected.

[0006] Furthermore, the area of ​​the intermediate collecting electrode is 2500-10000 square micrometers and the thickness is 1 micrometer; the width of the first cathode ring and the second cathode ring is 10-50 micrometers and the thickness is 1 micrometer; the thickness of the substrate is 300-500 micrometers; and the thickness of the reverse incident window is 1 micrometer.

[0007] Furthermore, the intermediate collecting electrode is doped with boron at a concentration of 10. 18 -10 19 cm -3 The first cathode ring, the second cathode ring, and the reverse incident window are doped with phosphorus at a concentration of 10. 18 -10 19 cm -3 The substrate is n-type silicon with a doping concentration of 10. 11 -10 14 cm -3 .

[0008] This invention also provides a method for fabricating a pixel-type silicon drift detector, comprising the following steps:

[0009] Step 1: Gouge oxidation of silicon wafers;

[0010] Step 2: Ion implantation etching of the first cathode ring, the second cathode ring, and the reverse incident window;

[0011] Step 3: p of the first cathode ring, the second cathode ring, and the reverse incident window + Type Ion Implantation;

[0012] Step 4: Ion implantation etching of the intermediate collection electrode and ion implantation of the intermediate collection electrode;

[0013] Step 5: Annealing after injection;

[0014] Step 6: Full etching of the oxide layer in the implantation areas on both sides;

[0015] Step 7: Fabrication of front and back electrodes;

[0016] Step 8: Rapid annealing.

[0017] Furthermore, in step 1, the oxidation furnace needs to be cleaned before the getter oxidation process until all impurity ions are completely removed; the gases used in the getter oxidation process are: high-purity oxygen, trichloroethane, and high-purity nitrogen.

[0018] Furthermore, step 2 includes the following steps:

[0019] Step 21: Perform homogenization on the silicon wafer after getter oxidation;

[0020] Step 22: Perform photolithography, including exposure, development, cleaning, and drying;

[0021] Step 23: Clean the silicon wafer after photolithography;

[0022] Step S23 specifically involves: after etching, the silicon wafer is placed in a cleaning cabinet and repeatedly cleaned with deionized water; the photoresist stripping solution is heated to a suitable temperature and kept constant; the cleaned silicon wafer is then placed in the photoresist stripping solution; after the photoresist is stripped, it is also thoroughly cleaned with deionized water, and then acid washing is performed.

[0023] Furthermore, the specific method of step 3 is as follows: first, the element material to be injected is gasified, then introduced into the ion source chamber, and then the gaseous particles of the element are excited by electrons to become ions. The ions to be injected are selected by the analyzer, then accelerated in an accelerator with a set appropriate voltage, and finally injected into the target chamber after being focused by a four-stage lens.

[0024] Furthermore, the annealing in step 5 is thermal annealing. The specific method is as follows: before annealing, the photoresist must be removed. After removing the photoresist, the wafer must be repeatedly cleaned in deionized water, then acid-washed in an acid pickling solution. After acid washing, the wafer is cleaned with deionized water. After cleaning, the silicon wafer is placed in the annealing furnace. The silicon wafer is annealed under nitrogen protection.

[0025] Furthermore, before fabricating the front and back electrodes in step 7, the silicon wafer is first immersed in a hydrofluoric acid solution to etch away the oxide layer in the etched area; then the silicon wafer is placed in a magnetron sputtering furnace for oxide layer removal cleaning; after cleaning, the silicon wafer is placed in a magnetron sputtering furnace, and aluminum is deposited by setting the current, vacuum degree, and argon flow rate.

[0026] After aluminum plating, front-side aluminum etching is performed: the silicon wafer is placed on a spin coater for spin coating, drying, exposure, development, deionized water cleaning, and drying.

[0027] Further, the specific method of step 8 is as follows: place the silicon wafer into a rapid annealing furnace, set the target temperature and heating power; first, purge with nitrogen gas, and adjust the nitrogen gas purging time and flow rate according to the size of the rapid annealing furnace cavity to ensure that all air in the cavity is discharged; then purge with a mixture of nitrogen and hydrogen gas and heat to the target temperature and maintain a constant temperature, then cool down to room temperature, remove the silicon wafer, the annealing is completed, and then package.

[0028] The beneficial effects of this invention are:

[0029] The detector provided by this invention has a small anode capacitance and low power consumption, can measure X-rays between 0.5 and 15 keV, has a time resolution of a few microseconds and fast readout, has no dead zone, and has good detector quantum efficiency for low-energy photons. Attached Figure Description

[0030] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0031] Figure 1 This is a pixel unit structure diagram according to an embodiment of the present invention.

[0032] Figure 2 This is a front view of a pixel unit according to an embodiment of the present invention.

[0033] Figure 3 This is a schematic diagram of the structure of a pixel-type silicon drift detector according to an embodiment of the present invention.

[0034] In the figure, 1. intermediate collecting electrode, 2. first cathode ring, 3. second cathode ring, 4. substrate, 5. reverse incident window. Detailed Implementation

[0035] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0036] This invention provides a pixel-type silicon drift detector composed of a pixel unit array. Each pixel unit includes a central collecting electrode 1, a first cathode ring 2, a second cathode ring 3, a substrate 4, and a reverse incident window 5. The central collecting electrode 1 is the anode, doped at the top center of the substrate 4, with an area of ​​2500-10000 square micrometers and a doping thickness of 1 micrometer, which minimizes the detector's capacitance. The first and second cathode rings 2 and 3 are cathodes, doped at the top of the substrate 4, distributed around the central collecting electrode 1 in opposite directions, with a width of 10-50 micrometers and a doping thickness of 1 micrometer, providing a transverse electric field that facilitates rapid charge collection. The electrode of the reverse incident window 5 is a p-type electrode. + The cathode is doped at the bottom of the substrate 4 with a doping thickness of 1 micrometer; the substrate 4 is n-type silicon, which is a depletion layer with a thickness of 300-500 micrometers. The square pixel array structure is composed of pixel units, with the first cathode rings 2 connected between each pixel unit and the second cathode rings 3 connected between each pixel unit, thereby reducing the power consumption of each unit.

[0037] The intermediate collecting electrode 1 of this invention is surrounded by a first cathode ring 2 and a second cathode ring 3. A voltage applied to the first cathode ring 2 and the second cathode ring 3 generates a transverse electric field that causes electrons to drift to the intermediate collecting electrode 1; at p + Applying voltage to the cathode can deplete substrate 4 and pull charge carriers to drift toward the central collecting electrode 1.

[0038] In some embodiments, the intermediate collecting electrode 1 has the opposite doping type to the first cathode ring 2 and the second cathode ring 3, but with the same order of magnitude of doping concentration; the reverse electrode 5 has the same doping type (both cathode doped) and the same order of magnitude of doping concentration as the first cathode ring 2 and the second cathode ring 3; the substrate 4 has the same doping type (both anode doped) as the intermediate collecting electrode 1, and the material of the substrate 4 is a silicon wafer with a doping concentration of 10. 11 -10 14 cm -3 The doping concentration is much lower than that of the intermediate collecting electrode 1; the doping element of the intermediate collecting electrode 1 is boron, and the doping concentration is 10. 18 -10 19 cm -3 The first cathode ring 2 and the second cathode ring 3 are doped with phosphorus, with a doping concentration of 10. 18 -10 19 cm -3 .

[0039] In some embodiments, both the anode and cathode are coated with an aluminum film, which serves as a contact interconnection.

[0040] Compared to existing pixel detectors, the present invention has a smaller collecting anode, resulting in a smaller collecting capacitance, a time resolution of a few microseconds, and fast readout, while inheriting the superior noise characteristics typical of traditional silicon drift detectors (SDD).

[0041] The fabrication method of the detector of this invention is carried out according to eight process modules, including silicon wafer getter oxidation, ion implantation etching of the first cathode ring 2, the second cathode ring 3 and the reverse incident window 5, and p-etching of the first cathode ring 2, the second cathode ring 3 and the reverse incident window 5. + The fabrication process involves eight sequential steps: ion implantation, ion implantation etching of the intermediate collector electrode 1, ion implantation of the intermediate collector electrode 1, post-implantation annealing, full etching of the oxide layer in the implanted areas on both sides, fabrication of the front and back electrodes, and rapid annealing. These eight steps are performed sequentially to ultimately produce the required detector chip. Defects and errors are minimized in every process operation within each module. The following is a detailed description of the fabrication method:

[0042] Before performing getter oxidation on silicon wafers, the oxidation furnace must be extremely clean, free of any metal ions. This is to prevent these metal impurities from diffusing into the silicon wafer during oxidation, causing defects and increasing leakage current in the pixel array. Therefore, the oxidation furnace must be cleaned multiple times over a long period before oxidation begins, gradually reducing or completely removing impurity ions. After multiple cleanings, the high-resistivity silicon wafer is placed in an oxidation furnace under a nitrogen protective atmosphere, and then subjected to a complex and specialized getter oxidation process to obtain the desired oxide layer thickness. The currently mature getter oxidation process was achieved through numerous oxidation experiments and continuous optimization. Getter oxidation is a unique process technology of this invention, a complex oxidation process involving multiple temperature stages and multiple gases. The getter oxidation process requires high-purity oxygen, TCA (trichloroethane), and high-purity nitrogen. The quality of the silicon wafer after getter oxidation is two to three times higher than before oxidation.

[0043] The silicon wafers required for oxidation are ultrapure, high-resistivity silicon wafers with a resistivity of 4 × 10⁻⁶. 3 Ω·cm to 2×10 4 Between Ω·cm, with a diameter of 4 inches (approximately 100mm), and a crystal phase of <100> The thickness is 300μm.

[0044] The getter oxidation of silicon wafers is the starting point for fabricating detector chips and is the most important of all process modules. If the getter oxidation of silicon wafers is not done well, it is meaningless even if there are no defects in the subsequent processes.

[0045] After getter oxidation, p-type oxidation is performed on the first cathode ring 2, the second cathode ring 3, and the reverse incident window 5. +For ion implantation etching, the silicon wafer, after being doped and oxidized, is placed on a spin coater for spin coating. Before spin coating, the spin coater tray is first wiped with alcohol to ensure it is clean. The silicon wafer is then dehydrated and dried in an oven at a suitable and constant temperature. After dehydration and drying, it is cooled to room temperature and then placed back on the tray. Vacuum adsorption is used to prevent the silicon wafer from being thrown out. Optimal spin coater speed, spin coater duration, and resist volume are set. Before resist application, a dehumidifying and adhesion-enhancing agent, hexamethyldisilazane (HMDS), is applied. HMDS dehumidifies the silicon wafer surface and increases the adhesion between the surface and the resist. After spin coating, the silicon wafer is placed on a heated stage for drying. Nitrogen gas is used to blow up the silicon wafer to prevent the photoresist from sticking to the heated stage, causing resist detachment and the adhesion of impurities. The heated stage is set to a suitable drying time and temperature and kept constant. After drying with nitrogen gas, it is cooled to room temperature before photolithography.

[0046] Before exposure, preparations must be made. First, the mercury lamp should be turned on in advance, and after a period of time, the lamp intensity should stabilize, allowing the light to be evenly transmitted onto the stage on which the silicon wafer is placed. Through repeated experiments, the correspondence between light intensity and exposure time must be determined. It cannot be too short, nor too long. If the exposure time is too short, the photoresist will not be exposed enough, resulting in slow or incomplete development. If the exposure time is too long, it is difficult to control the development time, leading to overdevelopment.

[0047] After adjusting the light intensity of the mercury lamp, install the mask and wafer, and vacuum-bond them together. Ensure the mask and wafer are firmly bonded, then position the silicon wafer precisely in the center of the mask. Close the upper and lower masks, applying a vacuum seal. The vacuum level should not be too high to avoid damaging the mask and wafer. Once bonding is complete, set the appropriate exposure time and begin exposure. After exposure, release the vacuum seal, then separate the mask and wafer, remove the wafer, and begin development.

[0048] Development takes place in a developing cabinet. An appropriate amount and ratio of positive photoresist developer is prepared. The development time can be estimated in advance based on the mercury lamp intensity, exposure time, and multiple experimental records. Then, the completion of development is determined based on observed development conditions. Experience shows that if development is incomplete, we can clearly see the photoresist dissolving. Furthermore, during development, the color of the exposed area will change due to variations in thickness. If the color no longer changes, development is complete. After development, the silicon wafer should be repeatedly rinsed with deionized water several times to prevent residual solution from adhering to the exposed and developed areas, which could affect observation and subsequent etching.

[0049] After development, cleaning, and drying, the photoresist is observed under a microscope. If no defects are found in the pixel units and markings, post-baking can proceed. The post-baking temperature should be higher than the pre-baking temperature, and the time should be slightly longer, to ensure the photoresist is sufficiently dense and that the HF etching solution does not penetrate the photoresist. After post-baking, the temperature is allowed to cool to room temperature before etching. A silicon dioxide etching solution with a special composition ratio needs to be prepared according to the etching requirements and other process conditions. Temperature has a significant impact on the etching rate of the etching solution, so the effect of temperature must be considered during etching.

[0050] After etching, the silicon wafer must be placed in a cleaning cabinet and repeatedly rinsed with deionized water several times to prevent residual etching solution from being carried into the photoresist stripping solution and causing further etching and damage to the silicon wafer. Before placing the cleaned silicon wafer into the photoresist stripping solution, the solution must be heated to a suitable temperature and maintained at that temperature for a sufficiently long stripping time to ensure that the photoresist on the silicon wafer is completely removed. After photoresist stripping, the wafer must also be thoroughly rinsed with deionized water before acid washing. The acid washing solution is a mixture of concentrated sulfuric acid and hydrogen peroxide, which has strong oxidizing and dehydrating properties. Therefore, before immersing the wafer in the acid washing solution, it must be repeatedly rinsed with deionized water several times to prevent photoresist stripping solution and large areas of photoresist residue from remaining on the silicon wafer, which could lead to large-area carbonization and permanent adhesion during the acid washing process.

[0051] After the ion implantation etching of the first cathode ring 2, the second cathode ring 3, and the reverse incident window 5 is completed, the next process module is the p-etching of the first cathode ring 2, the second cathode ring 3, and the reverse incident window 5. + Type Ion Implantation. First, the element material to be implanted is gasified and then introduced into the ion source chamber. Then, the gaseous particles of the element are excited and ionized into ions by electrons. The analyzer selects the ions that can be used for implantation, then accelerates them in an accelerator with a set appropriate voltage, and finally focuses them through a four-stage lens before entering the target chamber for implantation.

[0052] p of the first cathode ring 2, the second cathode ring 3, and the reverse incident window 5 + After the ion implantation is completed, the intermediate collection electrode 1 needs to be etched by ion implantation. The steps are similar to those before. After etching, the intermediate collection electrode 1 is implanted by ion.

[0053] After ion implantation, the intermediate collecting electrode 1 undergoes thermal annealing. Ion implantation forcibly injects the ions to be doped into the silicon wafer, causing lattice damage and disrupting the silicon wafer's crystal structure, resulting in numerous defects. Furthermore, due to lattice damage, the injected impurity atoms are not positioned at their substituted sites. Therefore, thermal annealing is necessary to repair the lattice and allow the doped impurity atoms to occupy their substituted sites for electrical activation. Before annealing, the photoresist must be removed. Because the properties and density of the photoresist are significantly altered after implantation, this removal process takes longer than the removal after etching. After removal, the wafer is repeatedly rinsed in deionized water and then acid-washed in a freshly prepared pickling solution. After acid washing, it is rinsed several times with deionized water. Before placing the silicon wafer into the annealing furnace, the furnace must be cleaned multiple times. The annealing process must be carried out under nitrogen protection.

[0054] Full etching of the oxide layer in both front and back implantation areas involves etching down to the areas where electrodes and interconnects will be formed. The silicon wafer is placed on a spin coater for spin coating, drying, exposure, and development. After development, it is repeatedly rinsed in deionized water, then dried and observed under a microscope. If no defects are found during development, post-baking and etching can proceed. This etching is a full etching, so it is crucial to ensure that the silicon dioxide in the developed areas is completely etched away. After etching, deionized water rinsing, resist removal, deionized water rinsing, and acid washing are performed. After acid washing, it is rinsed several times in deionized water, placed in a spin dryer, and then rinsed and dried again in preparation for the next process.

[0055] Before electrode plating, the silicon wafer is first immersed in a very diluted hydrofluoric acid solution for a very short time to etch away the oxide layer in the etched areas. Because the etched areas have been completely etched after all the previous processes, the single-crystal silicon is directly exposed to the air, causing the single-crystal silicon on the surface of the etched areas to oxidize, forming a very thin layer of silicon oxide. To ensure good contact between the aluminum plated during the electrode plating process and the single-crystal silicon, and to minimize contact resistance, the silicon wafer is then placed in a magnetron sputtering furnace for oxide layer removal cleaning. After cleaning, the silicon wafer is placed in the magnetron sputtering furnace, and aluminum plating is performed by setting parameters such as current, vacuum level, and argon flow rate.

[0056] Perform front-side aluminum etching. Place the silicon wafer on a spin coater for spin coating, drying, exposure, development, deionized water rinsing, drying, and then observe under a microscope. After drying and cooling to room temperature, immerse the silicon wafer in the aluminum etching solution, observe the reaction phenomena, control the etching time, and carefully observe the process of the etching solution changing from clear to cloudy and then back to clear. The aluminum etching solution must be heated to a suitable temperature. After etching, perform resist removal and deionized water rinsing to ensure thorough cleaning. Because it is metallic aluminum, this etching process does not include acid washing; the cleanliness of the silicon wafer can only be ensured through sufficient resist removal time and deionized water rinsing.

[0057] The silicon wafer is placed in a rapid annealing furnace, and the target temperature and heating power are set. Nitrogen gas is first introduced for a relatively long time; the duration and flow rate are adjusted according to the size of the furnace cavity to ensure all air is expelled. Then, a mixture of nitrogen and hydrogen is introduced for further heating until the target temperature is reached and maintained at that temperature for a period. Afterward, the temperature is lowered to room temperature, the silicon wafer is removed, and the annealing process is complete. The wafer is then packaged. This annealing process primarily aims to improve the contact between aluminum and silicon, reduce electrode contact resistance, and eliminate surface defects.

[0058] The working principle of the detector in this invention is as follows: Electric fields are applied to the front and back (incident surfaces) of the detector to form electron drift channels. When radiation or particles enter from the incident surface, they interact with the semiconductor material to form electron-hole pairs, which are collected by electrodes through the drift channels. This generates a current, i.e., a pulse signal, that can be measured by external circuitry, thereby achieving the measurement purpose.

[0059] The various embodiments in this specification are described in a related manner. The same or similar parts between the various embodiments can be referred to each other. Each embodiment focuses on describing the differences from other embodiments.

[0060] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention are included within the scope of protection of the present invention.

Claims

1. A pixel-type silicon drift detector, characterized in that, It is composed of a pixel unit array; the pixel unit includes a central collecting electrode (1), a first cathode ring (2), a second cathode ring (3), a substrate (4), and a reverse incident window (5); the central collecting electrode (1) is the anode, doped at the top center of the substrate (4); the first cathode ring (2) and the second cathode ring (3) are the cathodes, doped at the top of the substrate (4), and the first cathode ring (2) and the second cathode ring (3) are distributed around the central collecting electrode (1) in opposite directions; the electrode of the reverse incident window (5) is the cathode, doped at the bottom of the substrate (4); both the anode and the cathode are coated with an aluminum film; the first cathode rings (2) between each pixel unit are connected, and the second cathode rings (3) are connected; The area of ​​the intermediate collecting electrode (1) is 2500-10000 square micrometers and the thickness is 1 micrometer; the width of the first cathode ring (2) and the second cathode ring (3) is 10-50 micrometers and the thickness is 1 micrometer; the thickness of the substrate (4) is 300-500 micrometers; the thickness of the reverse incident window (5) is 1 micrometer. The intermediate collecting electrode (1) is doped with boron at a concentration of 10. 18 -10 19 cm -3 The first cathode ring (2), the second cathode ring (3), and the reverse incident window (5) are doped with phosphorus, and the doping concentration is 10. 18 -10 19 cm -3 The substrate (4) is n-type silicon with a doping concentration of 10. 11 -10 14 cm -3 .

2. The method for fabricating a pixel-type silicon drift detector as described in claim 1, characterized in that, Includes the following steps: Step 1: Gouge oxidation of silicon wafers; Step 2: Ion implantation etching of the first cathode ring (2), the second cathode ring (3), and the reverse incident window (5); Step 3: p of the first cathode ring (2), the second cathode ring (3), and the reverse incident window (5) + Type Ion Implantation; Step 4: Ion implantation etching of intermediate collecting electrode (1) and ion implantation of intermediate collecting electrode (1); Step 5: Annealing after injection; Step 6: Full etching of the oxide layer in the implantation areas on both sides; Step 7: Fabrication of front and back electrodes; Step 8: Rapid annealing.

3. The method for fabricating a pixel-type silicon drift detector according to claim 2, characterized in that, Before the getter oxidation in step 1, the oxidation furnace needs to be cleaned until all impurity ions are completely removed; the gases used in the getter oxidation process are: high-purity oxygen, trichloroethane and high-purity nitrogen.

4. The method for fabricating a pixel-type silicon drift detector according to claim 2, characterized in that, Step 2 includes the following steps: Step 21: Perform homogenization on the silicon wafer after getter oxidation; Step 22: Perform photolithography, including exposure, development, cleaning, and drying; Step 23: Clean the silicon wafer after photolithography; Step 23 specifically involves: after etching, the silicon wafer is placed in a cleaning cabinet and repeatedly cleaned with deionized water; the photoresist stripping solution is heated to a suitable temperature and kept constant; the cleaned silicon wafer is then placed in the photoresist stripping solution; after the photoresist is stripped, it is also thoroughly cleaned with deionized water, and then acid washing is performed.

5. The method for fabricating a pixel-type silicon drift detector according to claim 2, characterized in that, The specific method of step 3 is as follows: First, the element material to be injected is gasified, then introduced into the ion source chamber, and then the gaseous particles of the element are excited by electrons to become ions. The ions to be injected are selected by the analyzer, then accelerated in an accelerator with a suitable voltage, and finally injected into the target chamber after being focused by a four-stage lens.

6. The method for fabricating a pixel-type silicon drift detector according to claim 2, characterized in that, In step 5, the annealing is thermal annealing. The specific method is as follows: before annealing, the photoresist must be removed. After removing the photoresist, the wafer must be repeatedly cleaned in deionized water, then acid-washed in an acid pickling solution. After acid washing, the wafer is cleaned with deionized water. After cleaning, the silicon wafer is placed in the annealing furnace. The silicon wafer is annealed under nitrogen protection.

7. The method for fabricating a pixel-type silicon drift detector according to claim 2, characterized in that, Before fabricating the front and back electrodes in step 7, the silicon wafer is first immersed in hydrofluoric acid solution to etch away the oxide layer in the etched area; then the silicon wafer is placed in a magnetron sputtering furnace for oxide layer removal cleaning; after cleaning, the silicon wafer is placed in a magnetron sputtering furnace, and aluminum is deposited by setting the current, vacuum degree, and argon flow rate. After aluminum plating, front-side aluminum etching is performed: the silicon wafer is placed on a spin coater for spin coating, drying, exposure, development, deionized water cleaning, and drying.

8. The method for fabricating a pixel-type silicon drift detector according to claim 2, characterized in that, The specific method of step 8 is as follows: place the silicon wafer into a rapid annealing furnace, set the target temperature and heating power; first, purge with nitrogen, and adjust the nitrogen purging time and flow rate according to the size of the rapid annealing furnace cavity to ensure that all air in the cavity is discharged; then purge with a mixture of nitrogen and hydrogen and heat to the target temperature and maintain a constant temperature, then cool down to room temperature, remove the silicon wafer, the annealing is completed, and then package.

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