A non-volatile storage unit based on threshold switch and its operation method

Abstract

The present invention discloses a non-volatile memory cell based on a threshold switch and an operation method thereof, belonging to the field of micro-nanoelectronic technology. The non-volatile memory cell comprises a first metal electrode layer, a threshold switch layer, and a second metal electrode layer stacked in sequence, the threshold switch layer comprises a chalcogenide semiconductor material, and the threshold voltage of the threshold switch layer can be switched between an initial threshold voltage and a high threshold voltage under the operation of an electrical signal. The memory cell realizes the storage of information based on the controllable threshold change of the threshold switch. The threshold switch has the advantages of nanosecond switching speed, good miniaturization and easy three-dimensional stacking. The threshold switch memory cell realized also has the above advantages, and the storage density is greatly improved on the basis of matching the DRAM access speed. At the same time, the non-volatile memory cell based on the threshold switch has a low process cost for preparation and is compatible with the CMOS process, which is conducive to the large-scale production of the memory cell.

Description

Technical Field

[0001] The present invention relates to the field of micro-nanoelectronic technology, and in particular to a non-volatile storage unit based on a threshold switch and an operation method thereof. Background Art

[0002] Dynamic Random Access Memory (DRAM) has been used as the main memory of computer storage architecture for decades due to its advantages in speed and storage density. However, as the technology node enters 20nm, DRAM is limited by the reduction of capacitance and increase of transistor leakage current caused by size miniaturization, and has approached the physical limit of size miniaturization. In addition, the complex process and high cost required for further miniaturization of DRAM have also led to the gradual saturation of the cost benefits brought by its miniaturization, forming barriers in physical size and cost, resulting in a "miniaturization wall".

[0003] To this end, it is necessary to achieve a new type of memory with a smaller process size on the basis of matching the DRAM access speed. Among the current mainstream new memories based on the resistance change mechanism, the read and write speeds of Resistive Random Access Memory (RRAM) and Phase Change Memory (PCM) are difficult to match DRAM because the storage unit must undergo a non-volatile structural change during the erase and write process; and the magnetic random access memory based on spin torque transfer (STT-MRAM) has advantages in read and write speed, but has disadvantages in scalability, storage density and cost, and is considered to be more suitable for static random access memory (SRAM) application scenarios, while ferroelectric random access memory (FeRAM) also faces serious size miniaturization problems. Summary of the invention

[0004] In order to achieve miniaturization and conversion speed sufficient to match DRAM, an embodiment of the present invention provides a non-volatile storage unit based on threshold switches. The technical solution is as follows:

[0005] The nonvolatile memory cell includes a first metal electrode layer, a threshold switch layer, and a second metal electrode layer stacked in sequence, wherein the threshold switch layer contains a chalcogenide semiconductor material, and the threshold voltage of the threshold switch layer can be switched between an initial threshold voltage and a high threshold voltage under the operation of an electrical signal.

[0006] Furthermore, the threshold switch layer is a single-layer structure.

[0007] Furthermore, the threshold switch layer is a multilayer structure, the threshold switch layer is an asymmetric multilayer structure, the threshold switch layer includes m first sublayers and m second sublayers that are periodically alternately stacked, m≥1, and the sulfur-based semiconductor material of the first sublayer is different from the sulfur-based semiconductor material of the second sublayer.

[0008] Furthermore, the threshold switch layer is a multi-layer structure, and the sulfur-based semiconductor material of the first sub-layer and the sulfur-based semiconductor material of the second sub-layer have different constituent elements, or the sulfur-based semiconductor material of the first sub-layer and the sulfur-based semiconductor material of the second sub-layer have the same constituent elements but different atomic percentages of each element.

[0009] Furthermore, the chalcogenide semiconductor material is selected from SiTe x ,CTe x ,BTe x , Gete x 、AlTe x ,GeSb x 、BiTe x 、AsTe x SnTe x MgTe x ,GeSe x , SbSe x 、BiSe x 、AsSe x ,GeS x 、GaS x At least one of, or the chalcogenide semiconductor material is selected from doped SiTe x ,CTe x ,BTe x , Gete x 、AlTe x ,GeSb x 、BiTe x 、AsTe x SnTe x MgTe x ,GeSe x , SbSe x 、BiSe x 、AsSe x ,GeS x 、GaS x At least one of the doping elements is selected from at least one of N, Sb, Si, and C.

[0010] On the other hand, an embodiment of the present invention further provides an operation method of a non-volatile storage unit based on a threshold switch, wherein the operation method includes an erase operation, specifically:

[0011] When the threshold voltage of the threshold switching layer is at the initial threshold voltage, a first scanning operation is performed on the non-volatile memory cell to switch the threshold voltage of the threshold switching layer from the initial threshold voltage to a high threshold voltage, the first scanning operation and the second scanning operation have opposite electrical properties, the voltage amplitude of the first scanning operation is higher than the initial threshold voltage, and the second scanning operation is an initial operation for obtaining the initial threshold voltage of the threshold switching layer.

[0012] Furthermore, the operation method also includes a write operation, specifically:

[0013] When the threshold voltage of the threshold switching layer is at the high threshold voltage, a third scanning operation is performed on the non-volatile memory cell to switch the threshold voltage of the threshold switching layer from the high threshold voltage to the initial threshold voltage, the amplitude of the third scanning operation is higher than the high threshold voltage, and the third scanning operation has the same electrical properties as the second scanning operation.

[0014] Furthermore, the operation method also includes a read operation, specifically:

[0015] A fourth scan operation is performed on the nonvolatile memory cell, the voltage of the fourth scan operation being between an initial threshold voltage and a high threshold voltage.

[0016] Furthermore, the first scanning operation is a DC scan or a pulse scan, the waveform of the pulse scan includes a square wave, a triangle wave and a trapezoidal wave, the absolute value of the DC scanning range of the first scanning operation or the absolute value of the pulse scanning amplitude is greater than the initial threshold voltage, and the pulse width of the pulse scan is greater than the minimum value for turning on the non-volatile storage unit.

[0017] Furthermore, the third scanning operation is a DC scan or a pulse scan, the waveform of the pulse scan includes a square wave, a triangular wave and a trapezoidal wave, the absolute value of the DC scanning range of the third scanning operation or the absolute value of the pulse scanning amplitude is greater than the high threshold voltage value, and the pulse width of the pulse scan is greater than the minimum value for turning on the non-volatile storage unit.

[0018] The beneficial effects brought about by the technical solution provided by the embodiment of the present invention include at least:

[0019] The present invention provides a non-volatile storage unit based on a threshold switch, which realizes information storage based on the controllable threshold change of the threshold switch. The threshold switch has the advantages of nanosecond switching speed, good miniaturization and easy three-dimensional stacking. The realized new threshold switch storage unit also has the above advantages and is expected to be used in DRAM application scenarios under the technology node less than 20nm, greatly improving the storage density on the basis of matching the DRAM access speed. At the same time, the non-volatile storage unit based on the threshold switch has a low process cost and is compatible with the CMOS process, which is conducive to the large-scale production of the storage unit. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0021] Figure 1 It is a structural schematic diagram of a non-volatile storage unit of the present invention;

[0022] Figure 2 is a schematic structural diagram of another non-volatile storage unit of the present invention;

[0023] Figure 3 is a schematic structural diagram of another non-volatile storage unit of the present invention;

[0024] Figure 4 It is a schematic diagram of the non-volatile storage unit of the present invention realizing the erase operation and the write operation;

[0025] Figure 5 is a voltage-current curve diagram of an erase operation and a write operation of a non-volatile memory cell in Embodiment 1 of the present invention;

[0026] Figure 6 3 is a voltage-current curve diagram of the erase operation and the write operation of the non-volatile memory cell in the second embodiment of the present invention. DETAILED DESCRIPTION

[0027] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0028] The embodiment of the present invention provides a non-volatile storage unit based on a threshold switch. Figure 1 is a schematic diagram of a structure of a non-volatile storage unit based on a threshold switch provided by an embodiment of the present invention, such as Figure 1 As shown, the non-volatile memory cell includes a first metal electrode layer 100, a threshold switch layer 200, and a second metal electrode layer 300 stacked in sequence, the threshold switch layer 200 includes a sulfide semiconductor material, and the threshold voltage of the threshold switch layer 200 can be switched between an initial threshold voltage Vth and a high threshold voltage Vhigh under the operation of an electrical signal.

[0029] The threshold voltage of the threshold switch layer 200 is defined as the "1" state when the initial threshold voltage Vth is defined, and the threshold voltage of the threshold switch layer 200 is defined as the "0" state when the high threshold voltage Vhigh is defined. By switching between the initial threshold voltage Vth and the high threshold voltage Vhigh, the "1" state and the "0" state of the data are represented, and the purpose of storing data is achieved. The storage of information is realized based on the controllable threshold change of the threshold switch. The threshold switch has the advantages of nanosecond switching speed, good miniaturization and easy three-dimensional stacking. The new threshold switch storage unit realized also has the above advantages and is expected to be used in DRAM application scenarios under the technology node of less than 20nm, greatly improving the storage density on the basis of matching the DRAM access speed. At the same time, the non-volatile storage unit based on the threshold switch has a low process cost and is compatible with the CMOS process, which is conducive to the large-scale production of the storage unit.

[0030] In some embodiments, the threshold voltage of the threshold switch layer 200 can be switched between the initial threshold voltage Vth and the high threshold voltage Vhigh by reverse scanning and forward scanning. The specific implementation and principle can refer to the subsequent operation method of the non-volatile memory cell.

[0031] Furthermore, the chalcogenide semiconductor material is selected from SiTe x ,CTe x ,BTe x , Gete x 、AlTe x ,GeSb x 、BiTe x 、AsTe x SnTe x MgTe x ,GeSe x , SbSe x 、BiSe x 、AsSe x ,GeS x 、GaS x At least one of the following, or the chalcogenide semiconductor material is selected from doped SiTe x ,CTe x,BTe x , Gete x 、AlTe x ,GeSb x 、BiTe x 、AsTe x SnTe x MgTe x ,GeSe x , SbSe x 、BiSe x 、AsSe x ,GeS x 、GaS x At least one of the doping elements is selected from at least one of N, Sb, Si, and C.

[0032] In some embodiments, Figure 1 As shown, the threshold switch layer 200 is a single-layer structure.

[0033] In some embodiments, Figure 2 As shown, the threshold switch layer 200 is a multilayer structure, and the threshold switch layer includes m first sublayers 201 and m second sublayers 202 that are periodically and alternately stacked, m≥1, and the sulfur-based semiconductor material of the first sublayer 201 and the sulfur-based semiconductor material of the second sublayer 202 have different constituent elements.

[0034] In some embodiments, Figure 3 As shown, the threshold switch layer 200 is a multi-layer structure, and the threshold switch layer includes n third sub-layers 203 and n fourth sub-layers 204 that are periodically and alternately stacked, n≥1, and the sulfur-based semiconductor material of the third sub-layer 203 and the sulfur-based semiconductor material of the fourth sub-layer 204 have the same constituent elements, but the atomic percentages of each element are different.

[0035] Asymmetric threshold switch layers with different constituent elements or different element ratios have different delocalization / localization processes when turned on / off. For asymmetric structures with only two layers of chalcogenide semiconductor materials (including two types), after forward conduction to obtain the initial threshold voltage, the conductive path and localization ratio change only slightly. After applying a reverse electric field to the device to turn it on and off, the principle of achieving a threshold voltage increment ΔVth (the difference between the initial threshold voltage Vth and the high threshold voltage Vhigh) in each layer is similar to that of a single-layer structure, but due to the difference There are differences in the delocalization / localization process between the same layers. When the two layers are considered separately, there is a deviation between the theoretical next forward conductive paths of each layer, that is, there is a local optimal solution for conduction in each single layer. When taken as a whole, due to the deviation between the theoretical conductive paths of the two layers and the influence of the interface effect between the two layers, the global optimal solution of the conductive path as a whole is different from any single layer, that is, the external field required for the global optimal solution is greater than the sum of the external fields required for the local optimal solutions of the two single layers. Therefore, the asymmetric multilayer structure has a larger threshold voltage increment than the single layer in the next forward conduction. At the same time, the threshold switch layer under alternating stacking is used, and the thickness of each layer is much smaller than that of a single threshold switch layer. The thinner thickness is conducive to the device to produce a larger localization ratio after the negative external field. Under the same thickness of the threshold switch layer, alternating stacking also helps to increase the threshold voltage increment ΔVth.

[0036] Optionally, the first electrode layer and the second electrode layer are both inert electrode materials, and the inert electrode material is at least one of W, TiW, Pt, Au, Ru, Al, TiN, Ta, TaN, IrO2, ITO and IZO.

[0037] An operating method of a non-volatile memory cell based on a threshold switch is applicable to the above non-volatile memory cell. In some embodiments, the operating method includes an initial operation, specifically:

[0038] A second scanning operation is applied to the nonvolatile memory cell to obtain an initial threshold voltage Vth of the threshold switch layer.

[0039] It is defined that when the threshold voltage of the threshold switch layer 200 is the initial threshold voltage Vth state, it is the "1" state of the nonvolatile memory cell, and the second scanning operation is defined as the forward scanning of the nonvolatile memory cell.

[0040] Optionally, the second scanning operation may be a DC scan or a pulse scan.

[0041] It can be understood that the initial operation is used to determine the initial threshold voltage Vth and is only performed once at the beginning and does not need to be performed every time data is stored.

[0042] In some embodiments, the operation method includes an erase (Reset) operation, specifically:

[0043] When the threshold voltage of the threshold switching layer is at the initial threshold voltage Vth, a first scanning operation is performed on the non-volatile memory cell to switch the threshold voltage of the threshold switching layer from the initial threshold voltage Vth to the high threshold voltage Vhigh. The voltage amplitude of the first scanning operation is higher than the initial threshold voltage. The first scanning operation and the second scanning operation have opposite electrical properties. The second scanning operation is an initial operation to obtain the initial threshold voltage Vth of the threshold switching layer.

[0044] When the memory cell is in the "1" state, a first scanning operation is performed on the nonvolatile memory cell, so that the nonvolatile memory cell is turned off after reverse conduction, resulting in a threshold voltage increment ΔVth (ΔVth>0) on the basis of the initial threshold voltage Vth when the memory cell is forward-conducted next time, and the threshold voltage thereof becomes a high threshold voltage Vhigh (Vth+ΔVth). The threshold voltage of the threshold switch layer 200 is defined as the "0" state of the nonvolatile memory cell when the threshold voltage is in the high threshold voltage Vhigh state.

[0045] The threshold switching mechanism can be explained as the delocalization / localization process of electrons in defects causing the formation and breaking of the conductive path. The conductive path of the device has a certain dependence under the action of the same-direction external field, and only part of the defects are localized after the external field is lost. When the threshold voltage of the threshold switching layer is at the initial threshold voltage Vth ("1" state), the first scanning operation and the second scanning operation have opposite electrical properties. The area where the device delocalizes to form a conductive path is different from the forward direction when the reverse electric field is applied, so the reverse electric field will localize the defects that were not localized when the forward conductive path was broken, and will cause the conductive path during the next forward conduction to have a certain deviation from when the reverse electric field is not applied, resulting in the device requiring a larger electric field to conduct under the next forward external field, that is, a threshold voltage increment ΔVth will be generated, so that the threshold voltage of the threshold switching layer switches from the initial threshold voltage Vth to the high threshold voltage Vhigh, and then the non-volatile memory cell changes from the "1" state to the "0" state, completing the erase operation.

[0046] Optionally, the first scanning operation is a DC scanning or a pulse scanning, and the waveform of the pulse scanning includes a square wave, a triangle wave and a trapezoidal wave, and the above waveforms with various amplitudes and rise and fall times are all acceptable. The absolute value of the DC scanning range of the first scanning operation or the absolute value of the pulse scanning amplitude is greater than the initial threshold voltage, and the pulse width of the pulse scanning is greater than the minimum value for turning on the non-volatile memory cell.

[0047] In some embodiments, the operation method further includes a write (Set) operation, specifically:

[0048] When the threshold voltage of the threshold switching layer is at the high threshold voltage Vhigh, a third scanning operation is performed on the non-volatile memory cell to switch the threshold voltage of the threshold switching layer from the high threshold voltage to the initial threshold voltage. The amplitude of the third scanning operation is higher than the high threshold voltage, and the third scanning operation has the same electrical properties as the second scanning operation.

[0049] When the threshold voltage of the threshold switch layer is at a high threshold voltage ("0" state), the amplitude of the third scan operation is higher than the high threshold voltage, so that the device is forward-conducted. After forward conduction, the proportion of defects localized after the external field is lost is close to that without the reverse electric field, so that the threshold voltage of the threshold switch layer switches from the high threshold voltage Vhigh to the initial threshold voltage Vth, and then the non-volatile memory cell changes from the "0" state to the "1" state, completing the write operation.

[0050] Optionally, the third scanning operation is a DC scan or a pulse scan, the waveform of the pulse scan includes a square wave, a triangular wave and a trapezoidal wave, the absolute value of the DC scanning range of the third scanning operation or the absolute value of the pulse scanning amplitude is greater than the high threshold voltage value, and the pulse width of the pulse scan is greater than the minimum value for turning on the non-volatile storage unit.

[0051] Figure 4 Schematic diagram of the memory cell of the present invention implementing the erase operation and the write operation. Figure 4 As shown, a DC scan or a pulse scan is applied to the non-volatile memory cell to obtain the initial threshold voltage Vth of the device, and this state is defined as the "1" state of the memory cell, and the DC or pulse scan is defined as the forward scan of the memory cell; in order to perform an erase operation on the memory cell, a first scan operation (reverse scan) with a polarity opposite to the DC scan or the pulse scan is applied to the non-volatile memory cell, so that the initial threshold voltage Vth of the device increases by a threshold voltage increment ΔVth (ΔVth>0) after the first scan operation is applied, and Vth+ΔVt is defined. h is a high threshold voltage Vhigh, and the high threshold voltage state Vhigh is defined as the "0" state of the storage cell. The above operation is an erase (write "0") operation of the storage cell. When the storage cell is in the "0" state, a third scan operation (forward scan) with a pulse amplitude higher than Vhigh is used to operate the non-volatile storage cell. After the non-volatile storage cell is turned on, the threshold voltage will spontaneously return to the initial threshold voltage Vth, making the non-volatile storage cell in the "1" state. The above operation is a write (write "1") operation of the non-volatile storage cell.

[0052] In some embodiments, the operation method further includes a read operation, specifically:

[0053] A fourth scan operation is performed on the nonvolatile memory cell, the voltage of the fourth scan operation being between the initial threshold voltage and the high threshold voltage.

[0054] When the non-volatile memory cell is in the "1" state, the read voltage can turn on the non-volatile memory cell and read out low resistance. Since the 1 state is the initial threshold voltage state, repeated reading will not change its threshold voltage, and the 1 state can be read repeatedly. When the non-volatile memory cell is in the "0" state, since the read voltage is less than the threshold voltage Vhigh at this time, it cannot turn on the device and change the device state, so the read voltage always reads high resistance, and the 0 state can be read repeatedly. In summary, the read operation of the non-volatile memory cell is a non-destructive read, that is, the memory cell is non-volatile.

[0055] Furthermore, the fourth scanning operation is a pulse scanning, and the pulse width is a minimum pulse width that can turn on the non-volatile memory cell when the non-volatile memory cell is in a "1" state.

[0056] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0057] Example 1

[0058] A non-volatile storage unit based on a threshold switch, the structure of which is as follows Figure 1 As shown, the non-volatile memory cell includes a first metal electrode layer 100, a threshold switch layer 200, and a second metal electrode layer 300 stacked in sequence, wherein the threshold switch layer is a single-layer threshold switch layer GeTex. In order to clearly show the threshold state change of the memory cell, this embodiment adopts the form of DC voltage scanning, focusing on analyzing the write operation and read voltage range of the non-volatile memory cell, and the results are shown in FIG. Figure 5 In this embodiment, the negative electrical characteristics of the device are used to store information. Figure 5 The negative direction of the voltage coordinate in is the positive operation of the non-volatile memory cell, that is, the electrical direction of the first scanning operation is the positive direction of the voltage coordinate, and the electrical direction of the third scanning operation is the negative direction of the voltage coordinate.

[0059] To implement the erase (write "0") operation, a reverse scan (POS 1st in the figure) is applied to the device, which is the reverse first scan operation. Then, a third scan operation (NEG 1st in the figure) is applied to the device, and its threshold voltage is 1.35V, verifying that in this embodiment, the threshold voltage is increased to 1.35V after the second scan operation (POS 1st in the figure).

[0060] After NEG 2nd and NEG 3rd voltage scans, its threshold voltage is about 1.0V, indicating that after the device is turned on by the third scan operation (NEG 1st in the figure), its threshold voltage spontaneously drops to 1.0V, that is, NEG1st realizes the write (write "1") operation of the storage unit. At the same time, NEG 2nd and NEG 3rd voltage scans confirm that the device will stabilize in the "1" state when it is repeatedly turned on, confirming the non-volatility of the device when it is repeatedly read.

[0061] Since the initial threshold voltage is 1.0V, the high threshold voltage is increased to 1.35V, which means that the second scan operation (POS1st) increases the threshold voltage by an increment ΔVth of 0.35V. The voltage range of 1.0V to 1.35V is the read voltage window of the memory cell.

[0062] Example 2

[0063] A non-volatile storage unit based on a threshold switch, the structure of which is as follows Figure 3 As shown, the non-volatile memory cell includes a first metal electrode layer 100, a threshold switch layer 200, and a second metal electrode layer 300 stacked in sequence, the threshold switch layer 200 is a multi-layer structure, and the threshold switch layer includes n third sub-layers 203 and n fourth sub-layers 204 that are periodically and alternately stacked, n≥1, and the sulfur-based semiconductor material of the third sub-layer 203 and the sulfur-based semiconductor material of the fourth sub-layer 204 have the same constituent elements, and the atomic percentages of each element are different.

[0064] Specifically, the threshold switch layer includes a third sublayer 203 and a fourth sublayer 204 that are periodically alternately stacked. The chalcogenide semiconductor material of the third sublayer 203 is GeTex and the chalcogenide semiconductor material of the fourth sublayer 204 is GeTey. The atomic percentages of the elements are different, that is, x is not equal to y. In order to clearly show the threshold state change of the memory cell, this embodiment adopts the form of DC voltage scanning, focusing on analyzing the write operation and read voltage range of the memory cell. The results are shown in FIG. Figure 6 In this embodiment, the negative electrical characteristics of the device are used to store information. Figure 6 The negative direction of the voltage coordinate in is the positive operation of the non-volatile memory cell, that is, the electrical direction of the first scanning operation is the positive direction of the voltage coordinate, and the electrical direction of the third scanning operation is the negative direction of the voltage coordinate.

[0065] like Figure 6 As shown, the device is subjected to a second scan operation (NEG 1st in the figure) to obtain an initial threshold voltage of 1.1V for the threshold switch layer, so that the device is in an initial threshold voltage state. To implement an erase (write "0") operation, a reverse scan (POS 1st in the figure) is applied to the device, which is the first reverse scan operation.

[0066] Then, the device is subjected to a third scan operation (NEG 2nd in the figure), and its threshold voltage reaches 1.62V, verifying that in this embodiment, after the second scan operation (POS 1st in the figure), the threshold voltage increases by an increment of 0.5V ΔVth, and the voltage threshold increases from the initial threshold voltage 1.1V to the range high threshold voltage 1.62V, and 1.1V to 1.62V is the read voltage window of the memory cell. Compared with Example 1, a single threshold switch layer only achieves a threshold voltage increment of 0.35V, while the threshold switch layer GeTex and the threshold switch layer GeTey are alternately stacked to achieve a threshold voltage increment of 0.5V, which is further increased by 0.15V, confirming that the use of such an asymmetric structure is conducive to the realization of the threshold voltage increment.

[0067] After NEG 3rd and NEG 4th voltage scans, its threshold voltage is about 1.1V, indicating that after the device is turned on by the third scan operation (NEG 2nd in the figure), its threshold voltage spontaneously drops to 1.1V, that is, NEG2nd realizes the write (write "1") operation of the storage unit. At the same time, NEG 3rd and NEG 4th voltage scans show that the device will stabilize in the "1" state after repeated turn-on, confirming the non-volatility of the device when repeatedly read.

[0068] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A non-volatile storage unit based on a threshold switch, characterized in that: The non-volatile storage unit comprises: A first metal electrode layer, a threshold switch layer, and a second metal electrode layer are sequentially stacked, wherein the threshold switch layer comprises a chalcogenide semiconductor material, and a threshold voltage of the threshold switch layer can be switched between an initial threshold voltage and a high threshold voltage under the operation of an electrical signal; The threshold switch layer is an asymmetric multilayer structure, and includes m first sublayers and m second sublayers that are periodically and alternately stacked, m≥1, and the sulfide semiconductor material of the first sublayer is different from the sulfide semiconductor material of the second sublayer.

2. The nonvolatile memory cell according to claim 1, wherein: The chalcogenide semiconductor material of the first sublayer and the chalcogenide semiconductor material of the second sublayer have different constituent elements, or the chalcogenide semiconductor material of the first sublayer and the chalcogenide semiconductor material of the second sublayer have the same constituent elements but different atomic percentages of the respective elements.

3. The nonvolatile memory cell according to claim 1, wherein: The chalcogenide semiconductor material is selected from SiTe x ,CTe x ,BTe x , Gete x 、AlTe x ,GeSb x 、BiTe x 、AsTe x SnTe x MgTe x ,GeSe x , SbSe x 、BiSe x 、AsSe x ,GeS x 、GaS x At least one of, or the chalcogenide semiconductor material is selected from doped SiTe x ,CTe x ,BTe x , Gete x 、AlTe x ,GeSb x 、BiTe x 、AsTe x SnTe x MgTe x ,GeSe x , SbSe x 、BiSe x 、AsSe x ,GeS x 、GaS x At least one of the doping elements is selected from at least one of N, Sb, Si, and C.

4. A method for operating a non-volatile storage unit based on a threshold switch, implemented by using the non-volatile storage unit according to any one of claims 1 to 3, characterized in that: The operation method includes an erase operation, specifically: When the threshold voltage of the threshold switch layer is at the initial threshold voltage, a first scanning operation is performed on the non-volatile memory cell to switch the threshold voltage of the threshold switch layer from the initial threshold voltage to a high threshold voltage, the voltage amplitude of the first scanning operation is higher than the initial threshold voltage, the first scanning operation has opposite electrical properties to the second scanning operation, and the second scanning operation is an initial operation for obtaining the initial threshold voltage of the threshold switch layer.

5. The method for operating a non-volatile memory cell according to claim 4, wherein: The operation method also includes a write operation, specifically: When the threshold voltage of the threshold switching layer is at the high threshold voltage, a third scanning operation is performed on the non-volatile memory cell to switch the threshold voltage of the threshold switching layer from the high threshold voltage to the initial threshold voltage, the voltage amplitude of the third scanning operation is higher than the high threshold voltage, and the third scanning operation has the same electrical properties as the second scanning operation.

6. The method for operating a non-volatile memory cell according to claim 4, wherein: The operation method also includes a read operation, specifically: A fourth scan operation is performed on the nonvolatile memory cell, the voltage of the fourth scan operation being between an initial threshold voltage and a high threshold voltage.

7. The method for operating a non-volatile memory cell according to claim 4, wherein: The first scanning operation is a DC scan or a pulse scan, the waveform of the pulse scan includes a square wave, a triangle wave and a trapezoidal wave, the absolute value of the DC scanning range of the first scanning operation or the absolute value of the pulse scanning amplitude is greater than the initial threshold voltage, and the pulse width of the pulse scan is greater than the minimum value for turning on the non-volatile storage unit.

8. The method for operating a non-volatile memory cell according to claim 5, wherein: The third scanning operation is a DC scan or a pulse scan, the waveform of the pulse scan includes a square wave, a triangle wave and a trapezoidal wave, the absolute value of the DC scanning range of the third scanning operation or the absolute value of the pulse scanning amplitude is greater than the high threshold voltage value, and the pulse width of the pulse scan is greater than the minimum value for turning on the non-volatile storage unit.

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