Precise timestamp correction

By designing a processing device in the network interface controller, and using the packet processing pipeline parameters to calculate the time value for timestamp correction, the problem of low event timestamp accuracy is solved, and higher timestamp accuracy and reliability are achieved.

CN115333660BActive Publication Date: 2025-03-18MELLANOX TECHNOLOGIES LTD(IL)
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Patent Information

Application Number
CN202210456106.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2021-05-10
Filing Date
2022-04-27
Publication Date
2025-03-18
Estimated Expiration
2042-04-27

AI Technical Summary

Technical Problem

The prior art is difficult to generate event timestamps with a precision of several nanoseconds in a network interface controller, resulting in uncertainty in event timestamps.

Method used

A processing device is designed, including a processing circuit, a timestamping unit, a register and a timestamp correction processing circuit. By using at least one packet processing pipeline parameters, such as the occupancy rate of the queue or the link speed, the time value is calculated as a correction for the generated timestamp.

Benefits of technology

Improves the accuracy of event timestamps, reduces the delay between timestamp generation and event actual time, and enhances the reliability of timestamps.

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Abstract

The present disclosure relates to accurate timestamp correction. In one embodiment, a processing device includes: a processing circuit for processing an event; a timestamping unit for generating a timestamp for the event; at least one register for storing at least one parameter describing a hardware state of the processing circuit; and a timestamp correction processing circuit for calculating a time value as a correction to the generated timestamp in response to the at least one parameter.
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