Connector detection circuit and connector testing apparatus

Abstract

The application relates to a connector detection circuit and a connector testing device, which belong to the testing field and are connected with a connector, the connector has a plurality of port groups, each port group comprises a plurality of ports, the plurality of ports in the same port group are connected, each port group corresponds to a test voltage, a control circuit controls a switching circuit to be connected with any two adjacent port groups in the plurality of port groups; the switching circuit receives the test voltage output by each port group in the any two adjacent port groups connected with the switching circuit; an analog-digital conversion circuit converts the difference of the test voltage output by each port group in the any two adjacent port groups received by the switching circuit into a digital signal, and provides the digital signal to the control circuit; and the control circuit determines the impedance between the any two adjacent port groups according to the digital signal; the impedance between different ports of the connector is measured, so that the performance of the connector is quantitatively measured.

Description

Technical Field

[0001] This application belongs to the field of testing, and in particular relates to a connector testing circuit and a connector testing device. Background Technology

[0002] Currently, it's impossible to quantitatively test assembled connectors to qualitatively determine their quality, which raises many subsequent acceptance and compensation issues. Furthermore, connectors accumulate surface dirt after a period of use, affecting normal operation and requiring regular cleaning, but targeted cleaning is currently not feasible.

[0003] Therefore, the quantitative measurement of connector performance is an urgent problem to be solved. Summary of the Invention

[0004] The purpose of this application is to provide a connector testing circuit and a connector testing device that can quantitatively measure the performance of a connector.

[0005] This application provides a connector detection circuit. The connector has multiple port groups, each port group includes multiple ports, and the multiple ports in the same port group are connected. Each port group corresponds to a test voltage. The detection circuit includes:

[0006] A control circuit, connected to a switching circuit, is used to control the switching circuit to connect to any two adjacent port groups among the plurality of port groups;

[0007] The switching circuit is connected to the analog-to-digital conversion circuit and is used to receive the test voltage output from each of the two adjacent port groups connected to the switching circuit.

[0008] An analog-to-digital converter circuit, connected to the control circuit, is configured to convert the difference between the test voltages output by each of two adjacent port groups received by the switching circuit into a digital signal, and to provide the digital signal to the control circuit.

[0009] The control circuit is also configured to determine the impedance between two adjacent port groups based on the digital signal.

[0010] In one embodiment, it further includes:

[0011] A current detection circuit, connected to a current source and the connector, is configured to detect the test current supplied by the current source to the connector to output a current sampling signal;

[0012] The control circuit is specifically configured to obtain the impedance between two adjacent port groups based on the digital signal and the current sampling signal.

[0013] In one embodiment, each group of ports includes 2n ports or 1 port, where n is an integer greater than 0.

[0014] In one embodiment, the switching circuit includes a first switching circuit and a second switching circuit connected to the control circuit, both of which are connected to the analog-to-digital conversion circuit.

[0015] The first switching circuit and the second switching circuit are used to connect to different port groups in the two port groups.

[0016] In one embodiment, the second switching circuit includes a second multiplexer and a second capacitor;

[0017] The power supply terminal of the second multiplexer and the first terminal of the second capacitor are connected to the second power supply. The first address terminal and the second address terminal of the second multiplexer are connected to the second control signal input terminal of the second switching circuit. The second terminal of the second capacitor, the enable terminal of the second multiplexer, and the ground terminal of the second multiplexer are connected to the power supply ground. The first analog switch input terminal, the second analog switch input terminal, and the third analog switch input terminal of the second multiplexer are connected to the second test voltage input terminal of the second switching circuit. The analog switch output terminal of the second multiplexer is connected to the second test voltage output terminal of the second switching circuit.

[0018] In one embodiment, at least one of the first switching circuit and the second switching circuit includes a multiplexer and a capacitor. The power supply terminal of the multiplexer and the first terminal of the capacitor are connected to a power supply. The first address terminal and the second address terminal of the multiplexer are connected to the control circuit. The second terminal of the capacitor, the enable terminal of the multiplexer, and the ground terminal of the multiplexer are connected to the power supply ground. The first analog switch input terminal, the second analog switch input terminal, and the third analog switch input terminal of the multiplexer are connected to one of the two port groups. The analog switch output terminal of the multiplexer is connected to the analog-to-digital conversion circuit.

[0019] In one embodiment, the analog-to-digital conversion circuit includes an analog-to-digital conversion chip, a first inductor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, a first resistor, and a second resistor;

[0020] The power supply terminal of the analog-to-digital converter (ADC) chip is connected to the first terminal of the first inductor and the first terminal of the sixth capacitor. The second terminal of the first inductor is connected to the third power supply. The reference source output terminal of the ADC chip is connected to the first terminal of the seventh capacitor. The SPI data output terminal and the SPI clock output terminal of the ADC chip are both connected to the digital signal output terminal of the ADC circuit. The negative input terminal of the ADC chip is connected to the first terminal of the third capacitor, the first terminal of the fourth capacitor, and the first terminal of the first resistor. The positive input terminal of the ADC chip is connected to the first terminal of the fifth capacitor, the second terminal of the fourth capacitor, and the first terminal of the second resistor. The second terminal of the first resistor is connected to the switching circuit to receive the test voltage corresponding to one of the two port groups. The second terminal of the second resistor is connected to the switching circuit to receive the test voltage corresponding to the other port group. The first output terminal and the second output terminal respectively output the test voltages corresponding to the two port groups.

[0021] The reference source input terminal of the analog-to-digital converter chip is connected to a reference voltage, and the ground terminal of the analog-to-digital converter chip, the second terminal of the third capacitor, the second terminal of the fifth capacitor, the second terminal of the sixth capacitor, and the second terminal of the seventh capacitor are all connected to the power supply ground.

[0022] In one embodiment, the control circuitry includes a microprocessor;

[0023] The first general-purpose input / output terminal and the second general-purpose input / output terminal of the microprocessor are connected to a port of the switching circuit.

[0024] The third and fourth general-purpose input / output terminals of the microprocessor are connected to another port of the switching circuit.

[0025] The fifth general-purpose input / output terminal and the sixth general-purpose input / output terminal of the microprocessor are both connected to the analog-to-digital converter circuit;

[0026] The seventh general-purpose input / output terminal and the eighth general-purpose input / output terminal of the microprocessor are both connected to the current detection circuit.

[0027] This application also provides a connector testing device, characterized in that the connector testing device includes the connector detection circuit described above.

[0028] In one embodiment, the device further includes: a current source connected to the connector and configured to provide a test current to the connector; the test current flows sequentially through a plurality of port groups to generate a plurality of voltages; the plurality of port groups correspond one-to-one with the plurality of voltages.

[0029] In one embodiment, the device further includes: a display circuit connected to the control circuit, the control circuit being configured to control the display circuit to display the impedance between two adjacent port groups; or, the device further includes: a voice prompt circuit connected to the control circuit, the control circuit being configured to control the voice prompt to announce the impedance between two adjacent port groups.

[0030] This application embodiment also provides a connector testing device, which includes the connector detection circuit described above.

[0031] The beneficial effects of this invention compared to the prior art are as follows: The switching circuit receives the test voltage output from each of any two adjacent port groups connected to the switching circuit; the analog-to-digital converter converts the difference between the test voltages output from each of the two adjacent port groups received by the switching circuit into a digital signal, which is then used to provide the digital signal to the control circuit; the control circuit determines the impedance between the two adjacent port groups based on the digital signal; thus, impedance measurement between different ports of the connector is achieved, thereby enabling a quantitative measurement of the connector's performance. Simultaneously, it improves the efficiency of connector performance testing, avoids the defect of being unable to reconstruct the actual impedance of the connector due to disassembly, and reduces costs. Attached Figure Description

[0032] To more clearly illustrate the technical inventions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0033] Figure 1 This is a schematic diagram of a connector detection circuit provided in an embodiment of this application;

[0034] Figure 2 A schematic diagram of another structure of the connector detection circuit provided in one embodiment of this application;

[0035] Figure 3 This is a schematic diagram of a switching circuit in a connector detection circuit provided in an embodiment of this application;

[0036] Figure 4 This is an example circuit schematic diagram of a connector detection circuit provided in an embodiment of this application. Detailed Implementation

[0037] To make the technical problems, technical solutions, and beneficial effects to be solved by this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and are not intended to limit the scope of this application.

[0038] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0039] It should be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0040] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0041] The existing connector testing methods involve removing the connectors one by one and measuring the impedance between each port with an impedance tester. This is time-consuming and labor-intensive. Furthermore, since the connectors are disassembled, it is impossible to reconstruct the actual impedance of the connectors. The impedance tester is also expensive and inconvenient to operate.

[0042] Figure 1 A schematic diagram of the connector detection circuit provided in a preferred embodiment of this application is shown. For ease of explanation, only the parts relevant to this embodiment are shown, and are described in detail below:

[0043] The connector 10 has multiple port groups, each port group includes multiple ports, and the multiple ports in the same port group are connected. Each port group corresponds to a test voltage. The connector detection circuit includes a control circuit 13, a switching circuit 14, and an analog-to-digital conversion circuit 16.

[0044] The control circuit 13 is connected to the switching circuit 14 and is used to control the switching circuit 14 to connect to any two adjacent port groups among the multiple port groups.

[0045] The switching circuit 14 is connected to the analog-to-digital conversion circuit 16 and is used to receive the test voltage output from each of any two adjacent port groups connected to the switching circuit.

[0046] The analog-to-digital converter circuit 16, connected to the control circuit 13, is configured to convert the difference between the test voltages output by each of two adjacent port groups received by the switching circuit into a digital signal, and to provide a digital signal to the control circuit.

[0047] The control circuit 13 is also configured to determine the impedance between two adjacent port groups based on the digital signal.

[0048] For example, such as Figure 1 As shown, connector 10 has 6 port groups, each port group including multiple ports. The multiple ports within the same port group are connected as follows: Port group 1 includes port 1, port group 2 includes ports 2 and 3, port group 3 includes ports 4 and 5, port group 4 includes ports 6 and 7, port group 5 includes ports 8 and 9, and port group 6 includes port 10. Port groups 1 through 6 are sequentially adjacent.

[0049] In practice, the impedance can be transmitted to the host computer via a communication circuit (such as a USB communication circuit or a wireless communication circuit).

[0050] The current value of the test current output by the current source 12 can be pre-stored in the control circuit 13. The control circuit 13 obtains the impedance of two adjacent ports in multiple ports based on the digital signal and the current value, which simplifies the circuit.

[0051] like Figure 2 As shown, the connector detection circuit also includes a current detection circuit 17.

[0052] The current detection circuit 17 is connected to the current source 12 and the connector 10, and is configured to detect the test current provided by the current source 12 to the connector 10 to output a current sampling signal; in a specific implementation, the current detection circuit 17 can be a current sampling resistor.

[0053] The control circuit 13 is specifically configured to obtain the impedance between two adjacent port groups based on the digital signal and the current sampling signal.

[0054] Furthermore, the current sampling signal can be obtained by the current detection circuit 17, and the control circuit 13 can obtain the impedance of two adjacent ports in multiple ports based on the digital signal and the current sampling signal, thereby improving the accuracy of impedance detection.

[0055] As an example rather than a limitation, each group of ports includes 2n ports or 1 port, where n is an integer greater than or equal to 1.

[0056] like Figure 3 As shown, the switching circuit 14 includes a first switching circuit 141 and a second switching circuit 142 connected to the control circuit 13. Both the first switching circuit 141 and the second switching circuit 142 are connected to the analog-to-digital conversion circuit 16.

[0057] The first switching circuit 141 and the second switching circuit 142 are used to connect to different port groups in the two port groups.

[0058] Figure 4 An example circuit structure of a connector detection circuit provided in an embodiment of the present invention is shown. For ease of explanation, only the parts related to the embodiment of the present invention are shown, and are described in detail below:

[0059] At least one of the first switching circuit and the second switching circuit includes a multiplexer and a capacitor.

[0060] The first switching circuit 141 includes a first multiplexer U1 and a first capacitor C1.

[0061] The power supply terminal VCC of the first multiplexer U1 and the first terminal of the first capacitor C1 are connected to the first power supply VAA. The first address terminal A and the second address terminal B of the first multiplexer U1 are connected to the control circuit 13. The second terminal of the first capacitor C1, the enable terminal / EN of the first multiplexer U1, and the ground terminal GND of the first multiplexer U1 are connected to the power ground. The first analog switch input terminal X0, the second analog switch input terminal X1, and the third analog switch input terminal X2 of the first multiplexer U1 are connected to one of the two port groups. The analog switch output terminal X of the first multiplexer U1 is connected to the analog-to-digital conversion circuit.

[0062] The second switching circuit 142 includes a second multiplexer U2 and a second capacitor C2.

[0063] The power supply terminal VCC of the second multiplexer U2 and the first terminal of the second capacitor C2 are connected to the second power supply VBB. The first address terminal A and the second address terminal B of the second multiplexer U2 are connected to the control circuit. The second terminal of the second capacitor C2, the enable terminal / EN of the second multiplexer U2 and the ground terminal GND of the second multiplexer U2 are connected to the power ground. The first analog switch input terminal X0, the second analog switch input terminal X1 and the third analog switch input terminal X2 of the second multiplexer U2 are connected to the other port group of the two port groups. The analog switch output terminal X of the second multiplexer U1 is connected to the analog-to-digital conversion circuit.

[0064] By switching the measurement channels using the first multiplexer U1 and the second multiplexer U2, different connector ports can be tested. This enables the voltage output of two adjacent ports from multiple sets of ports, and the circuit is simple and reliable.

[0065] The analog-to-digital conversion circuit 16 includes an analog-to-digital conversion chip U3, a first inductor L1, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, a first resistor R1, and a second resistor R2.

[0066] The power supply terminal VDD of analog-to-digital converter chip U3 is connected to the first terminal of the first inductor L1 and the first terminal of the sixth capacitor C6. The second terminal of the first inductor L1 is connected to the third power supply VCC. The reference source output terminal REFOUT of analog-to-digital converter chip U3 is connected to the first terminal of the seventh capacitor C7. The SPI data output terminal DOUT and the SPI clock output terminal SCLK of analog-to-digital converter chip U3 are connected to the digital signal output terminal of analog-to-digital converter circuit 16. The channel negative input terminal AINN of analog-to-digital converter chip U3 is connected to the first terminal of the third capacitor C3, the first terminal of the fourth capacitor C4, and the first terminal of the first resistor R1. The channel positive input terminal AINP of analog-to-digital converter chip U3 is connected to the first terminal of the fifth capacitor C5 and the second terminal of the fourth capacitor C4. The first end of the second resistor R2 is connected to the first resistor R1, and the second end of the first resistor R1 is connected to the switching circuit (such as the analog switch output terminal X of the second multiplexer U2 in the second switching circuit 142) to receive the test voltage corresponding to one of the two port groups. The second end of the second resistor R2 is connected to the switching circuit (such as the analog switch output terminal X of the first multiplexer U1 in the first switching circuit 141) to receive the test voltage corresponding to the other port group. The reference source input terminal REFIN of the analog-to-digital converter chip U3 is connected to the reference voltage. The ground terminal GND of the analog-to-digital converter chip U3, the second end of the third capacitor C3, the second end of the fifth capacitor C5, the second end of the sixth capacitor C6, and the second end of the seventh capacitor C7 are all connected to the power supply ground. The reference voltage can be provided by a regulated power supply.

[0067] By using the U3 analog-to-digital converter chip to differentially input the voltage of two adjacent ports, the built-in amplifier eliminates the need for external amplification and conditioning circuits. The differential input can directly measure the voltage difference between the two ports and supports measuring both positive and negative voltages. This eliminates the need for additional switches to change polarity, simplifying the switching circuit. The system acquires the voltage difference between two adjacent ports and converts this difference into a digital signal.

[0068] The control circuit 13 includes a microprocessor U4.

[0069] The first general purpose input / output (GPIO) terminal P1.0 and the second general purpose input / output (GPIO) terminal P1.1 of the microprocessor U4 are connected to one port of the switching circuit (such as the first address terminal A and the second address terminal B of the first multiplexer U1). The third general purpose input / output (GPIO) terminal P1.2 and the fourth general purpose input / output (GPIO) terminal P1.3 of the microprocessor U4 are connected to another port of the switching circuit (such as the first address terminal A and the second address terminal B of the second multiplexer U2). The fifth general purpose input / output (GPIO) terminal P1.4 and the sixth general purpose input / output (GPIO) terminal P1.5 of the microprocessor U4 are connected to the analog-to-digital conversion circuit. The seventh general purpose input / output (GPIO) terminal P1.6 and the eighth general purpose input / output (GPIO) terminal P1.7 of the microprocessor U4 are connected to the current sampling signal.

[0070] The following is based on the working principle. Figure 4 Further explanation is provided below:

[0071] Connector 10 has multiple port groups, each port group includes multiple ports, multiple ports in the same port group are connected, and each port group corresponds to a test voltage.

[0072] The current source 12 provides the test current; the test current flows through multiple sets of ports in sequence to generate multiple voltages; the multiple sets of ports correspond one-to-one with the multiple voltages; the current detection circuit 17 detects the test current to output a current sampling signal.

[0073] Control circuit 13 outputs a first control signal from the first general-purpose input / output terminal P1.0 and the second general-purpose input / output terminal P1.1 of microprocessor U4 to the first address terminal A and the second address terminal B of first multiplexer U1; control circuit 13 outputs a second control signal from the third general-purpose input / output terminal P1.2 and the fourth general-purpose input / output terminal P1.3 of microprocessor U4 to the first address terminal A and the second address terminal B of second multiplexer U2.

[0074] The first test voltage and the second test voltage are the voltages of two adjacent ports in a plurality of port groups; the first multiplexer U1 transfers the first test voltage to the positive input terminal AINP of the analog-to-digital converter chip U3 according to the first control signal; for example, the first multiplexer U1 transfers the voltage of port 1 (first test voltage) according to the first control signal "00"; the second multiplexer U2 transfers the second test voltage to the negative input terminal AINN of the analog-to-digital converter chip U3 according to the second control signal; for example, the second multiplexer U2 transfers the voltage of port 2 and the voltage of port 3 (second test voltage) according to the second control signal "00".

[0075] The analog-to-digital converter (ADC) chip U3 converts the difference between the first and second test voltages into a digital signal and outputs it from the SPI data output terminal DOUT and the SPI clock output terminal SCLK of the ADC chip U3 to the fifth general-purpose input / output terminal P1.4 and the sixth general-purpose input / output terminal of the microprocessor U4. The control circuit 13 obtains the impedance of two adjacent ports in multiple sets of ports based on the digital signal and the current sampling signal. For example, the impedance of the first set of ports (port 1) and the second set of ports (port 2 and port 3). Similarly, by outputting different first control signals and different second control signals by the microprocessor U4, the impedance measurement of two adjacent ports of different connectors can be achieved.

[0076] This invention also provides a connector testing device, which includes the connector detection circuit described above.

[0077] In practice, the device also includes a current source connected to the connector and configured to provide test current to the connector; the test current flows sequentially through multiple port groups to generate multiple voltages; each port group corresponds one-to-one with a different voltage. It can be understood that the current source provides a stable current source for each port of the connector.

[0078] By way of example and not limitation, the device may also include: a display circuit connected to a control circuit, the control circuit being used to control the display circuit to display the impedance between two adjacent port groups; or, the device may also include: a voice prompt circuit connected to the control circuit, the control circuit being used to control the voice prompt to announce the impedance between two adjacent port groups.

[0079] This invention relates to a connector with multiple port groups, each port group including multiple ports. The ports within the same port group are connected, and each port group corresponds to a test voltage. A control circuit controls a switching circuit to connect to any two adjacent port groups. The switching circuit receives the test voltage output from each of the two adjacent port groups connected to it. An analog-to-digital converter converts the difference between the test voltages output from each of the two adjacent port groups received by the switching circuit into a digital signal, which is then used to provide the digital signal to the control circuit. The control circuit determines the impedance between the two adjacent port groups based on the digital signal. This enables impedance measurement between different ports of the connector, thereby achieving a quantitative measurement of the connector's performance.

[0080] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0081] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A connector detection circuit, characterized in that, The connector has multiple port groups, each port group including one or more ports, the ports in the same port group are connected, each port group corresponds to a test voltage, and the detection circuit includes: A control circuit, connected to a switching circuit, is used to control the switching circuit to connect to any two adjacent port groups among the plurality of port groups; The switching circuit is connected to the analog-to-digital conversion circuit and is used to receive the test voltage output from each of the two adjacent port groups connected to the switching circuit. An analog-to-digital converter circuit, connected to the control circuit, is configured to convert the difference between the test voltages output by each of two adjacent port groups received by the switching circuit into a digital signal, and to provide the digital signal to the control circuit. The control circuit is also configured to determine the impedance between two adjacent port groups based on the digital signal; The connector detection circuit further includes a current source connected to the connector, the current source being configured to provide a test current to the connector; the test current flows sequentially through multiple port groups to generate multiple test voltages; the multiple port groups correspond one-to-one with the multiple test voltages.

2. The connector detection circuit as described in claim 1, characterized in that, Also includes: A current detection circuit, connected to a current source and the connector, is configured to detect the test current supplied by the current source to the connector to output a current sampling signal; The control circuit is specifically configured to obtain the impedance between two adjacent port groups based on the digital signal and the current sampling signal.

3. The connector detection circuit as described in claim 1, characterized in that, Each group of ports includes 2n ports or 1 port, where n is an integer greater than 0.

4. The connector detection circuit according to claim 1, characterized in that, The switching circuit includes a first switching circuit and a second switching circuit connected to the control circuit, and both the first switching circuit and the second switching circuit are connected to the analog-to-digital conversion circuit. The first switching circuit and the second switching circuit are used to connect to different port groups in the two port groups.

5. The connector detection circuit as described in claim 4, characterized in that, At least one of the first switching circuit and the second switching circuit includes a multiplexer and a capacitor. The power supply terminal of the multiplexer and the first terminal of the capacitor are connected to the power supply. The first address terminal and the second address terminal of the multiplexer are connected to the control circuit. The second terminal of the capacitor, the enable terminal of the multiplexer, and the ground terminal of the multiplexer are connected to the power supply ground. The first analog switch input terminal, the second analog switch input terminal, and the third analog switch input terminal of the multiplexer are connected to one of the two port groups. The analog switch output terminal of the multiplexer is connected to the analog-to-digital conversion circuit.

6. The connector detection circuit as described in claim 1, characterized in that, The analog-to-digital conversion circuit includes an analog-to-digital conversion chip, a first inductor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, a first resistor, and a second resistor; The power supply terminal of the analog-to-digital converter (ADC) chip is connected to the first terminal of the first inductor and the first terminal of the sixth capacitor. The second terminal of the first inductor is connected to the third power supply. The reference source output terminal of the ADC chip is connected to the first terminal of the seventh capacitor. The SPI data output terminal and the SPI clock output terminal of the ADC chip are both connected to the digital signal output terminal of the ADC circuit. The negative input terminal of the ADC chip is connected to the first terminal of the third capacitor, the first terminal of the fourth capacitor, and the first terminal of the first resistor. The positive input terminal of the ADC chip is connected to the first terminal of the fifth capacitor, the second terminal of the fourth capacitor, and the first terminal of the second resistor. The second terminal of the first resistor is connected to the switching circuit to receive the test voltage corresponding to one of the two port groups. The second terminal of the second resistor is connected to the switching circuit to receive the test voltage corresponding to the other port group. The reference source input terminal of the analog-to-digital converter chip is connected to a reference voltage, and the ground terminal of the analog-to-digital converter chip, the second terminal of the third capacitor, the second terminal of the fifth capacitor, the second terminal of the sixth capacitor, and the second terminal of the seventh capacitor are all connected to the power supply ground.

7. The connector detection circuit as described in claim 1, characterized in that, The control circuit includes a microprocessor; The first and second general purpose input / output (GPIO) terminals of the microprocessor are connected to one port of the switching circuit; the third and fourth GPIO terminals of the microprocessor are connected to the other port of the switching circuit; the fifth and sixth GPIO terminals of the microprocessor are jointly connected to the analog-to-digital converter circuit; and the seventh and eighth GPIO terminals of the microprocessor are jointly connected to the current detection circuit.

8. A connector testing device, characterized in that, The connector testing equipment includes the connector testing circuit as described in any one of claims 1 to 7.

9. The device according to claim 8, characterized in that, The device further includes: a display circuit connected to the control circuit, the control circuit being used to control the display circuit to display the impedance between two adjacent port groups; or, the device further includes: a voice prompt circuit connected to the control circuit, the control circuit being used to control the voice prompt to announce the impedance between two adjacent port groups.

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