Display panel, display device, test system and test method

Abstract

This application provides a display panel, a display device, a testing system, and a testing method. In the display panel provided in this application, by setting test units in the display panel that are connected one-to-one with each first pad, during the testing phase of the display panel, each test unit outputs a first test signal sequence based on the design timing to each first pad, and a control device receives a second test signal sequence of the connectors. By comparing the first test signal sequence and the second test signal sequence, it is possible to confirm whether there are any unqualified conductive connections in the display panel. Furthermore, since the test units are integrated into the display panel, there is no need to use test fixtures that are electrically connected one-to-one with the first pads of the display panel, which simplifies the testing process, improves the testing efficiency of the display panel, and reduces the probability of the first pads being scratched during the testing process.

Description

Technical Field

[0001] This application relates to the field of display technology, and more specifically, to a display panel, display device, testing system, and testing method. Background Technology

[0002] With the development of display technology, the market demand for large-size display panels is increasing. Currently, large-size display panels are usually made by splicing together multiple smaller display panels. In order to ensure the display effect of the display panel made up of spliced ​​display modules, a borderless design is required to achieve seamless splicing between multiple display panels.

[0003] For borderless display panels, a side-connection process is required to connect the pads on the front and back of the display panel. During the side-connection process, misalignment or poor connection of the resulting conductive traces may occur. Currently, separate test fixtures are often required to electrically connect to the pads on the front and back of the display panel to detect any abnormalities in the conductive traces. This testing method is complex and not convenient for detecting any abnormalities in the conductive traces of the display panel. Summary of the Invention

[0004] This application addresses the shortcomings of existing methods by proposing a display panel, display device, testing system, and testing method to solve the technical problem that it is inconvenient to detect whether there are abnormalities in the conductive connections of the display panel in the prior art.

[0005] In a first aspect, embodiments of this application provide a display panel, including:

[0006] substrate;

[0007] At least one first pad is disposed on one side of the substrate;

[0008] At least one second pad is disposed on the other side of the substrate;

[0009] At least one conductive line extends from one side of the substrate through the end face of the substrate to the other side of the substrate; one end of each conductive line is connected to a first pad and the other end is connected to a second pad.

[0010] At least one test unit is disposed on one side of the substrate, and each first pad is electrically connected to the output terminal of a test unit;

[0011] During the testing phase of the display panel, all second pads are used for electrical connection with the connectors. Each test unit outputs a first test signal sequence based on the design timing to each first pad, so that the control device receives a second test signal sequence through the electrically connected connectors.

[0012] Secondly, embodiments of this application provide a display device, including at least two display panels as provided in the first aspect.

[0013] Thirdly, embodiments of this application provide a testing system, including: a connector, a control device, and a display panel as provided in the first aspect;

[0014] The connector is electrically connected to the control device, and the control device is electrically connected to the test unit of the display panel; all the second pads of the display panel are electrically connected to the connector, which includes either a conductive plate or a test pin card.

[0015] Fourthly, embodiments of this application provide a testing method based on the testing system provided in the third aspect, comprising:

[0016] Each test unit of the display panel generates a test signal based on the received trigger signal and transmits it to the first pad that is electrically connected to the output terminal of the test unit; the test signals of all test units form a first test signal sequence based on the design timing.

[0017] The control device receives test signals output from each of the second pads on the display panel sequentially based on the connector; the test signals from all the second pads form a second test signal sequence.

[0018] By comparing the waveforms of the first test signal sequence and the second test signal sequence, the presence of any unqualified conductive wires in the display panel is determined based on the comparison results.

[0019] The beneficial technical effects of the technical solutions provided in this application include:

[0020] In the display panel provided in this application embodiment, by setting test units in the display panel that are connected one-to-one with each of the first pads, during the testing phase of the display panel, each test unit outputs a first test signal sequence based on the design timing to each of the first pads, and receives a second test signal sequence of the connectors through a control device. By comparing the first test signal sequence and the second test signal sequence, if the first test signal sequence and the second test signal sequence are the same, it is determined that all conductive connections in the display panel are qualified; otherwise, it is confirmed that there are unqualified conductive connections in the display panel.

[0021] Furthermore, in the display panel provided in this application embodiment, since the test unit is integrated into the display panel, only a connector is needed to electrically connect to all the second pads in the display panel. There is no need to use a test fixture that is electrically connected to each of the first pads of the display panel, thereby simplifying the testing process and improving the testing efficiency of the display panel. At the same time, since there is no need to use a test fixture that is electrically connected to each of the first pads, the probability of the first pads being scratched during the testing process is reduced.

[0022] Additional aspects and advantages of this application will be set forth in part in the description which follows, and will become apparent from the description or may be learned by practice of this application. Attached Figure Description

[0023] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the following description of the embodiments taken in conjunction with the accompanying drawings, wherein:

[0024] Figure 1 This is a side view schematic diagram of a display panel provided in an embodiment of this application;

[0025] Figure 2 Provided for the embodiments of this application Figure 1 A top-view diagram of the front of the display panel shown;

[0026] Figure 3 Provided for the embodiments of this application Figure 1 A schematic diagram showing the back of the display panel and the connection of the connectors;

[0027] Figure 4 This is a schematic diagram showing the connection of all test units in the display panel provided in an embodiment of this application;

[0028] Figure 5 A schematic diagram of the framework of a testing system provided in an embodiment of this application;

[0029] Figure 6 A flowchart illustrating a testing method provided in an embodiment of this application;

[0030] Figure 7 This is a waveform comparison diagram of the first test signal sequence and the second test signal sequence in a test method provided in an embodiment of this application.

[0031] Explanation of reference numerals in the attached figures:

[0032] 100 - Display panel;

[0033] 10-Substrate; 11-First pad; 12-Second pad; 13-Conductive interconnect;

[0034] 14-Test Unit;

[0035] 141 - Shift register subunit; 142 - Switch subunit;

[0036] 15-Wire;

[0037] 200 - Connector; 300 - Control device;

[0038] 401 - Waveform diagram of the first test signal sequence; 402 - Waveform diagram of the second test signal sequence. Detailed Implementation

[0039] The embodiments of this application are described below with reference to the accompanying drawings. It should be understood that the embodiments described below with reference to the accompanying drawings are exemplary descriptions for explaining the technical solutions of the embodiments of this application, and do not constitute a limitation on the technical solutions of the embodiments of this application.

[0040] Those skilled in the art will understand that, unless specifically stated otherwise, the singular forms “a,” “an,” “the,” and “the” used herein may also include the plural forms. It should be further understood that the word “comprising” as used in this application's specification means the presence of the stated features, integers, steps, and / or operations, but does not exclude implementation as supported by this art, other features, information, data, steps, operations, and / or combinations thereof. The term “and / or” as used herein refers to at least one of the items defined by the term; for example, “A and / or B” can be implemented as “A,” or as “B,” or as “A and B.”

[0041] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.

[0042] First, the relevant technologies involved in this application will be explained:

[0043] In this application, for display panels used to achieve seamless splicing, conductive wiring refers to side connection, that is, electrical connection between a pad located on the front of the display panel and a pad located on the back of the display panel.

[0044] The manufacturing process of this type of display panel requires a separate side-mounted wiring process, which necessitates the installation of conductive wires to connect the front and back pads one-to-one. However, during the side-mounted wiring process, issues such as misalignment and poor connection may occur in the resulting conductive wires. Therefore, a testing process is required after the side-mounted wiring process is completed.

[0045] Current test fixtures typically consist of multiple pin clips, requiring each pad to be connected to a pin clip. The conductivity between a pad on the front and its corresponding pad on the back is determined by measuring the resistance. Connecting the pin clips to the pads one-to-one during testing is time-consuming and inconvenient for operators. Furthermore, the pin clips can easily scratch the pads during connection, potentially leading to pad failure. Moreover, these pin clip-based test fixtures are expensive, and different sizes of display panels often require different fixtures, resulting in high manufacturing costs.

[0046] The display panel, display device, testing system, and testing method provided in this application are intended to address the aforementioned technical problems of the prior art.

[0047] The technical solution of this application and how it solves the above-mentioned technical problems are described in detail below with specific embodiments. It should be noted that the following embodiments can be referenced, learned from, or combined with each other, and the same terms, similar features, and similar implementation steps in different embodiments will not be described again.

[0048] This application provides a display panel, the structural schematic diagram of which is shown below. Figure 1 As shown, it includes: a substrate 10, at least one first pad 11, at least one second pad 12, at least one conductive line 13, and at least one test unit 14.

[0049] In this embodiment, the first pad 11 is disposed on one side of the substrate 10, and the second pad 12 is disposed on the other side of the substrate 10; the conductive line 13 extends from one side of the substrate 10 through the end face of the substrate 10 to the other side of the substrate 10, and one end of each conductive line 13 is connected to a first pad 11 and the other end is connected to a second pad 12; the test unit is disposed on one side of the substrate 10, and each first pad 11 is electrically connected to the output terminal of a test unit 14.

[0050] During the testing phase of the display panel 100, all second pads 12 are used for electrical connection with the connectors, and each test unit 14 outputs a first test signal sequence based on the design timing to each first pad 11, so that the control device receives a second test signal sequence through the electrically connected connectors.

[0051] In the display panel 100 provided in this application embodiment, by setting test units 14 in the display panel 100 that are connected one-to-one with each of the first pads 11, during the testing phase of the display panel 100, each test unit 14 outputs a first test signal sequence based on the design timing to each of the first pads 11, and receives a second test signal sequence of the connector through a control device. By comparing the first test signal sequence and the second test signal sequence, if the first test signal sequence and the second test signal sequence are the same, it is determined that all conductive lines 13 in the display panel 100 are qualified; otherwise, it is confirmed that there are unqualified conductive lines 13 in the display panel 100.

[0052] Furthermore, in the display panel 100 provided in this embodiment, since the test unit 14 is integrated into the display panel 100, it is only necessary to use a connector to electrically connect to all the second pads 12 in the display panel 100. There is no need to use a test fixture that is electrically connected to each of the first pads 11 of the display panel 100, thereby simplifying the testing process and improving the testing efficiency of the display panel 100. At the same time, since there is no need to use a test fixture that is electrically connected to each of the first pads 11, the probability of the first pads 11 being scratched during the testing process can be reduced.

[0053] In this embodiment of the application, one side of the substrate 10 is defined as the front side, and the other side of the substrate 10 is defined as the back side. Optionally, as shown... Figure 1 As shown, the upper side of the substrate 10 is the front side, and the lower side is the back side. In this embodiment of the application, the front side of the substrate 10 is the front side of the display panel 100, and the back side of the substrate 10 is the back side of the display panel 100.

[0054] In the embodiments of this application, such as Figure 1 As shown, the first pad 11 and the test unit 14 are both disposed on the front side of the substrate 10, and the second pad 12 is disposed on the back side of the substrate 10. Optionally, both the first pad 11 and the second pad 12 are used for electrical connection with conductive traces disposed inside the substrate 10. Optionally, the substrate 10 can be an array substrate or a display substrate including an OLED (Organic Light-Emitting Diode).

[0055] It should be noted that, in the embodiments of this application, in order to facilitate readers' intuitive understanding of the arrangement relationship between the first pad 11, the second pad 12, and the test unit 14, as shown below... Figure 1 As shown, the first pad 11, the second pad 12, and the test unit 14 are simplified to be disposed on the surface of the substrate 10. In actual products, it is only necessary to ensure that part of the surface of the first pad 11 and the second pad 12 is exposed so that the first pad 11 and the second pad 12 can be connected to the conductive wire 13. Optionally, in actual products, the test unit 14 can be disposed inside the substrate 10.

[0056] In the embodiments of this application, such as Figure 2 and Figure 3 As shown, the front side of the substrate 10 has a plurality of first pads 11, and the back side of the substrate 10 has a plurality of second pads 12. Optionally, the number of first pads 11, second pads 12, and conductive interconnects 13 are the same. Figures 1-3As shown, one end of a conductive line 13 is connected to a first pad 11, and the other end of the conductive line 13 extends from the front side of the substrate 10 through the end face of the substrate 10 to the back side of the substrate 10 and is connected to a second pad 12, thereby realizing the electrical connection between a first pad 11 and a corresponding second pad 12 through a conductive line 13.

[0057] In the embodiments of this application, such as Figure 2 As shown, all test units 14 in the display panel 100 are electrically connected in sequence. Figure 2 As shown, any two adjacent test units 14 are electrically connected by wires 15. Optionally, both the test units 14 and the wires 15 can be integrated inside the substrate 10, and optionally, the wires 15 can be made of a transparent material.

[0058] In the embodiments of this application, such as Figure 1 and Figure 2 As shown, a test unit 14 is connected to a first pad 11. Optionally, the output terminal of a test unit 14 is electrically connected to a first pad 11. Figure 3 As shown, during the testing phase of the display panel 100, all the second pads 12 in the display panel 100 are electrically connected to the connector 200.

[0059] In this embodiment of the application, during the testing phase of the display panel 100, since each test unit 14 is electrically connected to each first pad 11 in a one-to-one correspondence, test signals are sequentially output to the corresponding electrically connected first pads 11 through the test unit 14, thereby enabling each test unit 14 to output a first test signal sequence based on the design timing to each first pad 11. The control device electrically connected to the connector 200 sequentially receives the test signals transmitted by the second pads 12, and the test signals of all the second pads 12 form a second test signal sequence.

[0060] By comparing the first test signal sequence and the second test signal sequence, if the first test signal sequence and the second test signal sequence are the same, that is, the test signal transmitted by each first pad 11 is transmitted to the corresponding second pad 12, it can be determined that the first pad 11 and the corresponding second pad 12 can form a path, and then it is determined that all conductive lines 13 in the display panel 100 are qualified.

[0061] Conversely, if the first test signal sequence and the second test signal sequence are different, that is, at least some of the test signals transmitted by the first pad 11 cannot be transmitted to the corresponding second pad 12, it can be determined that some of the first pads 11 and their corresponding second pads 12 cannot form a path, thus confirming that there is a defective conductive link 13 in the display panel 100. Optionally, the location of the defective conductive link 13 can be determined by comparing the differences between the second test signal sequence and the first test signal sequence.

[0062] In this embodiment, the test unit 14 is directly electrically connected to each of the first pads 11 of the display panel 100, thus eliminating the need for a test fixture that is electrically connected to each of the first pads 11 of the display panel 100. This simplifies the testing process and improves the testing efficiency of the display panel 100. Furthermore, since no test fixture is required that is electrically connected to each of the first pads 11, the probability of the first pads 11 being scratched during the testing process is reduced.

[0063] It should be noted that, in order to help readers understand the arrangement relationship between the second pad 12 and the connector 200 on the back of the display panel 100, as shown below... Figure 3 As shown, the second pad 12, which is covered by the connector 200, is indicated by a dashed line.

[0064] Optionally, such as Figure 4 As shown, in one embodiment of this application, the test unit 14 includes a shift register subunit 141 and a switch subunit 142; the input terminal and control terminal of the switch subunit 142 are both electrically connected to the output terminal of the shift register subunit 141, and the output terminal of the switch subunit 142 is electrically connected to the first pad 11.

[0065] In the embodiments of this application, such as Figure 4 As shown, each test unit 14 includes a shift register subunit 141 and a switch subunit 142 that are electrically connected. Optionally, the shift register subunit 141 includes an enable terminal and an output terminal, and the switch subunit 142 includes an input terminal, an output terminal, and a control terminal.

[0066] In this embodiment, the output terminal of the shift register subunit 141 is electrically connected to both the input terminal and the control terminal of the switch subunit 142. This allows the test signal output from the shift register subunit 141 to be multiplexed as the turn-on signal of the switch subunit 142, thereby simplifying the structure of the test unit 14, reducing the manufacturing difficulty of the test unit 14, simplifying the subsequent testing process of the display panel 100, saving the testing time of the display panel 100, and thus improving the manufacturing efficiency of the display panel 100.

[0067] In this embodiment of the application, the output terminal of the switch subunit 142 is electrically connected to the first pad 11, so that when the switch subunit 142 is in the open state, the test signal output by the output terminal of the shift register subunit 141 can be transmitted to the first pad 11.

[0068] In this embodiment of the application, by setting a switch subunit 142 to control the on and off states of the shift register subunit 141 and the first pad 11, it is possible to control the shift register subunit 141 of one of the test units 14 to be in a conducting state with the first pad 11, while the shift register subunit 141 of the other test units 14 is in a disconnected state with the first pad 11. This avoids the test signal output by this test unit 14 from affecting the test signal transmitted by the second pad 12 which is electrically connected to other test units 14.

[0069] Optionally, in this embodiment, the shift register sub-unit 141 is a GOA (Gate Driven on Array), which facilitates the integration of the shift register sub-unit 141 into the substrate 10 through semiconductor processes, thereby reducing the production cost of the test unit 14 and the testing cost of the display panel 100.

[0070] Optionally, such as Figure 2 and Figure 4 As shown, in one embodiment of this application, the display panel 100 includes a plurality of test units 14, and the number of test units 14, first pads 11, second pads 12 and conductive wires 13 are the same; the enable terminal of the shift register subunit 141 of the nth test unit 14 is electrically connected to the output terminal of the shift register subunit 141 of the (n-1)th test unit 14; n is a natural number greater than 1.

[0071] In the embodiments of this application, such as Figure 2 and Figure 4 As shown, in the display panel 100, the number of test units 14, first pads 11, second pads 12 and conductive wires 13 are the same. Each test unit 14 is electrically connected to the first pad 11, thereby enabling testing of whether all conductive wires 13 in the display panel 100 are qualified.

[0072] In the embodiments of this application, such as Figure 2 and Figure 4 As shown, any two adjacent test units 14 are electrically connected. Optionally, as follows: Figure 4 As shown, the enable terminal of the shift register subunit 141 of the nth test unit 14 is electrically connected to the output terminal of the shift register subunit 141 of the (n-1)th test unit 14, thereby making the shift register subunits 141 in all test units 14 cascaded. This allows the test signal output from the enable terminal of the shift register subunit 141 of the nth test unit 14 to serve as the enable signal for the shift register subunit 141 of the (n-1)th test unit 14, which greatly simplifies the test process, shortens the time required for the test procedure, and thus improves the test efficiency of the display panel 100.

[0073] Optionally, such as Figure 4 As shown, in one embodiment of this application, the switching subunit 142 includes a thin-film transistor; one of the first and second terminals of the thin-film transistor is electrically connected to the first pad 11, and the other is electrically connected to the output terminal of the shift register subunit 142.

[0074] In the embodiments of this application, such as Figure 4 As shown, the switch subunit 142 includes a thin-film transistor, one of the first and second terminals of the thin-film transistor being electrically connected to the first pad 11.

[0075] Optionally, the first electrode is one of the source and drain, and the second electrode is the other of the source and drain. Optionally, for a P-type MOS (Metal-Oxide-Semiconductor Field-Effect Transistor), the first electrode is the source and the second electrode is the drain; for an N-type MOS, the first electrode is the drain and the second electrode is the source. Those skilled in the art can select the type of thin-film transistor according to actual needs.

[0076] In this embodiment, the other of the first and second terminals of the thin-film transistor is electrically connected to the output terminal of the shift register subunit 142. Optionally, as... Figure 4 As shown, the electrode electrically connected to the first pad 11 is the output terminal of the switch subunit 142, and the electrode electrically connected to the output terminal of the shift register subunit 142 is the input terminal of the switch subunit 142.

[0077] In this embodiment, by providing the switch sub-unit 142 with a thin-film transistor, the manufacturing process of the switch sub-unit 142 is compatible with the semiconductor fabrication process. This facilitates the integration of both the shift register sub-unit 141 and the switch sub-unit 142 into the substrate 10 using semiconductor processes, thereby reducing the production cost of the test unit 14 and the testing cost of the display panel 100.

[0078] Optionally, such as Figure 4 As shown, in one embodiment of this application, the gate of the thin-film transistor is electrically connected to the output terminal of the shift register subunit 141, and the test signal is multiplexed as the switching signal of the thin-film transistor.

[0079] In the embodiments of this application, such as Figure 4As shown, the gate of the thin-film transistor is the control terminal of the switching subunit 142. By setting the gate of the thin-film transistor to be electrically connected to the output terminal of the shift register subunit 141, the test signal output by the shift register subunit 141 can be multiplexed as the switching signal of the thin-film transistor. This simplifies the structure of the test unit 14, reduces the manufacturing difficulty of the test unit 14, simplifies the subsequent testing process of the display panel 100, saves the testing time of the display panel 100, and improves the manufacturing efficiency of the display panel 100.

[0080] Optionally, such as Figure 4 As shown, in one embodiment of this application, the first clock terminal and the second clock terminal of each shift register subunit 141 are electrically connected to the first clock signal line and the second clock signal line, respectively.

[0081] In the embodiments of this application, such as Figure 4 As shown, the first clock terminal of the shift register subunit 141 is electrically connected to the first clock signal line CK (Clock, abbreviated as CK), and the second clock terminal of the shift register subunit 141 is electrically connected to the second clock signal line (Clock B, abbreviated as CB), so that the shift register subunit 141 can receive the first clock signal transmitted by the first clock signal line and the second clock signal transmitted by the second clock signal line.

[0082] In the embodiments of this application, such as Figure 4 As shown, in all the test units 14 of the display panel 100, only an STV (Start Vertical) signal needs to be input to the enable terminal of the shift register subunit 141 of the first test unit 14 as an enable signal. The enable terminal of the shift register subunit 141 of the next test unit 14 receives the test signal output from the output terminal of the shift register subunit 141 of the previous test unit 14 as an enable signal, so that all the test units 14 as shown in 4 can run automatically in sequence. The test signal output by the i-th shift register subunit 141 is the i-th test signal OUT. j j is a positive integer not less than 1 and not greater than n, where n is a positive integer. For example, the test signal output by the (n-2)th shift register subunit 141 is the (n-2)th test signal, denoted as OUT. n-2 .

[0083] Based on the same inventive concept, this application provides a display device, which includes at least two display panels 100 provided in any of the above embodiments.

[0084] In this embodiment, the display device uses any of the display panels 100 provided in the foregoing embodiments. The principle and technical effects are described in the foregoing embodiments and will not be repeated here.

[0085] Optionally, in the embodiments of this application, the display device includes a large-size display device, such as an outdoor display device used in an outdoor plaza and an information display device used in a public transportation station.

[0086] Alternatively, in the embodiments of this application, the display device may also be a laptop computer, smartphone, television, tablet computer, and wearable display devices such as smartwatches, fitness trackers, and smart glasses.

[0087] Optionally, in one embodiment of this application, all display panels 100 are spliced ​​together by a carrier; the carrier is electrically connected to the display panels 100.

[0088] Based on the same inventive concept, this application provides a testing system, the framework of which is shown in the schematic diagram below. Figure 5 As shown, the test system includes: connector 200, control device 300, and display panel 100 provided in any of the above embodiments.

[0089] In this embodiment, the connector 200 is electrically connected to the control device 300, and the control device 300 is electrically connected to the test unit 14 of the display panel 100; all the second pads 12 of the display panel 100 are electrically connected to the connector 200.

[0090] Optionally, the control device 300 is electrically connected to the first test unit 14 among all the cascaded test units 14 of the display panel 100. Optionally, the control device 300 is electrically connected to the enable terminal of the shift register subunit 141 in the first test unit 14. Optionally, the control device 300 is also electrically connected to the first clock terminal and the second clock terminal of the shift register subunit 141 in all the test units 14.

[0091] Optionally, in this embodiment, the connector 200 includes either a conductive plate or a detection pin clip. Optionally, the conductive plate is a conductive metal plate; optional, the detection pin clip is a pin clip of a related test fixture.

[0092] In this embodiment of the application, when the connector 200 is a conductive plate, all the second pads 12 in the display panel can be electrically connected through the conductive plate. Thus, all the second pads 12 only need to be connected to the conductive plate once, which can reduce the probability of the second pads 12 being scratched in the testing process and ensure the yield of the display panel.

[0093] Based on the same inventive concept, this application provides a testing method, which is based on the testing system provided in the above embodiments. A flowchart of this method is shown below. Figure 6 As shown, the process includes the following steps S601-S603:

[0094] S601, each test unit of the display panel generates a test signal in sequence based on the received trigger signal and transmits it to the first pad that is electrically connected to the output terminal of the test unit; the test signals of all test units form a first test signal sequence based on the design timing.

[0095] S602, the control device receives test signals output from each of the second pads of the display panel in sequence based on the connector; the test signals of all the second pads form a second test signal sequence.

[0096] S603, compare the waveforms of the first test signal sequence and the second test signal sequence, and determine whether there are any unqualified conductive wires in the display panel based on the comparison results.

[0097] In the testing method provided in this application embodiment, by comparing the waveforms of the first test signal sequence and the second test signal sequence, if the waveforms of the first test signal sequence and the second test signal sequence are the same, it is determined that all conductive wires 13 in the display panel 100 are qualified; otherwise, it is confirmed that there are unqualified conductive wires 13 in the display panel 100.

[0098] Optionally, in the embodiments of this application, such as Figure 7 The image shows a comparison of waveform diagram 401 of the first test signal sequence and waveform diagram 402 of the second test signal sequence. Figure 7 As can be seen from the waveform diagram 402 of the second test signal sequence, the waveform at point A is inconsistent with the waveform diagram 401 of the first test signal sequence. Therefore, it can be determined that the conductive connection 13 corresponding to point A is unqualified, while the conductive connection 13 at other locations is qualified.

[0099] Optionally, in one embodiment of this application, the step S601 above, in which each test unit of the display panel sequentially generates a test signal based on the received trigger signal and transmits it to the first pad electrically connected to the output terminal of the test unit, includes: the shift register subunit of the first test unit receives the frame start signal and clock signal from the trigger signal originating from the control device through the timing controller, generates a test signal, and transmits it to the first pad and the shift register subunit of the second test unit; any one of the shift register subunits from the second test unit to the nth test unit generates a test signal based on the clock signal and the test signal output by the previous shift register subunit, and transmits it to the first pad and the shift register subunit of the next test unit.

[0100] Optionally, the control device 300 sends a trigger signal to the timing controller (TCON). The shift register subunit 141 in the first test unit 14 of all cascaded test units 14 in the display panel 100 receives the frame start signal and clock signal from the trigger signal from the control device 300 through the timing controller, generates a test signal, and transmits it to the enable terminal of the shift register subunit 141 of the first pad 11 and the second test unit.

[0101] Optionally, in this embodiment of the application, the control device 300 can directly send a trigger signal including a frame start signal and a clock signal to the shift register subunit 141 in the first test unit 14 among all test units 14.

[0102] Optionally, the enable terminal of the shift register subunit 141 is used to receive the frame start signal. Optionally, the clock signal includes a first clock signal and a second clock signal, and the first clock terminal and the second clock terminal of the shift register subunit 141 receive the first clock signal and the second clock signal, respectively.

[0103] Optionally, in each of the cascaded test units 14, any one of the shift register subunits 141 from the second test unit 14 to the nth test unit 14 generates a test signal based on the clock signal and the test signal output by the previous shift register subunit 141, and transmits it to the first pad 11 and the enable terminal of the shift register subunit 141 of the next test unit 14.

[0104] Optionally, in one embodiment of this application, the shift register subunit of the first test unit receives the frame start signal and clock signal from the trigger signal originating from the control device via the timing controller, generates a test signal, and transmits it to the first pad and the shift register subunit of the second test unit, including:

[0105] After the shift register subunit 141 of the first test unit 14 generates a test signal based on the frame start signal and the clock signal, it transmits the signal to the control terminal of the switch subunit 142 of the first test unit 14. Based on the test signal, the control terminal of the switch subunit 142 enables the switch subunit 142 to be in the open state.

[0106] By applying the embodiments of this application, at least the following beneficial effects can be achieved:

[0107] In the display panel 100 provided in this application embodiment, by setting test units 14 in the display panel 100 that are connected one-to-one with each of the first pads 11, during the testing phase of the display panel 100, each test unit 14 outputs a first test signal sequence based on the design timing to each of the first pads 11, and receives a second test signal sequence of the connector through a control device. By comparing the first test signal sequence and the second test signal sequence, if the first test signal sequence and the second test signal sequence are the same, it is determined that all conductive lines 13 in the display panel 100 are qualified; otherwise, it is confirmed that there are unqualified conductive lines 13 in the display panel 100.

[0108] Furthermore, in the display panel 100 provided in this embodiment, since the test unit 14 is integrated into the display panel 100, it is only necessary to use a connector to electrically connect to all the second pads 12 in the display panel 100. There is no need to use a test fixture that is electrically connected to each of the first pads 11 of the display panel 100, thereby simplifying the testing process and improving the testing efficiency of the display panel 100. At the same time, since there is no need to use a test fixture that is electrically connected to each of the first pads 11, the probability of the first pads 11 being scratched during the testing process can be reduced.

[0109] Those skilled in the art will understand that the steps, measures, and solutions in the various operations, methods, and processes discussed in this application can be alternated, modified, combined, or deleted. Furthermore, other steps, measures, and solutions in the various operations, methods, and processes discussed in this application can also be alternated, modified, rearranged, decomposed, combined, or deleted. Furthermore, steps, measures, and solutions in the prior art that are similar to those disclosed in this application can also be alternated, modified, rearranged, decomposed, combined, or deleted.

[0110] In the description of this application, the terms "center," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicate directions or positional relationships based on the exemplary directions or positional relationships shown in the accompanying drawings. They are used to facilitate the description or simplification of the embodiments of this application and are not intended to indicate or imply that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0111] The terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, unless otherwise stated, "a plurality of" means two or more.

[0112] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal communication between two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0113] In the description of this specification, specific features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments or examples.

[0114] It should be understood that although the steps in the flowcharts of the accompanying drawings are shown sequentially according to the arrows, the order in which these steps are implemented is not limited to the order indicated by the arrows. Unless explicitly stated herein, in some implementation scenarios of this application, the steps in each process can be executed in other orders as required. Moreover, some or all of the steps in each flowchart may include multiple sub-steps or multiple stages based on the actual implementation scenario. Some or all of these sub-steps or stages may be executed at the same time or at different times. In scenarios where the execution times are different, the execution order of these sub-steps or stages can be flexibly configured according to requirements, and this application does not limit this.

[0115] The above description is only a partial embodiment of this application. It should be noted that for those skilled in the art, other similar implementation methods based on the technical concept of this application, without departing from the technical concept of this application, also fall within the protection scope of the embodiments of this application.

Claims

1. A display panel, characterized by, include: substrate; At least one first pad; At least one second pad; At least one conductive line extends from one side of the substrate through an end face of the substrate to the other side of the substrate; one end of each conductive line is connected to a first pad and the other end is connected to a second pad. At least one test unit is disposed on one side of the substrate, and each of the first pads is electrically connected to the output terminal of one of the test units; During the testing phase of the display panel, all the second pads are used to be electrically connected to the connectors, and each of the test units outputs a first test signal sequence based on the design timing to each of the first pads, so that the control device receives a second test signal sequence through the electrically connected connectors; The test unit includes a shift register subunit and a switch subunit; The input and control terminals of the switching subunit are both electrically connected to the output terminal of the shift register subunit, and the output terminal of the switching subunit is electrically connected to the first pad. The shift register subunit is GOA; The first pad and the test unit are disposed on the first side of the substrate, and the second pad is disposed on the second side of the substrate. The first side and the second side are disposed opposite to each other in the thickness direction of the substrate.

2. The display panel according to claim 1, characterized in that, It includes multiple test units, and the number of test units, the first pad, the second pad, and the conductive interconnects are the same; The input terminal of the shift register subunit of the nth test unit is electrically connected to the output terminal of the shift register subunit of the (n-1)th test unit; n is a natural number greater than 1.

3. The display panel according to claim 1, characterized in that, The switching subunit includes a thin-film transistor; one of the first and second terminals of the thin-film transistor is electrically connected to the first pad, and the other is electrically connected to the output terminal of the shift register subunit.

4. The display panel according to claim 3, characterized in that, The gate of the thin-film transistor is electrically connected to the output terminal of the shift register subunit, and the test signal is multiplexed as the switching signal of the thin-film transistor.

5. A display device, characterized in that, include: At least two display panels as described in any one of claims 1-4.

6. A testing system, characterized in that, include: Connector, control device, and display panel as described in any one of claims 1-4; The connector is electrically connected to the control device, and the control device is electrically connected to the test unit of the display panel; all the second pads of the display panel are electrically connected to the connector, and the connector includes either a conductive plate or a test pin card.

7. A testing method, characterized in that, Based on the testing system as described in claim 6, it includes: Each test unit of the display panel generates a test signal based on the received trigger signal in sequence, and transmits it to the first pad that is electrically connected to the output terminal of the test unit; the test signals of all the test units form a first test signal sequence based on the design timing. The control device receives test signals output from each of the second pads of the display panel sequentially based on the connector; the test signals from all the second pads form a second test signal sequence. By comparing the waveforms of the first test signal sequence and the second test signal sequence, it is determined whether there are any unqualified conductive wires in the display panel based on the comparison results.

8. The test method according to claim 7, characterized in that, Each test unit of the display panel sequentially generates a test signal based on the received trigger signal and transmits it to the first pad electrically connected to the output terminal of the test unit, including: The shift register subunit of the first test unit receives the frame start signal and clock signal from the trigger signal from the control device through the timing controller, generates the test signal, and transmits it to the first pad and the shift register subunit of the second test unit; Any one of the shift register subunits from the second test unit to the nth test unit generates a test signal based on the clock signal and the test signal output by the previous shift register subunit, and transmits it to the first pad and the shift register subunit of the next test unit.

9. The test method according to claim 8, characterized in that, The shift register subunit of the first test unit receives the frame start signal and clock signal from the trigger signal originating from the control device via the timing controller, generates the test signal, and transmits it to the first pad and the shift register subunit of the second test unit, including: After the shift register subunit of the first test unit generates the test signal based on the frame start signal and the clock signal, it transmits the signal to the control terminal of the switch subunit of the first test unit. The control terminal of the switch subunit then turns the switch subunit on based on the test signal.

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