Control system
By combining a real-time clock, controller, and pin connectors, and using batteries and backup power supplies, the problem of needing an external frequency module for storage devices is solved, enabling control operations at predetermined times and reducing hardware complexity and cost.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- APACER
- Filing Date
- 2021-11-16
- Publication Date
- 2026-06-16
Smart Images

Figure CN116136777B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a control system, and more particularly to a control system capable of controlling a storage device to perform a predetermined operation at a predetermined time. Background Technology
[0002] With the rise of applications such as the Internet of Things (IoT), the demand for storage device management and maintenance has also increased. Current storage device data transmission often uses Out-of-Band (OOB) methods to transmit instructions and execute related controls. OOB methods allow for remote management via additional hardware after the operating system (OS) program execution cache. In current industrial or commercial computer system architectures, an external OOB module can be connected to the storage device to manage, trigger, or drive functions such as power-on, power-off, and reset of the host system. This hardware module design requires an external network system; typically, one end of the OOB module is connected to the network, while the other end is connected to the system power switch and the storage device for control. While this architecture is usable, using an external OOB module increases costs, for example, equipment costs and the amount of data transmitted while constantly connected are both high. Therefore, a suitable solution is currently lacking in the field to improve the relevant system architecture and operating procedures. Summary of the Invention
[0003] An embodiment provides a control system comprising a storage device and a controlled device. The storage device includes a real-time clock, a controller, and a pin connector. The real-time clock is used to access a first data signal corresponding to a first control signal and to output the first control signal at a predetermined time. The real-time clock includes a first terminal, a second terminal, a third terminal, and a fourth terminal, wherein the first terminal is used to output the first control signal, the second terminal is used to access the first data signal, the third terminal is coupled to a battery and used to receive battery power, and the fourth terminal is coupled to a backup power source and used to receive backup power. When an external power source coupled to the storage device is interrupted, the real-time clock continues to operate powered by the battery power and / or the backup power source. The controller is used to access the first data signal and to access a second data signal corresponding to the first data signal. The controller includes a first terminal and a second terminal, wherein the first terminal is coupled to the second terminal of the real-time clock and used to access the first data signal, and the second terminal is used to access the second data signal. The pin connector is used to receive the first control signal and output a second control signal accordingly. The pin connector includes a first end and a second end, wherein the first end is coupled to the first end of the real-time clock and is used to receive the first control signal, and the second end is used to output the second control signal. The controlled device is coupled to the second end of the pin connector to receive the second control signal and perform a predetermined operation at the predetermined time. Attached Figure Description
[0004] Figure 1 This is a schematic diagram of the control system in the embodiment.
[0005] Figure 2 This is a schematic diagram of a control system coupled to another host in another embodiment.
[0006] The reference numerals in the attached figures are explained as follows:
[0007] 10: Motherboard
[0008] 100, 200: Control System
[0009] 110: Storage device
[0010] 111: Interface
[0011] 112: Real-time clock
[0012] 114: Controller
[0013] 115: Storage Unit
[0014] 116: Pin connector
[0015] 118: Battery
[0016] 119: Backup Power Supply
[0017] 120: Controlled device
[0018] 130: Processor
[0019] 188, 199: Host
[0020] P1: Battery power
[0021] P2: Backup power
[0022] Sc1: First control signal
[0023] Sc2: Second control signal
[0024] Sc3: Third control signal
[0025] Sd1: First data signal
[0026] Sd2: Second data signal Detailed Implementation
[0027] To improve the relevant system architecture and address the aforementioned challenges, embodiments of the present invention provide a control system for a storage device with time control functionality, as described below.
[0028] Figure 1 This is a schematic diagram of the control system 100 in an embodiment. The control system 100 may include a storage device 110 and a controlled device 120. The storage device 110 may include a real-time clock (RTC) 112, a controller 114, and a pin connector 116. The real-time clock 112 can be used to access a first data signal Sd1 corresponding to a first control signal Sc1, and output the first control signal Sc1 at a predetermined time. The real-time clock 112 may include a first terminal, a second terminal, a third terminal, and a fourth terminal, wherein the first terminal can be used to output the first control signal Sc1, the second terminal can be used to access the first data signal Sd1, the third terminal can be coupled to a battery 118 and used to receive battery power P1, and the fourth terminal can be coupled to a backup power source 119 and used to receive backup power P2.
[0029] According to an embodiment, when the external power supply coupled to the storage device 110 is interrupted, the real-time clock 112 can be powered by battery power P1 and / or backup power P2 to continue operating. Therefore, even in the power-off mode, the real-time clock 112 can still count the correct time to perform a predetermined operation at a predetermined time.
[0030] The controller 114 can be used to access a first data signal Sd1 and access a second data signal Sd2 corresponding to the first data signal Sd1. The controller 114 includes a first terminal and a second terminal, wherein the first terminal is coupled to the second terminal of the real-time clock 112 and is used to access the first data signal Sd1, and the second terminal is used to access the second data signal Sd2.
[0031] The pin connector 116 is used to receive a first control signal Sc1 and output a second control signal Sc2 accordingly. The pin connector 116 may include a first end and a second end, wherein the first end is coupled to the first end of the real-time clock 112 and is used to receive the first control signal Sc1, and the second end is used to output the second control signal Sc2.
[0032] The controlled device 120 can be coupled to the second end of the pin connector 116 to receive the second control signal Sc2 and perform a predetermined operation at a predetermined time.
[0033] According to an embodiment, storage device 110 may include a solid-state drive (SSD) device. For example... Figure 1 As shown, the storage device 110 may further include a storage unit 115 for storing data. For example, the storage unit 115 may include non-volatile memory, such as flash memory, NAND flash memory, etc.
[0034] According to an embodiment, the controlled device 120 may be the main power control unit of the host, and the aforementioned predetermined operation may include controlling the main power control unit to perform a power-on operation, a power-off operation, and / or a reset operation on the host. According to an embodiment, the first data signal Sd1 corresponding to the second data signal Sd2 can be used to notify the real-time clock 112 of the aforementioned predetermined time and predetermined operation; furthermore, according to an embodiment, when the real-time clock 112 outputs the first control signal Sc1, the real-time clock 112 may output the first data signal Sd1 to notify the controller 114, so that the controller 114 generates the second data signal Sd2 accordingly for reporting.
[0035] The following example illustrates the application scenario of the control system 100. For instance, if a store's electronic display is scheduled to turn on at 7:00 AM, then... Figure 1As shown, the second data signal Sd2 can transmit 7:00 AM (i.e., the predetermined time) and a power-on command (i.e., corresponding to the predetermined operation) to the controller 114. The controller 114 then transmits the first data signal Sd1 to the real-time clock 112 based on the second data signal Sd2. The real-time clock 112 can output a first control signal Sc1 at 7:00 AM (i.e., the predetermined time) based on the first data signal Sd1, causing the pin connector 116 to output a second control signal Sc2 to perform the power-on operation (i.e., the predetermined operation). When the real-time clock 112 outputs the first control signal Sc1 to perform the power-on operation, the real-time clock 112 can output the first data signal Sd1 to the controller 114 to notify the controller 114, so that the controller 114 can generate the second data signal Sd2 to report back, for example, to the user or an external control device.
[0036] Similarly, for example, if a store's electronic display is scheduled to turn off at 11 PM, then... Figure 1 As shown, the second data signal Sd2 can transmit 23:00 (i.e., the predetermined time) and a power-off command (i.e., corresponding to the predetermined operation) to the controller 114. The controller 114 then transmits the first data signal Sd1 to the real-time clock 112 based on the second data signal Sd2. The real-time clock 112 can output a first control signal Sc1 at 23:00 (i.e., the predetermined time) based on the first data signal Sd1, so that the pin connector 116 outputs a second control signal Sc2 to perform the power-off operation (i.e., the predetermined operation). When the real-time clock 112 outputs the first control signal Sc1 to perform the power-off operation, the real-time clock 112 can output the first data signal Sd1 to the controller 114 to notify the controller 114, so that the controller 114 generates the second data signal Sd2 to report, for example, to the user or an external control device.
[0037] Therefore, by means of Figure 1 The control system 100 can achieve time-related control without the need for an external external frequency (OOB) module, thus reducing the complexity of the device and control system and related costs.
[0038] According to the embodiments, such as Figure 1 As shown, the control system 100 may further include a motherboard 10, wherein a storage device 110, a battery 118, a backup power supply 119, and a controlled device 120 may be mounted on the motherboard 10. Figure 1 As shown, a processor 130 can be installed on the motherboard 10 to control the overall system. The processor 130 may include a central processing unit, a microprocessor, a microcontroller, etc.
[0039] According to the embodiments, such as Figure 1As shown, the storage device 110 may further include an interface 111, coupled to the second end of the controller 114, for accessing the second data signal Sd2 between the controller 114 and the external device. The interface 111 may be an electroplated connecting component (commonly referred to as a gold finger connector) of the storage device 110, for electrically connecting to an external device (e.g., a slot, connecting wire, chip, control circuit, etc.) located on the motherboard 10.
[0040] According to an embodiment, interface 111 may include a serial advanced technology attachment (SATA) interface, a peripheral component interconnect express (PCIe) interface, and / or other supported interfaces.
[0041] According to an embodiment, the second control signal Sc2 may be the first control signal Sc1, or a different signal generated based on the first control signal Sc1. The second control signal Sc2 may be a trigger signal, such as providing a pulse at a predetermined time to trigger and control the controlled device 120.
[0042] According to the embodiment, the first data signal Sd1 and the second data signal Sd2 may be the same signal, or one of the first data signal Sd1 and the second data signal Sd2 may be a signal generated according to the other.
[0043] Figure 2 This is a schematic diagram of a control system 200 coupled to a host computer 199 in another embodiment. The control system 200 may be similar to... Figure 1 The control system 100 is similar and will not be repeated here. However, according to the embodiment, Figure 2 The controlled device 120 may be a switch located on the host 188, which may be coupled to another host 199. The predetermined operation described above may include controlling this switch (i.e., the controlled device 120) to perform a power-on operation, a power-off operation, and / or a reset operation on the host 199 via a third control signal Sc3. In other words, by using the control system 200, the host 188 can perform a power-on operation, a power-off operation, and / or a reset operation on the host 199 at a predetermined time, wherein at the predetermined time, the state of the host 188 and the host 199 may not be limited to being powered on or off.
[0044] According to the embodiments, the shutdown described herein corresponds to a state of complete shutdown (e.g., but not limited to, the shutdown state defined by system state S5 of Microsoft system), rather than a sleep state or standby state (e.g., the sleep state defined by system state S3 or S4 of Microsoft system).
[0045] According to an embodiment, Figure 1 and Figure 2 The controller 114, and Figure 2 The software and / or firmware of the host 199 can be appropriately adjusted for relevant control.
[0046] In summary, by using the control systems 100 and 200 provided in the embodiments, the storage device 110 can be used to perform predetermined operations such as power-on, power-off, and reset on the host or other host where the control system is located at a predetermined time, and the use of an out-of-band (OOB) module can be avoided. Therefore, it is beneficial to reduce the related hardware complexity and reduce costs.
[0047] The above description is only a preferred embodiment of the present invention. All equivalent changes and modifications made in accordance with the claims of the present invention should be included within the scope of the present invention.
Claims
1. A control system, comprising: A storage device, which is a solid-state drive (SSD), comprising: A real-time clock is used to access a first data signal corresponding to a first control signal and to output the first control signal at a predetermined time. The real-time clock includes a first terminal for outputting the first control signal, a second terminal for accessing the first data signal, a third terminal coupled to a battery for receiving battery power, and a fourth terminal coupled to a backup power source for receiving backup power. When an external power source coupled to the storage device stops supplying power, the real-time clock is powered by the battery power and / or the backup power source to continue operating. A controller for accessing the first data signal and accessing a second data signal corresponding to the first data signal, the controller including a first terminal coupled to the second terminal of the real-time clock for accessing the first data signal, and a second terminal for accessing the second data signal; and A pin connector for receiving the first control signal and outputting a second control signal, the pin connector including a first end coupled to the first end of the real-time clock for receiving the first control signal, and a second end for outputting the second control signal; and A controlled device, coupled to the second end of the pin connector, is used to receive the second control signal and perform a predetermined operation at the predetermined time.
2. The control system of claim 1, wherein the controlled device is a main power control unit of a host, and the predetermined operation includes controlling the main power control unit to perform a power-on operation, a power-off operation, and / or a reset operation on the host.
3. The control system of claim 1, wherein the controlled device is a switch of a first host computer coupled to a second host computer, and the predetermined operation includes controlling the switch to perform a power-on operation, a power-off operation, and / or a reset operation on the second host computer.
4. The control system of claim 1, wherein the storage device further includes an interface coupled to the second end of the controller for accessing the second data signal between the controller and an external device.
5. The control system of claim 4, wherein the interface includes a serial advanced technology attachment interface and / or a peripheral component interconnection fast transfer interface.
6. The control system of claim 1, further comprising a motherboard, wherein the storage device, the battery, the backup power supply and the controlled device are disposed on the motherboard.
7. The control system of claim 1, wherein the first control signal is the second control signal.
8. The control system of claim 1, wherein one of the first data signal and the second data signal is generated based on the other.
9. The control system of claim 1, wherein the first data signal is used to notify the real-time clock of the predetermined time and the predetermined operation.
10. The control system of claim 1, wherein when the real-time clock outputs the first control signal, the real-time clock outputs the first data signal to notify the controller.