Variable resistance circuit, electronic device, and vehicle

By using a ladder network consisting of N resistors and N+1 switches and utilizing the connection states of a single-pole multi-throw switch, the problem of requiring a large number of resistors in existing circuits is solved, enabling the selection of various resistance values ​​and high-precision resistor circuits.

CN116203295BActive Publication Date: 2026-06-16BEIJING CO WHEELS TECH CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
BEIJING CO WHEELS TECH CO LTD
Filing Date
2022-06-14
Publication Date
2026-06-16

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Abstract

The application provides a variable resistance circuit, an electronic device and a vehicle. The variable resistance circuit comprises N resistors, N+1 switches, a first port and a second port, each switch comprising a movable contact; the N+1 switches comprise N-1 first switches connected to two adjacent resistors at the same time and second switches and third switches connected to both ends of the N resistors in series respectively; a first fixed contact is connected to the second port, and a second fixed contact is connected to the first port; in the series direction of the N resistors, the third fixed contact of the first switch connected to the front end of the resistor is connected to the movable contact of the switch connected to the rear end of the same resistor; and the resistance values of the N resistors are all different. Through the ladder network composed of the N resistors and the N+1 switches, and through different connection states of the single-pole multi-throw switch, different resistors in the N resistors are selected, and more resistance values are provided through fewer resistors.
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Description

Technical Field

[0001] This application relates to the field of resistor network topology technology, and more particularly to a variable resistor circuit, electronic device, and vehicle. Background Technology

[0002] Precision resistor networks are widely used in circuits. Many circuit designs require a large number of resistors to achieve resistance value transformation; that is, a relatively large number of resistors are needed to achieve multiple resistance values ​​for a variable resistor. For example, N resistors can only provide N resistance values. The current need is for a variable resistor that can achieve more resistance values ​​and higher precision using fewer resistors. Summary of the Invention

[0003] This application provides a variable resistor circuit, electronic device, and vehicle to achieve a higher resistance value with a smaller amount of resistor. The technical solution of this application is as follows:

[0004] In a first aspect, embodiments of this application provide a variable resistor circuit, comprising: N resistors, N+1 switches, a first port, and a second port, wherein...

[0005] Each of the switches includes a movable contact; N is a positive integer greater than 1; the N resistors are connected in series, and the two ends of each resistor are respectively connected to the movable contact of one of the switches;

[0006] The N+1 switches include N-1 first switches that simultaneously connect two adjacent resistors, and second and third switches that are respectively connected to the two ends of the N series resistors; the first switch includes a first fixed contact, a second fixed contact, and a third fixed contact, the second switch includes a first fixed contact, and the third switch includes a second fixed contact;

[0007] The first fixed contact is connected to the second port, and the second fixed contact is connected to the first port; along the series connection direction of the N resistors, the third fixed contact of the first switch connected to the front end of the resistor is connected to the movable contact of the switch connected to the rear end of the same resistor; the resistance values ​​of the N resistors are all different.

[0008] In some embodiments, the resistance values ​​of the N resistors are all multiples of R, wherein the smallest resistance value among the N resistors is R.

[0009] In some embodiments, the switch includes a first fixed contact, a second fixed contact, a third fixed contact, and a fourth fixed contact, wherein the fourth fixed contact is a floating contact; the switch includes four switch branches, each switch branch including an inverter, a first switching transistor, and a second switching transistor, wherein a first terminal of the first switching transistor is electrically connected to a movable contact, a second terminal of the first switching transistor is electrically connected to a first terminal of the second switching transistor, a control terminal of the first switching transistor is electrically connected to the input terminal of the inverter, and a control terminal of the second switching transistor is electrically connected to the output terminal of the inverter; the input terminals of the inverters of each of the four switch branches are respectively connected to a switch control terminal, and the second terminals of the second switching transistors of each of the four switch branches are respectively electrically connected to the first fixed contact, the second fixed contact, the third fixed contact, and the fourth fixed contact.

[0010] In some embodiments, the switch includes a first fixed contact, a second fixed contact, and a third fixed contact. The switch includes three switch branches, each of which includes an inverter, a first switching transistor, and a second switching transistor. The first terminal of the first switching transistor is electrically connected to a movable contact, the second terminal of the first switching transistor is electrically connected to the first terminal of the second switching transistor, and the control terminal of the first switching transistor is electrically connected to the input terminal of the inverter. The control terminal of the second switching transistor is electrically connected to the output terminal of the inverter.

[0011] The input terminals of the inverters in each of the three switch branches are respectively connected to a switch control terminal, and the second terminals of the second switching transistors in each of the three switch branches are respectively electrically connected to the first fixed contact, the second fixed contact, and the third fixed contact.

[0012] In some embodiments, the switch includes a first fixed contact, a second fixed contact, and a third fixed contact. The switch includes three switch branches, three NAND gates, and five inverters. The three NAND gates are a first NAND gate, a second NAND gate, and a third NAND gate, and the five inverters are a first inverter, a second inverter, a third inverter, a fourth inverter, and a fifth inverter.

[0013] The input terminals of the first inverter and the second inverter are respectively connected to two switch control terminals. The input terminal of the first inverter is simultaneously connected to the first input terminal of the first NAND gate and the first input terminal of the third NAND gate. The output terminal of the first inverter is connected to the first input terminal of the second NAND gate. The input terminal of the second inverter is simultaneously connected to the second input terminal of the second NAND gate and the second input terminal of the third NAND gate. The output terminal of the second inverter is connected to the second input terminal of the first NAND gate. The output terminals of the first, second, and third NAND gates are respectively connected to the input terminals of the third, fourth, and fifth inverters.

[0014] Each of the switch branches includes a branch inverter, a first switching transistor, and a second switching transistor. The first terminal of the first switching transistor is electrically connected to a movable contact, and the second terminal of the first switching transistor is electrically connected to the first terminal of the second switching transistor. The control terminal of the first switching transistor is electrically connected to the input terminal of the branch inverter. The control terminal of the second switching transistor is electrically connected to the output terminal of the branch inverter. The input terminals of the branch inverters of the three switch branches are respectively connected to the output terminals of the third, fourth, and fifth inverters. The second terminals of the second switching transistors of the three switch branches are respectively electrically connected to the first fixed contact, the second fixed contact, and the third fixed contact.

[0015] In some embodiments, the first switching transistor is an N-channel MOS transistor, and the second switching transistor is a P-channel MOS transistor.

[0016] In some embodiments, the switch includes a first fixed contact, a second fixed contact, and a third fixed contact. The switch also includes three switching transistors. The first terminals of the three switching transistors are connected to a movable contact, and the control terminals of the three switching transistors are respectively connected to three switch control terminals. The output terminals of the three switching transistors are respectively electrically connected to the first fixed contact, the second fixed contact, and the third fixed contact.

[0017] In some embodiments, the switch includes a first fixed contact, a second fixed contact, and a third fixed contact. The switch includes three switch branches, three NAND gates, and five inverters. The three NAND gates are a first NAND gate, a second NAND gate, and a third NAND gate, and the five inverters are a first inverter, a second inverter, a third inverter, a fourth inverter, and a fifth inverter.

[0018] The input terminals of the first inverter and the second inverter are respectively connected to two switch control terminals. The input terminal of the first inverter is simultaneously connected to the first input terminal of the first NAND gate and the first input terminal of the third NAND gate. The output terminal of the first inverter is connected to the first input terminal of the second NAND gate. The input terminal of the second inverter is simultaneously connected to the second input terminal of the second NAND gate and the second input terminal of the third NAND gate. The output terminal of the second inverter is connected to the second input terminal of the first NAND gate. The output terminals of the first, second, and third NAND gates are respectively connected to the input terminals of the third, fourth, and fifth inverters.

[0019] Each of the three switch branches includes a switching transistor, and the first terminal of each switching transistor is connected to a movable contact. The control terminals of the switching transistors of the three switch branches are respectively connected to the output terminals of the third inverter, the fourth inverter, and the fifth inverter. The second terminals of the switching transistors of the three switch branches are respectively electrically connected to the first fixed contact, the second fixed contact, and the third fixed contact.

[0020] Secondly, embodiments of this application provide an electronic device including any of the variable resistor circuits described in the first aspect.

[0021] Thirdly, embodiments of this application provide a vehicle including the electronic device provided in the second aspect.

[0022] The technical solution provided in this application has at least the following beneficial effects:

[0023] This invention utilizes a ladder network consisting of N resistors and N+1 switches, where the switches are single-pole multi-throw (SPMT) switches. By adjusting the connection states of the SPMT switches, the selection of one or more resistors from the N resistors can be achieved. Even when the resistance values ​​of the N resistors are all different, a variety of resistance values ​​can be selected using only the N resistors. Therefore, this application can provide a greater resistance value with fewer resistors, and the circuit structure is simple and easy to implement.

[0024] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and do not limit this application. Attached Figure Description

[0025] Figure 1 This is a circuit diagram illustrating a variable resistor circuit according to an exemplary embodiment.

[0026] Figure 2 yes Figure 1 The circuit diagram corresponding to the number of resistors in the circuit is 2.

[0027] Figure 3 yes Figure 1 The circuit diagram corresponding to the number of resistors in the middle is 3.

[0028] Figure 4 This is a circuit diagram illustrating an implementation of a single-pole four-throw switch according to an exemplary embodiment.

[0029] Figure 5 This is a circuit diagram illustrating an implementation of a single-pole three-throw switch according to another exemplary embodiment.

[0030] Figure 6 This is a circuit diagram illustrating an implementation of a single-pole three-throw switch according to yet another exemplary embodiment.

[0031] Figure 7 This is a circuit diagram illustrating an implementation of a single-pole three-throw switch according to yet another exemplary embodiment.

[0032] Figure 8 This is a circuit diagram illustrating an implementation of a single-pole three-throw switch according to yet another exemplary embodiment.

[0033] Figure 9 This is a circuit diagram of a variable resistor circuit according to a specific embodiment.

[0034] Figure 10 This is a circuit diagram of a variable resistor circuit according to another specific embodiment. Detailed Implementation

[0035] To better understand the above-mentioned objectives, features, and advantages of this application, the solution of this application will be further described below. It should be noted that, unless otherwise specified, the embodiments and features described in these embodiments can be combined with each other.

[0036] Many specific details are set forth in the following description in order to provide a full understanding of this application, but this application may also be implemented in other ways different from those described herein; obviously, the embodiments in the specification are only some embodiments of this application, and not all embodiments.

[0037] Figure 1 This is a circuit diagram of a variable resistor circuit according to one embodiment of this application. Figure 1 As shown, the variable resistor circuit includes N resistors, N+1 switches, a first port (V1) and a second port (V2), wherein each switch includes a movable contact; N is a positive integer greater than 1.

[0038] N resistors are connected in series, and each resistor is connected to the movable contact of a switch at both ends; thus, the N resistors and N+1 switches form a ladder network structure, and the N resistors are connected to the movable contacts of the N+1 switches; that is, all connection points of the series resistor structure are connected to the movable contacts of a switch.

[0039] The N+1 switches include N-1 first switches that are simultaneously connected to two adjacent resistors, and N second and third switches connected to the two ends of the series resistors respectively; the first switch includes a first fixed contact, a second fixed contact, and a third fixed contact, the second switch includes a first fixed contact, and the third switch includes a second fixed contact.

[0040] It should be noted that the first switch includes at least a first fixed contact, a second fixed contact, and a third fixed contact; the second switch includes at least a first fixed contact; and the third switch includes at least a second fixed contact. The first switch is a single-pole multi-throw switch, while the second and third switches can be single-pole single-throw switches or single-pole multi-throw switches (including single-pole double-throw switches). For example, ... Figure 1 As shown, all switches in this embodiment are single-pole four-throw switches.

[0041] The first fixed contact is connected to the second port, and the second fixed contact is connected to the first port. Along the series connection direction of the N resistors, the third fixed contact of the first switch connected to the front end of the resistor is connected to the movable contact of the switch connected to the rear end of the same resistor. It should be noted that the switch connected to the rear end of the same resistor may be the first switch or the last switch in the series direction, i.e., the third switch.

[0042] The resistance values ​​of the N resistors are all different.

[0043] It should be noted that although the second and third switches can be single-pole single-throw switches, for the sake of simplifying the structure, the embodiments of this application are described with the first, second, and third switches having the same structure.

[0044] The circuit diagram of the variable resistor circuit is shown below, taking N=2 as an example. Figure 2 As shown, S0 (second switch), S1 (first switch), and S2 (third switch) are all single-pole four-throw switches. Each switch includes four fixed contacts, namely fixed contact 0 to fixed contact 3. All fixed contacts 0 are left floating, all fixed contacts 1 are connected to the second port V2, and all fixed contacts 2 are connected to the first port V1. Except for the last switch S2, whose fixed contact 3 is left floating, the fixed contacts 3 of the other switches are all connected to the movable contact of the next adjacent switch.

[0045] It can be seen that different circuits can be formed when the movable contacts of switches S0, S1, and S2 are connected to different fixed contacts 0, 1, and 2. Table 1 below shows multiple switch states of the three switches to obtain different resistance values ​​between the first port V1 and the second port V2.

[0046] Table 1:

[0047] resistance S0 S1 S2 R1 1 2 0 R2 0 1 2 R1+R2 1 0 2

[0048] According to Table 1, when N=2, the variable resistor circuit can provide three different resistance values ​​when the resistance values ​​of the two resistors are not the same.

[0049] The circuit diagram of the variable resistor circuit is shown below, taking N=3 as an example. Figure 3 As shown, S0, S1, S2, and S4 are all single-pole four-throw switches. Table 2 below shows the switching states of the four switches to obtain different resistance values ​​between the first port V1 and the second port V2.

[0050] Table 2:

[0051]

[0052]

[0053] According to Table 2, when N=3, with all three resistors having different resistance values, this variable resistor circuit can provide seven different resistance values. Therefore, it can be seen that... Figure 1 The variable resistor circuit shown can provide (2) through N resistors. N -1) resistance values.

[0054] It should be noted that in this variable resistor circuit, from left to right, the fixed contacts 2 and 3 of the first switch S0 (i.e., the second switch) are inactive, and the fixed contacts 1 and 3 of the last switch Sn (i.e., the third switch) are also inactive. In other words, single-pole double-throw switches can also be used for the first switch S0 and the last switch Sn.

[0055] It should also be noted that, depending on the different resistance values ​​of the N resistors, this variable resistor circuit can achieve a variety of resistance values. If all N resistors have different resistance values, the maximum possible resistance value is (2...). N -1) Selection of resistance value.

[0056] The variable resistor circuit in this embodiment uses a ladder network composed of N resistors and N+1 switches, where the switches are single-pole multi-throw (SPMT) switches. By varying the connection states of the SPMT switches, the selection of one or more of the N resistors can be achieved. Even when the resistance values ​​of the N resistors are all different, multiple resistance values ​​can be selected using only N resistors, thus enabling the provision of a higher resistance value with fewer resistors. Furthermore, the circuit structure is simple and easy to implement.

[0057] Based on the above embodiment, the nth resistor among the N resistors of the variable resistor circuit is denoted as resistor R. n (1≤n≤N), resistor R1 to resistor R n The method for setting the value is as follows:

[0058] R1 = 2 0 R

[0059] R2 = 2 1 R

[0060]

[0061] R n-1 =2 n-2 R

[0062] R n =2 n-1 R

[0063] resistor R n The resistance is 2 n-1 Given N resistors, each with a resistance value that is a multiple of R, the smallest resistor among the N resistors has a resistance value of R, the precision of this variable resistor circuit, the minimum resistance value (LSB) of the smallest resistor, the maximum resistance value (MSB) of the largest resistor, and the maximum resistance value (R) of this variable resistor circuit. max They are as follows:

[0064] precision=R

[0065] LSB=R

[0066] MSB=2 N-1 R

[0067] R max =(2 N -1)R

[0068] The variable resistor circuit in this embodiment will Figure 1 The resistance values ​​of the N resistors in the variable resistor circuit shown are set to R. n =2 n-1 R can be provided by N resistors (2 N -1) resistance values, and multiple resistance values ​​have high precision.

[0069] Based on any of the above embodiments, Figure 4 This is a circuit diagram of a single-pole four-throw switch according to an embodiment of this application. Figure 4 As shown, the switch includes a first fixed contact, a second fixed contact, a third fixed contact, and a fourth fixed contact, with the fourth fixed contact being a floating contact. The switch includes four switching branches, each of which includes an inverter, a first switching transistor, and a second switching transistor. The first terminal of the first switching transistor is electrically connected to a movable contact, and the second terminal of the first switching transistor is electrically connected to the first terminal of the second switching transistor. The control terminal of the first switching transistor is electrically connected to the input terminal of the inverter, and the control terminal of the second switching transistor is electrically connected to the output terminal of the inverter.

[0070] The input terminals of the inverters in each of the four switch branches are connected to a switch control terminal, and the second terminals of the second switch transistors in each of the four switch branches are electrically connected to the first fixed contact, the second fixed contact, the third fixed contact, and the fourth fixed contact, respectively.

[0071] The first switching transistor is an N-channel MOSFET, and the second switching transistor is a P-channel MOSFET. Since two different types of switching transistors are used, an inverter is needed to control both transistors to turn on and off simultaneously.

[0072] Taking a single switch Sn as an example, if the values ​​of V1 and V2 are uncertain, the following can be used: Figure 4 The switch shown is of the following form. Figure 4 In the table, C0, C1, C2, and C3 are the switch control terminals, and the multiple switch states of switch Sn are shown in Table 3.

[0073] Table 3:

[0074] Sn state C0 C1 C2 C3 0 1 0 0 0 1 0 1 0 0 2 0 0 1 0 3 0 0 0 1

[0075] It can be seen that the four switching states of switch Sn are realized based on the different input signals of the four switch control terminals (C0, C1, C2, C3).

[0076] This can be understood as the four switching states of each switch corresponding to four connection relationships between the movable contact and the four fixed contacts of a single-pole four-throw switch. As an example, the four switching states of switch Sn are state 0, state 1, state 2, and state 3. State 0 corresponds to the movable contact connecting to fixed contact 0, state 1 corresponds to the movable contact connecting to contact 1, state 2 corresponds to the movable contact connecting to contact 2, and state 3 corresponds to the movable contact connecting to fixed contact 3.

[0077] It should be noted that the first fixed contact, the second fixed contact, and the third fixed contact correspond to fixed contacts 1 through 3, respectively, and the fourth fixed contact corresponds to fixed contact 0.

[0078] The single-pole four-throw switch in this embodiment is implemented by using multiple switching transistors to realize multiple switching branches, thereby achieving multiple switching states of the switch by controlling the different outputs of multiple switching branches.

[0079] Figure 5 This is a circuit diagram of a single-pole three-throw switch according to another embodiment of this application. Figure 4 An optimization of the implementation of the single-pole four-throw switch shown. For example... Figure 5 As shown, the switch includes a first fixed contact, a second fixed contact, and a third fixed contact. The switch includes three switching branches. Each switching branch includes an inverter, a first switching transistor, and a second switching transistor. The first terminal of the first switching transistor is electrically connected to the movable contact, the second terminal of the first switching transistor is electrically connected to the first terminal of the second switching transistor, the control terminal of the first switching transistor is electrically connected to the input terminal of the inverter, and the control terminal of the second switching transistor is electrically connected to the output terminal of the inverter.

[0080] The input terminals of the inverters in each of the three switching branches are connected to a switch control terminal, and the second terminals of the second switching transistors in each of the three switching branches are electrically connected to the first fixed contact, the second fixed contact, and the third fixed contact, respectively. The first switching transistor is an N-channel MOSFET, and the second switching transistor is a P-channel MOSFET.

[0081] Taking a single switch Sn as an example, if the values ​​of V1 and V2 are uncertain, each switch can be used... Figure 5 The switch shown is of the following form. Figure 5 In the table, C0, C1, and C2 are three switch control terminals, and the four switch states of switch Sn are shown in Table 4.

[0082] Table 4:

[0083] Sn state C0 C1 C2 0 0 0 0 1 1 0 0 2 0 1 0 3 0 0 1

[0084] It can be seen that, compared to Figure 4 The switch implementation shown reduces one switch branch, which is equivalent to reducing one switch control terminal signal, i.e., reducing control pins. Similarly, four switching states of switch Sn can be achieved based on different input signals from the three switch control terminals (C0, C1, C2).

[0085] At the same time, compared to Figure 4 The four fixed contacts (0-3) are in the middle. Figure 5 The fixed contacts in the circuit are changed to three (1-3) because when controlling... Figure 5 When none of the three fixed contacts are connected, it is equivalent to the movable contact being connected. Figure 4 The fixed contact 0 is suspended in the middle. In other words, both the second and third switches can be implemented using a single-pole single-throw switch.

[0086] The single-pole triple-throw switch implemented in this embodiment uses multiple switching transistors to create multiple switching branches, thereby controlling the different outputs of these branches to achieve various switching states. Furthermore, the circuit structure is simple and easy to implement.

[0087] To further reduce the number of control pins Figure 6 This is a circuit diagram of a single-pole three-throw switch according to yet another embodiment of this application. Figure 6 As shown, the switch includes a first fixed contact, a second fixed contact, and a third fixed contact. The switch includes three switch branches, three NAND gates, and five inverters. The three NAND gates are the first NAND gate, the second NAND gate, and the third NAND gate. The five inverters are the first inverter, the second inverter, the third inverter, the fourth inverter, and the fifth inverter.

[0088] The inputs of the first inverter and the second inverter are respectively connected to two switch control terminals. The input of the first inverter is also connected to the first input of the first NAND gate and the first input of the third NAND gate. The output of the first inverter is connected to the first input of the second NAND gate. The input of the second inverter is also connected to the second input of the second NAND gate and the second input of the third NAND gate. The output of the second inverter is connected to the second input of the first NAND gate. The outputs of the first, second, and third NAND gates are respectively connected to the inputs of the third, fourth, and fifth inverters.

[0089] Each switching branch includes a branch inverter, a first switching transistor, and a second switching transistor. The first terminal of the first switching transistor is electrically connected to a movable contact, and the second terminal of the first switching transistor is electrically connected to the first terminal of the second switching transistor. The control terminal of the first switching transistor is electrically connected to the input terminal of the branch inverter. The control terminal of the second switching transistor is electrically connected to the output terminal of the branch inverter. The input terminals of the branch inverters of each of the three switching branches are respectively connected to the output terminals of the third, fourth, and fifth inverters. The second terminal of the second switching transistor of each of the three switching branches is respectively electrically connected to the first, second, and third fixed contacts. The first switching transistor is an N-channel MOSFET, and the second switching transistor is a P-channel MOSFET.

[0090] The multiple switch states of switch Sn are shown in Table 5.

[0091] Table 5:

[0092] Sn state C0 C1 0 0 0 1 1 0 2 0 1 3 1 1

[0093] The single-pole triple-throw switch implemented in this embodiment uses multiple switching transistors to create multiple switching branches, thereby controlling different outputs of these branches to achieve various switching states. Furthermore, it requires fewer control pins, simplifying the control signal output.

[0094] When the first port V1 is greater than the second port V2 Figure 5 The implementation of the switching circuit shown can be further simplified. Figure 7 This is a circuit diagram of a single-pole three-throw switch according to yet another embodiment of this application. Figure 7 As shown, the switch includes three switching transistors. The first terminals of the three switching transistors are connected to a movable contact, and the control terminals of the three switching transistors are respectively connected to three switch control terminals (C0, C1, C2). The switch also includes a first fixed contact, a second fixed contact, and a third fixed contact. The output terminals of the three switching transistors are electrically connected to the first fixed contact, the second fixed contact, and the third fixed contact, respectively, to realize multiple switching states of the switch according to different input signals from the three switch control terminals (C0, C1, C2). The multiple switching states of switch Sn are shown in Table 4.

[0095] The single-pole three-throw switch implementation in this embodiment uses multiple switching transistors to create multiple switching branches, thereby controlling the different outputs of these multiple switching branches to achieve various switching states. Furthermore, compared to the above... Figure 5 The switch implementation shown in the embodiment further simplifies the circuit structure, making it easier to implement and saving costs.

[0096] Similarly, when the first port V1 is greater than the second port V2... Figure 6 The implementation of the switching circuit shown can be further simplified. Figure 8 This is a circuit diagram of a single-pole three-throw switch according to yet another embodiment of this application. Figure 8 As shown, the switch includes a first fixed contact, a second fixed contact, and a third fixed contact. The switch includes three switch branches, three NAND gates, and five inverters. The three NAND gates are the first NAND gate, the second NAND gate, and the third NAND gate. The five inverters are the first inverter, the second inverter, the third inverter, the fourth inverter, and the fifth inverter.

[0097] The inputs of the first inverter and the second inverter are respectively connected to two switch control terminals. The input of the first inverter is also connected to the first input of the first NAND gate and the first input of the third NAND gate. The output of the first inverter is connected to the first input of the second NAND gate. The input of the second inverter is also connected to the second input of the second NAND gate and the second input of the third NAND gate. The output of the second inverter is connected to the second input of the first NAND gate. The outputs of the first, second, and third NAND gates are respectively connected to the inputs of the third, fourth, and fifth inverters.

[0098] Each switching branch includes a switching transistor. The first terminal of each switching transistor is connected to a movable contact. The control terminals of the switching transistors in each of the three switching branches are respectively connected to the output terminals of the third, fourth, and fifth inverters. The second terminals of the switching transistors in each of the three switching branches are electrically connected to the first, second, and third fixed contacts, respectively, to realize multiple switching states of the switch according to different input signals from the two switch control terminals (C0, C1). The three switching transistors can be N-channel MOSFETs.

[0099] The single-pole triple-throw switch implemented in this embodiment uses multiple switching transistors to create multiple switching branches, thereby controlling the different outputs of these branches to achieve various switching states. This method requires fewer control pins, has a simple circuit structure, is easy to implement, and saves costs.

[0100] As an example, with Figure 2 Taking the variable resistor circuit shown as an example, Figure 6 The switch structure shown, when combined with other components, yields a variable resistor circuit for N=2, as shown below. Figure 9 As shown, N can be deduced by analogy for other conditions. Table 6 below shows the switching states of the three switches when different resistance values ​​are obtained between the first port V1 and the second port V2.

[0101] Table 6:

[0102]

[0103] As another example, with Figure 1 The variable resistor circuit shown is... Figure 6 The switch structure combination shown results in a variable resistor circuit as follows: Figure 10 As shown.

[0104] The variable resistor circuit of this application embodiment provides a general-purpose circuit that provides (2) resistors with N resistors. N -1) A form of resistance value with a precision of R. This achieves a larger resistance value and higher precision using fewer resistors. The variable resistor circuit of this application can be applied to various circuits, such as digital potentiometers, gain adjustment units in amplifier circuits, and compensation circuits.

[0105] In other words, the variable resistor circuit of this application embodiment can be applied to various circuits in a vehicle, such as digital potentiometers, gain adjustment units in amplifier circuits, and compensation circuits.

[0106] One embodiment of this application provides an electronic device that includes the variable resistor circuit of any of the above embodiments.

[0107] One embodiment of this application provides a vehicle that includes the electronic devices described in the above embodiment.

[0108] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, an indirect connection through an intermediate medium, or the internal communication between two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0109] The devices or elements referred to in this application or implied herein must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as limiting this application. In the description of this application, "a plurality of" means two or more, unless otherwise precisely specified.

[0110] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the term "comprising" or any other variations thereof is intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0111] Other embodiments of this application will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only.

[0112] It should be understood that this application is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this application is limited only by the appended claims.

Claims

1. A variable resistor circuit, characterized in that, include: N resistors, N+1 switches, a first port and a second port, wherein each switch includes a movable contact; N is a positive integer greater than 1; The N resistors are connected in series, and each of the resistors is connected to a movable contact of the switch at both ends; The N+1 switches include N-1 first switches that simultaneously connect two adjacent resistors, and second and third switches that are respectively connected to the two ends of the N series resistors; the first switch includes a first fixed contact, a second fixed contact, and a third fixed contact, the second switch includes a first fixed contact, and the third switch includes a second fixed contact; The first fixed contact is connected to the second port, and the second fixed contact is connected to the first port; along the series connection direction of the N resistors, the third fixed contact of the first switch connected to the front end of the resistor is connected to the movable contact of the switch connected to the rear end of the same resistor; The resistance values ​​of the N resistors are all different; The switch includes a first fixed contact, a second fixed contact, a third fixed contact, and a fourth fixed contact, wherein the fourth fixed contact is a floating contact. The switch includes four switch branches, each of which includes an inverter, a first switching transistor, and a second switching transistor. The first terminal of the first switching transistor is electrically connected to a movable contact, and the second terminal of the first switching transistor is electrically connected to the first terminal of the second switching transistor. The control terminal of the first switching transistor is electrically connected to the input terminal of the inverter. The control terminal of the second switching transistor is electrically connected to the output terminal of the inverter. The input terminals of the inverters in each of the four switch branches are respectively connected to a switch control terminal, and the second terminals of the second switching transistors in each of the four switch branches are respectively electrically connected to the first fixed contact, the second fixed contact, the third fixed contact, and the fourth fixed contact.

2. The variable resistor circuit as described in claim 1, characterized in that, The resistance values ​​of the N resistors are all multiples of R, and the smallest resistance value among the N resistors is R.

3. The variable resistor circuit as described in claim 1, characterized in that, The switch includes a first fixed contact, a second fixed contact, and a third fixed contact. The switch also includes three switch branches. Each switch branch includes an inverter, a first switching transistor, and a second switching transistor. The first terminal of the first switching transistor is electrically connected to a movable contact, and the second terminal of the first switching transistor is electrically connected to the first terminal of the second switching transistor. The control terminal of the first switching transistor is electrically connected to the input terminal of the inverter. The control terminal of the second switching transistor is electrically connected to the output terminal of the inverter. The input terminals of the inverters in each of the three switch branches are respectively connected to a switch control terminal, and the second terminals of the second switching transistors in each of the three switch branches are respectively electrically connected to the first fixed contact, the second fixed contact, and the third fixed contact.

4. The variable resistor circuit as described in claim 1, characterized in that, The switch includes a first fixed contact, a second fixed contact, and a third fixed contact. The switch also includes three switch branches, three NAND gates, and five inverters. The three NAND gates are the first NAND gate, the second NAND gate, and the third NAND gate. The five inverters are the first inverter, the second inverter, the third inverter, the fourth inverter, and the fifth inverter. The input terminals of the first inverter and the second inverter are respectively connected to two switch control terminals. The input terminal of the first inverter is simultaneously connected to the first input terminal of the first NAND gate and the first input terminal of the third NAND gate. The output terminal of the first inverter is connected to the first input terminal of the second NAND gate. The input terminal of the second inverter is simultaneously connected to the second input terminal of the second NAND gate and the second input terminal of the third NAND gate. The output terminal of the second inverter is connected to the second input terminal of the first NAND gate. The output terminals of the first, second, and third NAND gates are respectively connected to the input terminals of the third, fourth, and fifth inverters. Each of the switch branches includes a branch inverter, a first switching transistor, and a second switching transistor. The first terminal of the first switching transistor is electrically connected to a movable contact, and the second terminal of the first switching transistor is electrically connected to the first terminal of the second switching transistor. The control terminal of the first switching transistor is electrically connected to the input terminal of the branch inverter. The control terminal of the second switching transistor is electrically connected to the output terminal of the branch inverter. The input terminals of the branch inverters of the three switch branches are respectively connected to the output terminals of the third, fourth, and fifth inverters. The second terminals of the second switching transistors of the three switch branches are respectively electrically connected to the first fixed contact, the second fixed contact, and the third fixed contact.

5. The variable resistor circuit as described in any one of claims 1 to 4, characterized in that, The first switching transistor is an N-channel MOS transistor, and the second switching transistor is a P-channel MOS transistor.

6. The variable resistor circuit as described in claim 1, characterized in that, The switch includes a first fixed contact, a second fixed contact, and a third fixed contact. The switch also includes three switching transistors. The first terminals of the three switching transistors are connected to a movable contact, and the control terminals of the three switching transistors are respectively connected to three switch control terminals. The output terminals of the three switching transistors are respectively electrically connected to the first fixed contact, the second fixed contact, and the third fixed contact.

7. The variable resistor circuit as described in claim 1, characterized in that, The switch includes a first fixed contact, a second fixed contact, and a third fixed contact. The switch also includes three switch branches, three NAND gates, and five inverters. The three NAND gates are the first NAND gate, the second NAND gate, and the third NAND gate. The five inverters are the first inverter, the second inverter, the third inverter, the fourth inverter, and the fifth inverter. The input terminals of the first inverter and the second inverter are respectively connected to two switch control terminals. The input terminal of the first inverter is simultaneously connected to the first input terminal of the first NAND gate and the first input terminal of the third NAND gate. The output terminal of the first inverter is connected to the first input terminal of the second NAND gate. The input terminal of the second inverter is simultaneously connected to the second input terminal of the second NAND gate and the second input terminal of the third NAND gate. The output terminal of the second inverter is connected to the second input terminal of the first NAND gate. The output terminals of the first, second, and third NAND gates are respectively connected to the input terminals of the third, fourth, and fifth inverters. Each of the three switch branches includes a switching transistor, and the first terminal of each switching transistor is connected to a movable contact. The control terminals of the switching transistors of the three switch branches are respectively connected to the output terminals of the third inverter, the fourth inverter, and the fifth inverter. The second terminals of the switching transistors of the three switch branches are respectively electrically connected to the first fixed contact, the second fixed contact, and the third fixed contact.

8. An electronic device, characterized in that, Includes the variable resistor circuit as described in any one of claims 1 to 7.

9. A vehicle, characterized in that, Includes the electronic device as described in claim 8.