Display panel, display device and driving method thereof

Abstract

The display panel, the display device and the driving method thereof provided by the present disclosure relate to the technical field of display. The display panel comprises a substrate, a driving layer, a pixel layer and a viewing angle definition layer which are sequentially stacked; wherein the pixel layer comprises a plurality of sub-pixel groups arranged in an array, and any one of the sub-pixel groups comprises a first sub-pixel and a second sub-pixel which are adjacent and of the same color. The viewing angle definition layer is configured such that the light projection space of the first sub-pixel and the light projection space of the second sub-pixel at most partially overlap. The display panel can be thinned.

Description

Technical Field

[0001] This disclosure relates to the field of display technology, and more specifically, to a display panel, a display device, and a driving method thereof. Background Technology

[0002] As display products become increasingly widely used, people expect the same product to meet the needs of multiple application scenarios as much as possible. For example, people expect that when they want to share information with others, the content displayed on the product can be seen by others; at the same time, they expect that when displaying private information, others will have difficulty seeing the content.

[0003] To meet this need, some display products incorporate an adjustable liquid crystal layer on the screen. This layer restricts the light emission angle by adjusting the liquid crystal's orientation, thereby enabling switching between privacy and non-privacy modes. However, the adjustable liquid crystal layer is relatively thick, which hinders the achievement of thinner and lighter display products.

[0004] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of this disclosure, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0005] The purpose of this disclosure is to overcome the shortcomings of the prior art and provide a display panel, display device and driving method thereof, which facilitates the thinning and lightening of the display panel.

[0006] According to a first aspect of this disclosure, a display panel is provided, comprising a substrate, a driving layer, a pixel layer and a viewing angle definition layer stacked sequentially; wherein, the pixel layer comprises an array of sub-pixel groups, and any one of the sub-pixel groups comprises an adjacent first sub-pixel and a second sub-pixel of the same color;

[0007] The viewpoint definition layer enables the light projection space of the first sub-pixel to overlap with the light projection space of the second sub-pixel at most.

[0008] According to one embodiment of the present disclosure, the viewing angle definition layer includes a light-transmitting medium layer and a first color filter layer sequentially stacked on the side of the pixel layer away from the substrate; the first color filter layer includes a viewing angle definition structure corresponding to each of the sub-pixel groups; the sub-pixel groups and the corresponding viewing angle definition structures form a light-emitting unit.

[0009] The light-emitting unit includes a first light-emitting unit; in the first light-emitting unit, the first sub-pixel is located on one side of the second sub-pixel in a first direction; the viewing angle definition structure includes a first light-shielding part corresponding to the first sub-pixel, a second light-shielding part corresponding to the second sub-pixel, and a color resist unit located between the first light-shielding part and the second light-shielding part; the color of the color resist unit is the same as the emission color of the sub-pixel group; wherein, the orthographic projection of the first light-shielding part on the substrate is at least partially located on one side of the first direction of the orthographic projection of the first sub-pixel on the substrate, and exposes at least a portion of the first sub-pixel; wherein, the orthographic projection of the second light-shielding part on the substrate is at least partially located on one side of the second direction of the orthographic projection of the second sub-pixel on the substrate, and exposes at least a portion of the second sub-pixel; the first direction and the second direction are opposite.

[0010] According to one embodiment of the present disclosure, for two first light-emitting units adjacent to each other along the first direction, the second light-shielding portion of the first light-emitting unit located on one side of the first direction is reused as the first light-shielding portion of the first light-emitting unit located on one side of the second direction.

[0011] According to one embodiment of the present disclosure, the viewing angle definition layer includes a light-transmitting medium layer and a first color filter layer sequentially stacked on the side of the pixel layer away from the substrate; the first color filter layer includes a viewing angle definition structure corresponding to each of the sub-pixel groups; the sub-pixel groups and the corresponding viewing angle definition structures form a light-emitting unit.

[0012] The light-emitting unit includes a second light-emitting unit; in the second light-emitting unit, the first sub-pixel is located on a third direction side of the second sub-pixel; the viewing angle definition structure includes a first light-shielding part and a first color resist unit corresponding to the first sub-pixel, and a second light-shielding part and a second color resist unit corresponding to the second sub-pixel; the colors of the first color resist unit and the second color resist unit are the same as the emission color of the sub-pixel group; wherein, the orthographic projection of the first light-shielding part on the substrate is at least partially located on a first direction side of the orthographic projection of the first sub-pixel on the substrate, and exposes at least a portion of the first sub-pixel; ...; the orthographic projection of the first light-shielding part on the substrate is at least partially located on a third direction side of the first sub-pixel. The projection of the second light-shielding unit on the substrate is at least partially located on one side of the second direction of the orthogonal projection of the first sub-pixel on the substrate, and extends along the first direction to connect with the first light-shielding portion; wherein, the orthogonal projection of the second light-shielding portion on the substrate is at least partially located on one side of the second direction of the orthogonal projection of the second sub-pixel on the substrate, and exposes at least a portion of the second sub-pixel; the orthogonal projection of the second color resist unit on the substrate is at least partially located on one side of the first direction of the orthogonal projection of the second sub-pixel on the substrate, and extends along the second direction to connect with the second light-shielding portion; the first direction and the second direction are opposite and perpendicular to the third direction.

[0013] According to one embodiment of the present disclosure, in at least a portion of the light-emitting unit, the first sub-pixel and the first light-shielding portion partially overlap; the size of the overlapping portion of the first sub-pixel and the first light-shielding portion in the first direction does not exceed half the size of the first sub-pixel in the first direction.

[0014] And / or, in at least a portion of the light-emitting unit, the second sub-pixel and the second light-shielding portion partially overlap; the size of the overlapping portion of the second sub-pixel and the second light-shielding portion in the first direction does not exceed half the size of the second sub-pixel in the first direction.

[0015] According to one embodiment of this disclosure, the distance between the first color filter layer and the pixel layer is not less than the size of the sub-pixel group along the first direction.

[0016] According to one embodiment of the present disclosure, the viewpoint definition layer further includes a first black matrix layer located between the pixel layer and the light-transmitting medium layer;

[0017] The viewpoint definition structure further includes a first bottom light-shielding part and a second bottom light-shielding part located on the first black matrix layer; the orthographic projection of the first bottom light-shielding part on the substrate does not exceed the orthographic projection of the first light-shielding part on the substrate; the orthographic projection of the second bottom light-shielding part on the substrate does not exceed the orthographic projection of the second light-shielding part on the substrate.

[0018] According to one embodiment of the present disclosure, the viewing angle definition layer includes a first black matrix layer, a light-transmitting medium layer, and a second black matrix layer sequentially stacked on the side of the pixel layer away from the substrate; the viewing angle definition layer has a viewing angle definition structure corresponding to each of the sub-pixel groups; the sub-pixel groups and the corresponding viewing angle definition structures form a light-emitting unit.

[0019] The light-emitting unit includes a first light-emitting unit; in the first light-emitting unit, the first sub-pixel is located on one side of the second sub-pixel in a first direction; the viewing angle definition structure includes a first light-shielding part and a first bottom light-shielding part corresponding to the first sub-pixel, and a second light-shielding part and a second bottom light-shielding part corresponding to the second sub-pixel; wherein, the first bottom light-shielding part and the second bottom light-shielding part are located in the first black matrix layer, and the first light-shielding part and the second light-shielding part are located in the second black matrix layer; the orthographic projection of the first light-shielding part on the substrate is at least partially located on one side of the first direction of the orthographic projection of the first sub-pixel on the substrate, and exposes at least part of the... The first sub-pixel; the orthographic projection of the first bottom light-shielding portion on the substrate is at least partially located on one side of the first direction of the orthographic projection of the first sub-pixel on the substrate, and exposes at least a portion of the first sub-pixel; the orthographic projection of the second light-shielding portion on the substrate is at least partially located on one side of the second direction of the orthographic projection of the second sub-pixel on the substrate, and exposes at least a portion of the second sub-pixel; the orthographic projection of the second bottom light-shielding portion on the substrate is at least partially located on one side of the second direction of the orthographic projection of the second sub-pixel on the substrate, and exposes at least a portion of the second sub-pixel; the first direction and the second direction are opposite.

[0020] According to one embodiment of the present disclosure, for two first light-emitting units adjacent to each other along the first direction, the second light-shielding portion of the first light-emitting unit located on one side of the first direction is reused as the first light-shielding portion of the first light-emitting unit located on one side of the second direction, and the second bottom light-shielding portion of the first light-emitting unit located on one side of the first direction is reused as the first bottom light-shielding portion of the first light-emitting unit located on one side of the second direction.

[0021] According to one embodiment of the present disclosure, the viewing angle definition layer includes a first black matrix layer, a light-transmitting medium layer, and a second black matrix layer sequentially stacked on the side of the pixel layer away from the substrate; the viewing angle definition layer has a viewing angle definition structure corresponding to each of the sub-pixel groups; the sub-pixel groups and the corresponding viewing angle definition structures form a light-emitting unit.

[0022] The light-emitting unit includes a second light-emitting unit; in the second light-emitting unit, the first sub-pixel is located on a third direction side of the second sub-pixel; the viewing angle definition structure includes a first light-shielding part and a first bottom light-shielding part corresponding to the first sub-pixel, and a second light-shielding part and a second bottom light-shielding part corresponding to the second sub-pixel; wherein, the first bottom light-shielding part and the second bottom light-shielding part are located in the first black matrix layer, and the first light-shielding part and the second light-shielding part are located in the second black matrix layer; the orthographic projection of the first light-shielding part on the substrate is at least partially located on a first direction side of the orthographic projection of the first sub-pixel on the substrate, and exposes at least a portion of the first sub-pixel; The orthographic projection of the first bottom light-shielding portion on the substrate is at least partially located on one side of the first direction of the orthographic projection of the first sub-pixel on the substrate, and exposes at least a portion of the first sub-pixel; the orthographic projection of the second light-shielding portion on the substrate is at least partially located on one side of the second direction of the orthographic projection of the second sub-pixel on the substrate, and exposes at least a portion of the second sub-pixel; the orthographic projection of the second bottom light-shielding portion on the substrate is at least partially located on one side of the second direction of the orthographic projection of the second sub-pixel on the substrate, and exposes at least a portion of the second sub-pixel; the first direction and the second direction are opposite and perpendicular to the third direction.

[0023] According to one embodiment of this disclosure, the distance between the second black matrix layer and the pixel layer is not less than the size of the sub-pixel group along the first direction.

[0024] According to one embodiment of the present disclosure, in at least a portion of the light-emitting unit, the first sub-pixel and the first bottom light-shielding portion partially overlap; the size of the portion of the first sub-pixel overlapping with the first bottom light-shielding portion in the first direction does not exceed half the size of the first sub-pixel in the first direction; the first sub-pixel and the first light-shielding portion partially overlap; the size of the portion of the first sub-pixel overlapping with the first light-shielding portion in the first direction does not exceed half the size of the first sub-pixel in the first direction;

[0025] And / or, in at least a portion of the light-emitting unit, the second sub-pixel and the second bottom light-shielding portion partially overlap; the size of the portion of the second sub-pixel overlapping with the second bottom light-shielding portion in the first direction does not exceed half the size of the second sub-pixel in the first direction; the second sub-pixel and the second light-shielding portion partially overlap; the size of the portion of the second sub-pixel overlapping with the second light-shielding portion in the first direction does not exceed half the size of the second sub-pixel in the first direction.

[0026] According to one embodiment of this disclosure, the viewing angle definition layer includes a first black matrix layer, a light-transmitting medium layer, and a second color filter layer sequentially stacked on the side of the pixel layer away from the substrate; the viewing angle definition layer includes a viewing angle definition structure corresponding to each of the sub-pixel groups; the sub-pixel groups and the corresponding viewing angle definition structures form a light-emitting unit.

[0027] The light-emitting unit includes a first light-emitting unit; in the first light-emitting unit, the first sub-pixel is located on one side of the second sub-pixel in a first direction; the viewing angle definition structure includes a first color resist unit corresponding to the first sub-pixel, a second color resist unit corresponding to the second sub-pixel, an auxiliary color resist unit located between the first color resist unit and the second color resist unit, and a bottom light-blocking part located in the first black matrix layer.

[0028] The first color resist unit, the second color resist unit, and the auxiliary color resist unit are located in the second color filter layer; the colors of the first color resist unit and the second color resist unit are the same as the emission color of the sub-pixel group, and the color of the auxiliary color resist unit is different from the emission color of the sub-pixel group.

[0029] The orthographic projection of the first color resist unit on the substrate is located on one side of the first direction of the orthographic projection of the first sub-pixel on the substrate; the orthographic projection of the second color resist unit on the substrate is located on one side of the second direction of the orthographic projection of the second sub-pixel on the substrate; the orthographic projection of the bottom light-blocking portion on the substrate at least covers the orthographic projection of the gap between the first sub-pixel and the second sub-pixel on the substrate; wherein, the optical path between the second sub-pixel and the first color resist unit is blocked by the bottom light-blocking portion, and the optical path between the first sub-pixel and the second color resist unit is blocked by the bottom light-blocking portion; the first direction and the second direction are opposite.

[0030] According to one embodiment of this disclosure, in at least a portion of the first light-emitting unit, the bottom light-shielding portion overlaps with a portion of the first sub-pixel; the size of the portion of the first sub-pixel overlapping with the bottom light-shielding portion in the first direction does not exceed half the size of the first sub-pixel in the first direction;

[0031] And / or, in at least a portion of the first light-emitting unit, the second sub-pixel and the bottom light-shielding portion partially overlap; the size of the portion of the second sub-pixel overlapping the bottom light-shielding portion in the first direction does not exceed half the size of the second sub-pixel in the first direction.

[0032] According to one embodiment of the present disclosure, the auxiliary color resist unit includes a first auxiliary color resist unit and a second auxiliary color resist unit, wherein the first auxiliary color resist unit is located on one side of the second auxiliary color resist unit in a first direction.

[0033] For two adjacent first light-emitting units along the first direction, the second auxiliary color resist unit of the first light-emitting unit located on one side of the first direction is multiplexed as the first color resist unit of the first light-emitting unit located on one side of the second direction, and the first auxiliary color resist unit of the first light-emitting unit located on one side of the second direction is multiplexed as the second color resist unit of the first light-emitting unit located on one side of the first direction.

[0034] According to one embodiment of the present disclosure, in at least a portion of the first light-emitting unit, the auxiliary color resist unit includes a first auxiliary color resist unit and a second auxiliary color resist unit, wherein the first auxiliary color resist unit is located on one side of the second auxiliary color resist unit in a first direction; the orthographic projection of the first auxiliary color resist unit on the substrate covers the orthographic projection of the first sub-pixel on the substrate; and the orthographic projection of the second auxiliary color resist unit on the substrate covers the orthographic projection of the second sub-pixel on the substrate.

[0035] According to one embodiment of the present disclosure, in at least a portion of the first light-emitting unit, the auxiliary color resist unit includes a first auxiliary color resist unit and a second auxiliary color resist unit, wherein the first auxiliary color resist unit is located on one side of the second auxiliary color resist unit in a first direction; the first light-emitting unit further includes a light-shielding portion located between the first auxiliary color resist unit and the second auxiliary color resist unit and disposed on the second color filter layer.

[0036] According to one embodiment of this disclosure, the viewing angle definition layer includes a first black matrix layer, a light-transmitting medium layer, and a second color filter layer sequentially stacked on the side of the pixel layer away from the substrate; the viewing angle definition layer includes a viewing angle definition structure corresponding to each of the sub-pixel groups; the sub-pixel groups and the corresponding viewing angle definition structures form a light-emitting unit.

[0037] The light-emitting unit includes a second light-emitting unit; in the second light-emitting unit, the first sub-pixel is located on a third-direction side of the second sub-pixel; the viewing angle definition structure includes a first color resist unit and a first bottom light-shielding part corresponding to the first sub-pixel, a second color resist unit and a second bottom light-shielding part corresponding to the second sub-pixel, and an auxiliary color resist unit located between the first color resist unit and the second color resist unit; wherein, the first color resist unit, the second color resist unit, and the auxiliary color resist unit are located in the second color filter layer; the colors of the first color resist unit and the second color resist unit are the same as the emission color of the sub-pixel group, and the color of the auxiliary color resist unit is different from the emission color of the sub-pixel group; the first bottom light-shielding part and the second bottom light-shielding part are located in the first black matrix layer; the first color resist unit is located on the substrate. The orthographic projection of the first sub-pixel on the substrate is located on one side of the first direction of the orthographic projection of the first sub-pixel on the substrate; the orthographic projection of the second color resist unit on the substrate is located on one side of the second direction of the orthographic projection of the second sub-pixel on the substrate; the orthographic projection of the first bottom light-blocking portion on the substrate is at least partially located on one side of the second direction of the orthographic projection of the first sub-pixel on the substrate; the orthographic projection of the second bottom light-blocking portion on the substrate is at least partially located on one side of the first direction of the orthographic projection of the second sub-pixel on the substrate; the optical path between the second sub-pixel and the first color resist unit is blocked by the second bottom light-blocking portion, and the optical path between the first sub-pixel and the second color resist unit is blocked by the first bottom light-blocking portion; the first direction and the second direction are opposite and perpendicular to the third direction.

[0038] According to one embodiment of this disclosure, the distance between the second color filter layer and the pixel layer is not less than the size of the sub-pixel group along the first direction.

[0039] According to one embodiment of the present disclosure, the driving layer has a pixel driving circuit group that corresponds one-to-one with the sub-pixel group, and the pixel driving circuit group includes a first pixel driving circuit for driving the first sub-pixel and a second pixel driving circuit for driving the second sub-pixel.

[0040] The first pixel driving circuit and the second pixel driving circuit share some transistors.

[0041] According to one embodiment of this disclosure, the pixel driving circuit group includes:

[0042] The pixel driver module is used to provide drive current;

[0043] The first light emission control module is used to respond to the first light emission control signal to cause the driving current to flow to the first sub-pixel;

[0044] The second light emission control module is used to respond to the second light emission control signal so that the driving current flows to the second sub-pixel.

[0045] According to one embodiment of this disclosure, the pixel driving circuit group further includes:

[0046] The first reset module is used to reset the voltage on the pixel electrode of the first sub-pixel in response to the first electrode reset signal;

[0047] The second reset module is used to reset the voltage on the pixel electrode of the second sub-pixel in response to the second electrode reset signal.

[0048] According to one embodiment of this disclosure, one of the first light-emitting control module and the second light-emitting control module is an N-type transistor and the other is a P-type transistor; the gate of the N-type transistor and the gate of the P-type transistor are connected to the same light-emitting control signal line.

[0049] According to one embodiment of the present disclosure, the pixel layer includes a pixel electrode layer, a pixel definition layer, a light-emitting function layer and a common electrode layer stacked sequentially;

[0050] The pixel electrode layer is provided with a pixel electrode for the first sub-pixel and a pixel electrode for the second sub-pixel;

[0051] The pixel definition layer has a first sub-pixel opening that exposes at least a portion of the pixel electrode of the first sub-pixel and a second sub-pixel opening that exposes at least a portion of the pixel electrode of the second sub-pixel;

[0052] The light-emitting functional layer has a light-emitting functional unit group corresponding to the sub-pixel group. The light-emitting functional unit group covers the first sub-pixel opening, the second sub-pixel opening, and the area between the first sub-pixel opening and the second sub-pixel opening.

[0053] According to a second aspect of this disclosure, a display device is provided, including the display panel described above.

[0054] According to a third aspect of this disclosure, a method for driving a display device is provided, comprising:

[0055] At the first moment, each of the first sub-pixels is made to emit light to display the first image;

[0056] At the second moment, each of the second sub-pixels is made to emit light to display the second image.

[0057] According to one embodiment of this disclosure, the driving method further includes:

[0058] Responding to switching commands, it switches between privacy mode and non-privacy mode;

[0059] In the privacy mode, the first screen and the second screen are different;

[0060] In the non-privacy mode, the first screen and the second screen are the same.

[0061] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0062] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure. It is obvious that the drawings described below are merely some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.

[0063] Figure 1 This is a schematic diagram of the display panel in one embodiment of the present disclosure.

[0064] Figure 2 This is a schematic diagram of the display panel in one embodiment of the present disclosure.

[0065] Figure 3 This is a schematic flowchart of a driving method for a display device in one embodiment of the present disclosure.

[0066] Figure 4 This is a schematic diagram of the structure of the display panel in one embodiment of the present disclosure.

[0067] Figure 5-1 This is a schematic diagram of the arrangement of sub-pixels in a related technology.

[0068] Figure 5-2 This is a schematic diagram illustrating the arrangement of sub-pixels in one embodiment of this disclosure.

[0069] Figure 6-1 This is a schematic diagram of the arrangement of sub-pixels in a related technology.

[0070] Figure 6-2 This is a schematic diagram illustrating the arrangement of sub-pixels in one embodiment of this disclosure.

[0071] Figure 7-1 This is a schematic diagram of the arrangement of sub-pixels in a related technology.

[0072] Figure 7-2 This is a schematic diagram illustrating the arrangement of sub-pixels in one embodiment of this disclosure.

[0073] Figure 8 This is a partial structural diagram of the display panel in one embodiment of the present disclosure.

[0074] Figure 9 This is a schematic diagram of the pixel driving circuit group in one embodiment of the present disclosure.

[0075] Figure 10 This is a schematic diagram of the pixel driving circuit group in one embodiment of the present disclosure.

[0076] Figure 11 This is a schematic diagram of the pixel driving circuit group in one embodiment of the present disclosure.

[0077] Figure 12-1 This is a schematic diagram of the pixel driving circuit group in one embodiment of the present disclosure.

[0078] Figure 12-2 This is a schematic diagram of the pixel driving circuit group in one embodiment of the present disclosure.

[0079] Figure 13 This is a schematic diagram of the principle of the first light-emitting unit in one embodiment of the present disclosure.

[0080] Figure 14 This is a schematic diagram of the principle of the first light-emitting unit in one embodiment of the present disclosure.

[0081] Figure 15 This is a schematic diagram illustrating the structure of the cooperation between the pixel layer and the view definition layer in one embodiment of this disclosure.

[0082] Figure 16 This is a schematic diagram of the principle of the first light-emitting unit in one embodiment of the present disclosure.

[0083] Figure 17 This is a schematic diagram of the structure of the second light-emitting unit in one embodiment of the present disclosure.

[0084] Figure 18 This is a schematic diagram of the principle of the first light-emitting unit in one embodiment of the present disclosure.

[0085] Figure 19 This is a schematic diagram of the principle of the first light-emitting unit in one embodiment of the present disclosure.

[0086] Figure 20 This is a schematic diagram illustrating the structure of the cooperation between the pixel layer and the view definition layer in one embodiment of this disclosure.

[0087] Figure 21 This is a schematic diagram of the structure of the second light-emitting unit in one embodiment of the present disclosure.

[0088] Figure 22This is a schematic diagram of the principle of the first light-emitting unit in one embodiment of the present disclosure.

[0089] Figure 23 This is a schematic diagram of the principle of the first light-emitting unit in one embodiment of the present disclosure.

[0090] Figure 24 This is a schematic diagram illustrating the structure of the cooperation between the pixel layer and the view definition layer in one embodiment of this disclosure.

[0091] Figure 25 This is a schematic diagram of the structure of the second light-emitting unit in one embodiment of the present disclosure.

[0092] Figure 26 This is a schematic diagram of the structure forming a display back panel in one embodiment of the present disclosure.

[0093] Figure 27 This is a schematic diagram of a structure in which a touch function layer is formed on a display back panel in one embodiment of the present disclosure.

[0094] Figure 28 This is a schematic diagram of a structure in which a light-transmitting medium layer is formed on the touch function layer in one embodiment of the present disclosure.

[0095] Figure 29 This is a schematic diagram of the structure in which a first color filter layer is formed on a light-transmitting medium layer in one embodiment of the present disclosure. Detailed Implementation

[0096] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, they are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and therefore detailed descriptions of them will be omitted. Furthermore, the drawings are merely illustrative of this disclosure and are not necessarily drawn to scale.

[0097] Although relative terms such as "up" and "down" are used in this specification to describe the relative relationship of one component of an icon to another, these terms are used only for convenience, such as according to the orientation of the examples shown in the accompanying drawings. It is understood that if the device of the icon is flipped upside down, the component described as "up" will become the component described as "down." When a structure is "up" of another structure, it may mean that the structure is integrally formed on the other structure, or that the structure is "directly" mounted on the other structure, or that the structure is "indirectly" mounted on the other structure through another structure.

[0098] The terms “a,” “one,” “the,” “the,” and “at least one” are used to indicate the presence of one or more elements / components / etc.; the terms “including” and “having” are used to indicate an open-ended inclusion and to mean that there may be other elements / components / etc. in addition to the listed elements / components / etc.; the terms “first,” “second,” and “third,” etc., are used only as markers and are not a limitation on the number of objects.

[0099] In this disclosure, a transistor is a device that includes at least three terminals: a gate electrode, a drain electrode, and a source electrode. The transistor has a channel region between the drain electrode (drain electrode terminal, drain region, or drain electrode) and the source electrode (source electrode terminal, source region, or source electrode), and current can flow through the drain electrode, the channel region, and the source electrode. The channel region refers to the area through which the current primarily flows. The first terminal of the transistor can be the drain electrode and the second terminal can be the source electrode, or vice versa. In cases where transistors with opposite polarities are used or where the current direction changes during circuit operation, the functions of the "source electrode" and the "drain electrode" are sometimes interchanged.

[0100] In this disclosure, when describing the overlap of structure A and structure B, it means that the orthographic projections of structure A and structure B on the substrate at least overlap in some area. When describing the partial overlap of structure A and structure B, it means that the orthographic projections of structure A and structure B on the substrate only partially overlap in some area.

[0101] In this embodiment of the disclosure, when describing structure C as exposing structure D or describing structure D as being exposed by structure C, it means that structure C is located on the side of structure D away from the substrate, but the orthographic projection of structure C on the substrate does not coincide with the orthographic projection of structure D on the substrate.

[0102] In this embodiment, structural layer E is located on the side of structural layer F away from the substrate. This can be understood as structural layer E being formed on the side of structural layer F opposite to the substrate. When structural layer F is a patterned structure, a portion of structural layer E may also be located at the same physical height as or below the physical height of structural layer F, wherein the substrate serves as the height reference.

[0103] This disclosure provides a display panel and a display device using the display panel. See also Figures 1-2The display panel includes a substrate BP, a driving layer F100, a pixel layer F200, and a viewing angle definition layer VDL, which are stacked sequentially. The pixel layer F200 includes an array of sub-pixel groups PIXS, each PIXS comprising an adjacent, same-color first sub-pixel PIXA and a second sub-pixel PIXB. The viewing angle definition layer VDL allows the light projection space VA of the first sub-pixel PIXA to overlap with the light projection space VB of the second sub-pixel PIXB by at most a portion. The light projection space of a sub-pixel corresponds to the range of its light emission angle.

[0104] For example, the first sub-pixel PIXA of each sub-pixel group PIXS is used as the first sub-pixel group to display the first image, and the second sub-pixel PIXB of each sub-pixel group PIXS is used as the second sub-pixel group to display the second image. The viewing angle definition layer VDL is configured such that the viewing angle range of the first sub-pixel group and the viewing angle range of the second sub-pixel group have at most partial overlap, such as partial overlap or complete separation.

[0105] The display device can be driven using the following methods:

[0106] Step S110, causing each of the first sub-pixels PIXA to emit light to display the first image;

[0107] Step S120 causes each of the second sub-pixels PIXB to emit light to display the second image.

[0108] In other words, in this embodiment, each first sub-pixel PIXA is used to display a first image. When a user is in the light projection space VA of the first sub-pixel PIXA, they can see the first image on the display panel. Each second sub-pixel PIXB is used to display a second image. When a user is in the light projection space VB of the second sub-pixel PIXB, they can see the second image on the display panel. If the first image and the second image are the same, then different users in the light projection spaces VA of the first sub-pixel PIXA and VB of the second sub-pixel PIXB can all see the same image on the display panel. At this time, the display device is in non-privacy mode. If the first image and the second image are different, then different users in the light projection spaces VA of the first sub-pixel PIXA and VB of the second sub-pixel PIXB will see different images on the display panel. At this time, the display device is in privacy mode. In privacy mode, one of the first image and the second image can be a target image, and the other can be a non-target image, such as a black screen, a screensaver image, or other non-target images. Of course, in other embodiments of this disclosure, both the first screen and the second screen can be target screens, so that the display panel can simultaneously meet the usage needs of two different users. For example, the first screen is the target screen of the first user located in the light projection space VA of the first sub-pixel PIXA, and the second screen is the target screen of the second user located in the light projection space VB of the second sub-pixel PIXB.

[0109] In this embodiment, the viewing angle definition layer (VDL) does not require adjustable components, such as a liquid crystal layer, thus avoiding excessive film thickness caused by such structures. This allows for switching between privacy mode and non-privacy mode without significantly increasing the thickness of the display panel.

[0110] In some embodiments of this disclosure, the driving method of the display device further includes: switching between a privacy mode and a non-privacy mode in response to a switching command. For example, a mode switching button may be provided on the display device, which may be a physical button or a virtual button; the switching between privacy mode and non-privacy mode is realized through the switching button.

[0111] In one example, the privacy mode may further include a first privacy mode and a second privacy mode. In the first privacy mode, the first screen is the target screen, and the second screen is a non-target screen. In the second privacy mode, the first screen is a non-target screen, and the second screen is the target screen. The first privacy mode can be used when the user is located in the light projection space VA of the first sub-pixel PIXA. The second privacy mode can be used when the user is located in the light projection space VB of the second sub-pixel PIXB.

[0112] In one example, the non-target screen can be a black screen (i.e., a black screen) or other preset screens, such as screensaver screens, random cluttered screens, dynamic screens, etc.

[0113] In one embodiment of this disclosure, the first sub-pixel PIXA and the second sub-pixel PIXB in the sub-pixel group PIXS can emit light in a time-division manner rather than simultaneously; for example, the first sub-pixel PIXA and the second sub-pixel PIXB can emit light alternately. For instance, in step S110, at a first moment, each of the first sub-pixels PIXA emits light to display a first image. In step S120, at a second moment, each of the second sub-pixels PIXB emits light to display a second image. The first and second moments do not overlap. This reduces the complexity of the driving process and the driving circuitry, thereby reducing the development cost and power consumption of the display panel, and helps maintain or even improve the resolution of the display panel.

[0114] In one example, the display panel alternately displays a first image and a second image. Thus, the display of the first and second images can be achieved by reducing their refresh rates. For example, if the total refresh rate of the display panel is 120Hz, then the refresh rate of the first image is 60Hz, and the refresh rate of the second image is also 60Hz. In this way, the signal source does not need to pre-fuse the first and second images; instead, it directly causes the first sub-pixel PIXA to display the first image and the second sub-pixel PIXB to display the second image, achieving physical-level image fusion.

[0115] In one example, the light projection space VA of the first sub-pixel PIXA is at least partially located on one side of the first direction D1 of the display panel, and the light projection space VB of the second sub-pixel PIXB is at least partially located on one side of the second direction D2 of the display panel. Here, the first direction D1 and the second direction D2 are opposite directions, for example, the left and right sides of a display device, particularly the left and right sides of a mobile terminal such as a smartphone or tablet.

[0116] The structure, principle, and effects of the display panel of the disclosed embodiment will be further explained and described below with reference to the accompanying drawings.

[0117] See Figure 4 In one embodiment of this disclosure, the display panel includes a substrate BP, a driving layer F100, a pixel layer F200, an encapsulation layer TFE, and a viewing angle definition layer VDL, which are stacked sequentially. The pixel layer F200 is provided with sub-pixels for display, and the driving layer F100 is provided with pixel driving circuits for driving the sub-pixels.

[0118] In some embodiments of this disclosure, the substrate BP can be an inorganic material or an organic material. For example, in one embodiment, the substrate BP can be made of glass materials such as soda-lime glass, quartz glass, or sapphire glass. In another embodiment, the substrate BP can be made of polymethyl methacrylate, polyvinyl alcohol, polyvinylphenol, polyethersulfone, polyimide, polyamide, polyacetal, polycarbonate, polyethylene terephthalate, polyethylene naphthalate, or combinations thereof. In yet another embodiment, the substrate BP can also be a flexible substrate BP, for example, the substrate BP can be made of polyimide.

[0119] The driving layer F100 is provided with pixel driving circuits for driving sub-pixels. In the driving layer F100, any pixel driving circuit may include a transistor (TFT) and a storage capacitor. Further, the transistor (TFT) can be a thin-film transistor (TFT), which can be selected from top-gate, bottom-gate, or dual-gate TFTs; the active layer of the TFT can be made of amorphous silicon semiconductor material, low-temperature polycrystalline silicon semiconductor material, metal-oxide semiconductor material, organic semiconductor material, or other types of semiconductor material; the TFT can be an N-type TFT or a P-type TFT.

[0120] It is understood that any two transistors in a pixel driving circuit can be of the same or different types. For example, in one embodiment, some transistors in a pixel driving circuit can be N-type transistors and some transistors can be P-type transistors. Further exemplarily, in another embodiment of this disclosure, in a pixel driving circuit, the active layer material of some transistors can be low-temperature polycrystalline silicon (LTPS) semiconductor material, and the active layer material of some transistors can be metal-oxide-semiconductor (MODS) semiconductor material. In some embodiments of this disclosure, the thin-film transistor is a LPS transistor. In other embodiments of this disclosure, some thin-film transistors are LPS transistors, and some thin-film transistors are MODS transistors.

[0121] Optionally, the driving layer F100 may include a semiconductor layer SEMI, a gate insulating layer GI, a gate layer GT, an interlayer dielectric layer ILD, and a source / drain metal layer SD, stacked between the substrate BP and the pixel layer F200. Each thin-film transistor and storage capacitor can be formed from the semiconductor layer SEMI, gate insulating layer GI, gate layer GT, interlayer dielectric layer ILD, and source / drain metal layer SD. The positional relationship of each layer can be determined based on the thin-film transistor's layer structure. Further, the semiconductor layer SEMI can be used to form the channel region of the transistor; the gate layer can be used to form gate layer traces such as scan lines, reset control lines, and light emission control lines, or to form the gate of the transistor, or to form part or all of the electrode plates of the storage capacitor; the source / drain metal layer can be used to form source / drain metal layer traces such as data voltage lines and drive voltage lines, or to form part of the electrode plates of the storage capacitor.

[0122] In one example, see Figure 4 The driving layer F100 may include an inorganic buffer layer Buff, a semiconductor layer SEMI, a gate insulating layer GI, a gate layer GT, an interlayer dielectric layer ILD, a source / drain metal layer SD, and a planarization layer PLN, stacked sequentially. The resulting thin-film transistor is a top-gate type thin-film transistor. Of course, it is understood that the driving layer F100 of this disclosure may also have other stacked structures, such as having two or three or more semiconductor layers SEMI, or two or more gate layers GT, or two or more source / drain metal layers SD, etc. As the number of these semiconductor layers or conductive films increases, the number of insulating films can also be increased accordingly.

[0123] Optionally, the driving layer F100 may also include a passivation layer, which may be disposed on the surface of the source / drain metal layer SD away from the substrate BP, in order to protect the source / drain metal layer SD.

[0124] The pixel layer F200 may be provided with light-emitting elements electrically connected to the pixel driving circuit, and the light-emitting elements may serve as sub-pixels of the display panel. In one example, the light-emitting element serving as a sub-pixel is an organic electroluminescent diode (OLED). It is understood that in other embodiments of this disclosure, the sub-pixel may also be other types of light-emitting elements, especially electroluminescent elements, such as current-driven light-emitting elements such as QLED, PLED, Micro LED, and Mini LED.

[0125] In some embodiments of this disclosure, the light-emitting element in the pixel layer F200 is a thin-film light-emitting element, which may include two electrodes stacked together and a light-emitting functional unit sandwiched between the two electrodes. For example, see... Figure 4The pixel layer F200 can be disposed on the side of the driving layer F100 away from the substrate BP, and it can include a pixel electrode layer PIXL, a pixel definition layer PDL, a light-emitting functional layer EML, and a common electrode layer COML stacked sequentially. The pixel electrode layer PIXL has multiple pixel electrodes in the display area of ​​the display panel; the pixel definition layer PDL has multiple through-holes in the display area corresponding to the multiple pixel electrodes, with each pixel opening exposing at least a portion of the corresponding pixel electrode. The light-emitting functional layer EML at least covers the pixel electrodes exposed by the pixel definition layer PDL. The common electrode layer COML can cover the light-emitting functional layer EML in the display area. The pixel electrodes and the common electrode layer COML provide electrons, holes, and other charge carriers to the light-emitting functional layer EML, causing the light-emitting functional layer EML to emit light. The portion of the light-emitting functional layer EML located between the pixel electrodes and the common electrode layer COML can serve as a light-emitting functional unit. The pixel electrodes, the common electrode layer COML, and the light-emitting functional units form a light-emitting element. Any light-emitting element can be used as a sub-pixel of the display panel, for example, as one of the first sub-pixel and the second sub-pixel.

[0126] It is understandable that different types of light-emitting elements result in different materials and film layers in the light-emitting functional layer (EML); correspondingly, the light-emitting functional units of the light-emitting element differ. For example, when the light-emitting element is an OLED, the EML may include an organic electroluminescent material layer, and may include one or more of the following: a hole injection layer, a hole transport layer, an electron blocking layer, an electron transport layer, and an electron injection layer. When the OLED adopts a stacked structure, a charge generation layer may also be provided in the EML.

[0127] For example, when the light-emitting element is a QLED, the light-emitting functional layer (EML) may include a quantum dot material layer, and may include one or more of the following: a hole injection layer, a hole transport layer, an electron blocking layer, an electron transport layer, and an electron injection layer. When the QLED adopts a stacked structure, a charge generation layer may also be provided in the light-emitting functional layer (EML).

[0128] Optionally, see Figure 4The display panel may further include a TFE encapsulation layer. The TFE encapsulation layer can be a thin-film encapsulation layer disposed on the surface of the pixel layer F200 away from the substrate BP, and may include alternately stacked inorganic and organic encapsulation layers. The inorganic encapsulation layer can effectively block external moisture and oxygen, preventing water and oxygen from invading the pixel layer F200 and causing material aging in the pixel layer F200. Optionally, the edge of the inorganic encapsulation layer may be located in the peripheral area. The organic encapsulation layer is located between two adjacent inorganic encapsulation layers to achieve planarization and reduce stress between the inorganic encapsulation layers. The edge of the organic encapsulation layer may be located between the edge of the display area and the edge of the inorganic encapsulation layer. Exemplarily, the TFE encapsulation layer includes a first inorganic encapsulation layer F301, an organic encapsulation layer F302, and an organic encapsulation layer F302, sequentially stacked on the side of the pixel layer F200 away from the substrate BP. Of course, in other embodiments of this disclosure, the display panel may not have a thin-film encapsulation layer, but may use other methods to encapsulate and protect the pixel layer.

[0129] In this embodiment, the product composed of a substrate, a driving layer, a pixel layer, and an encapsulation layer can be referred to as a display backplane. In this embodiment, a viewing angle definition layer can be provided on the light-emitting side of the display backplane to enable the display panel to have privacy protection functionality.

[0130] Optionally, the display panel may also include a functional layer, such as a touch functional layer. This functional layer may be located between the encapsulation layer (TFE) and the viewing angle definition layer (VDL) to implement preset functions. For example, the display panel includes a touch functional layer disposed between the TFE and the VDL, which enables the display panel to have touch functionality.

[0131] In the embodiments of this disclosure, the first sub-pixel PIXA and the second sub-pixel PIXB are arranged adjacently and are the same color. This is beneficial for the design of the display panel, as each first sub-pixel PIXA and second sub-pixel PIXB can be designed according to a sub-pixel group PIXS, without the need to design the first sub-pixel PIXA and the second sub-pixel PIXB separately. Furthermore, this also benefits the driving of the display panel, allowing the first sub-pixel PIXA and the second sub-pixel PIXB to use the same driving timing, eliminating the need to set different driving timings for each. Therefore, this display panel has the advantages of simple design and easy driver development. Moreover, since the first sub-pixel PIXA and the second sub-pixel PIXB are the same color, the spacing between the first sub-pixel PIXA and the second sub-pixel PIXB can be small, eliminating concerns about material mixing during the fabrication of the first sub-pixel PIXA and the second sub-pixel PIXB. This allows for a higher density of the sub-pixel group PIXS, which is beneficial for improving the resolution of the display panel. When the light projection space VA of the first sub-pixel PIXA and the light projection space VB of the second sub-pixel PIXB overlap, in non-privacy mode, the first and second images seen by the user in the overlapping space are highly overlapped without any flickering.

[0132] In some embodiments of this disclosure, based on the prior art, the same subpixel can be divided into two independent subpixels to form a subpixel group (PIXS); this can further simplify the design of the display panel.

[0133] For example, in Figure 5-1 In the exemplified prior art, the subpixel arrangement is a strip RGB arrangement, which includes red subpixels R, green subpixels G, and blue subpixels B. This can be... Figure 5-1 Each subpixel is divided into a subpixel group PIXS (see Figure 5-2 This allows for the arrangement of sub-pixel groups (PIXS) in one embodiment of this disclosure. Figure 5-2 In the example, each sub-pixel group PIXS includes a first sub-pixel PIXA located on one side of the first direction D1 and a second sub-pixel PIXB located on one side of the second direction D2. The first direction D1 and the second direction D2 are opposite in direction.

[0134] For another example, in Figure 6-1 In the exemplified prior art, the subpixel arrangement is sRGB, which includes red subpixels R, green subpixels G, and blue subpixels B. This can be... Figure 6-1 Each subpixel is divided into a subpixel group PIXS (see Figure 6-2This leads to the arrangement of sub-pixel groups (PIXS) in one embodiment of this disclosure. Figure 6-2 In the example, each sub-pixel group PIXS includes a first sub-pixel PIXA located on the first direction D1 side and a second sub-pixel PIXB located on the second direction D2 side.

[0135] For another example, in Figure 7-1 In the exemplified prior art, the subpixel arrangement is a blue diamond pixel arrangement, which includes red subpixels R, green subpixels G, and blue subpixels B. This can be... Figure 7-1 Each subpixel is divided into a subpixel group PIXS (see Figure 7-2 This allows for the arrangement of sub-pixel groups (PIXS) in one embodiment of this disclosure. Figure 7-2 In the example, the subpixel group PIXS includes two types: a first subpixel group PIXSA and a second subpixel group PIXSB. In the first subpixel group PIXSA, the first subpixel PIXA is located on the first direction D1 side of the second subpixel PIXB. In the second subpixel group PIXSB, the first subpixel PIXA is located on the third direction D3 side of the second subpixel PIXB. The first direction D1 and the third direction D3 are perpendicular to each other and parallel to the plane of the display panel; for example, one is in the row direction and the other is in the column direction. This avoids the problem of individual subpixels being too small in a certain direction, making fabrication difficult. See further examples. Figure 7-2 The green sub-pixel G forms two different sub-pixel groups PIXS; the size of the first green sub-pixel group PIXSA in the first direction D1 is the same as the size of the second green sub-pixel group PIXSB in the third direction D3; the size of the first green sub-pixel group PIXSA in the third direction D3 is the same as the size of the second green sub-pixel group PIXSB in the first direction D1.

[0136] Of course, it is understandable that, based on Figure 7-1 When the subpixel arrangement in the prior art is improved to obtain the subpixel group PIXS arrangement of the present disclosure, each subpixel can also be divided into a first subpixel PIXA located on the first direction D1 side and a second subpixel PIXB located on the second direction D2 side. In this way, each subpixel group PIXS of the display panel is the first subpixel group PIXSA.

[0137] It is understandable that the above Figure 5-2 , Figure 6-2 , Figure 7-2The illustrated PIXS arrangement is merely an example of the PIXS arrangement in this disclosure and is not a limitation. Obviously, in this disclosure, the PIXS can be arranged in other ways, which may refer to existing PIXS arrangements or be completely different from existing PIXS arrangements.

[0138] In some embodiments of this disclosure, a sub-pixel includes a pixel electrode, a light-emitting functional unit, and a common electrode layer COML, which are sequentially stacked on the side of the driving layer F100 away from the substrate BP. The light-emitting functional unit is a functional film layer capable of emitting light under the drive of current provided by the pixel electrode and the common electrode layer COML; for example, it is a combination of film layers between the anode and cathode of a light-emitting element such as an OLED, PLED, or QLED. For at least a portion of the sub-pixel group PIXS, the light-emitting functional units of the first sub-pixel PIXA and the second sub-pixel PIXB can be interconnected into a single unit, meaning that there is no need to provide a gap between the light-emitting functional units of the first sub-pixel PIXA and the second sub-pixel PIXB to separate them. This is beneficial for reducing the manufacturing cost of the display panel and for improving the resolution of the display panel.

[0139] For example, see Figure 8The pixel electrode layer is provided with a pixel electrode PIXLA for the first sub-pixel PIXA and a pixel electrode PIXXLB for the second sub-pixel PIXB. The pixel definition layer PDL has a first sub-pixel opening that exposes at least a portion of the pixel electrode PIXLA for the first sub-pixel PIXA and a second sub-pixel opening that exposes at least a portion of the pixel electrode PIXXLB for the second sub-pixel PIXB. The light-emitting functional layer EML has a light-emitting functional unit group EMLS corresponding to the sub-pixel group PIXS. The light-emitting functional unit group EMLS covers the first sub-pixel opening, the second sub-pixel opening, and the area between the first sub-pixel opening and the second sub-pixel opening. Thus, when fabricating the light-emitting functional units of the first sub-pixel PIXA and the second sub-pixel PIXB, the light-emitting functional unit group EMLS can be fabricated directly instead of fabricating the light-emitting functional units of the first sub-pixel PIXA and the second sub-pixel PIXB separately. This reduces the requirements for the resolution and fabrication accuracy of the fabrication equipment, thereby enabling the fabrication of smaller, higher-density sub-pixel groups PIXS, improving the resolution of the display panel and reducing fabrication costs. In this embodiment, the portion of the light-emitting functional unit group EMLS overlapping with the pixel electrode PIXLA exposed by the first pixel opening can serve as the light-emitting functional unit of the first sub-pixel PIXA, and the portion of the light-emitting functional unit group EMLS overlapping with the pixel electrode PIXLB exposed by the second pixel opening can serve as the light-emitting functional unit of the second sub-pixel PIXB. The remaining portion of the light-emitting functional unit group EMLS can span the surface of the pixel definition layer between the first pixel opening and the second pixel opening without being removed during the patterning process.

[0140] In a further example, the light-emitting device is an OLED. In this example, a precision metal mask can be used when forming the organic light-emitting layer in the light-emitting functional layer (EML) by evaporation. However, the evaporation apertures of this precision metal mask correspond one-to-one with each sub-pixel group (PIXS), rather than one-to-one with each individual sub-pixel. This reduces the precision requirements of the precision metal mask, especially the size requirements of the evaporation apertures, which can significantly reduce the cost of the precision metal mask. On the other hand, this allows for the fabrication of smaller sub-pixels, overcoming the limitation of the evaporation aperture size of the precision metal mask on the size of individual sub-pixels, thereby facilitating the improvement of the display panel's resolution.

[0141] In some embodiments of this disclosure, see Figure 9The driving layer F100 has pixel driving circuit groups (PDCS) corresponding one-to-one with each sub-pixel group (PIXS). Each PDCS includes a first pixel driving circuit (PDCA) for driving the first sub-pixel (PIXA) and a second pixel driving circuit (PDCB) for driving the second sub-pixel (PIXB). The first pixel driving circuit (PDCA) and the second pixel driving circuit (PDCB) share some transistors. This reduces the layout area of ​​the PDCS, thereby avoiding its influence on the arrangement density of the first sub-pixel (PIXA) and the second sub-pixel (PIXB), which is beneficial for improving the resolution of the display panel.

[0142] In one embodiment of this disclosure, the pixel driving circuit group PDCS includes a pixel driving module DRM, a first emission control module CTRA, and a second emission control module CTRB. The pixel driving module DRM provides driving current; the first emission control module CTRA responds to a first emission control signal EM1 to direct the driving current to the first sub-pixel PIXA; and the second emission control module CTRB responds to a second emission control signal EM2 to direct the driving current to the second sub-pixel PIXB. The pixel driving module DRM and the first emission control module CTRA together form a first pixel driving circuit PDCA for driving the first sub-pixel PIXA. The pixel driving module DRM and the second emission control module CTRB together form a second pixel driving circuit PDCB for driving the second sub-pixel PIXB. In this embodiment, the pixel driving circuit group PDCS can achieve time-division driving of the first sub-pixel PIXA and the second sub-pixel PIXB. For example, at a first moment, by enabling the pixel driving module DRM to provide a first driving current and turning on the first light-emitting control module CTRA while turning off the second light-emitting control module CTRB, the first sub-pixel PIXA can be driven while the second sub-pixel PIXB remains dark. At a second moment, by enabling the pixel driving module DRM to provide a second driving current and turning on the second light-emitting control module CTRB while turning off the first light-emitting control module CTRA, the second sub-pixel PIXB can be driven while the first sub-pixel PIXA remains dark.

[0143] Further, see Figure 10The pixel driving circuit group PDCS may further include a first reset module ReA and a second reset module ReB. The first reset module ReA is used to reset the voltage on the pixel electrode of the first sub-pixel PIXA in response to a first electrode reset signal Re1; the second reset module ReB is used to reset the voltage on the pixel electrode of the second sub-pixel PIXB in response to a second electrode reset signal Re2. This further improves the driving effect of each sub-pixel and enhances image quality. In this embodiment, the first pixel driving circuit PDCA may include a pixel driving module DRM, a first light emission control module CTRA, and a first reset module ReA. The second pixel driving circuit PDCB may include a pixel driving module DRM, a second light emission control module CTRB, and a second reset module ReB.

[0144] Understandable, Figure 9 and Figure 10 This disclosure merely illustrates some feasible implementations of the pixel driving circuit group (PDCS). In other embodiments of this disclosure, the PDCS may employ other structures or architectures to enable separate driving of the first sub-pixel PIXA and the second sub-pixel PIXB, and the first sub-pixel PIXA and the second sub-pixel PIXB may be driven simultaneously or in a time-division manner.

[0145] As follows, Figure 11 Using the example of the pixel driving circuit group PDCS architecture, a first exemplary implementation of the pixel driving circuit group PDCS will be described.

[0146] In the first exemplary embodiment, see Figure 11 The first pixel driving circuit PDCA and the second pixel driving circuit PDCB are both 7T1C circuits (7 transistors + 1 capacitor). In this example, the pixel driving circuit group PDCS includes a capacitor reset transistor T1, a threshold compensation transistor T2, a driving transistor T3, a data writing transistor T4, a current control transistor T5, a first light-emitting control transistor T61, a second light-emitting control transistor T62, a first electrode reset transistor T71, a second electrode reset transistor T72, and a storage capacitor Cst.

[0147] The storage capacitor Cst, capacitor reset transistor T1, threshold compensation transistor T2, drive transistor T3, data write transistor T4, and current control transistor T5 are components in the pixel drive module DRM. The second terminal T1S of the capacitor reset transistor is used to load the first initialization voltage Vinit1, and the first terminal T1D of the capacitor reset transistor is electrically connected to the first node N1; the gate T1G of the capacitor reset transistor is used to load the capacitor reset signal Re. Thus, the capacitor reset transistor T1 is used to load the first initialization voltage Vinit1 to the first node N1 in response to the capacitor reset signal Re, thereby resetting the first initialization voltage Vinit1. The second terminal T2S of the threshold compensation transistor is electrically connected to the third node N3, and the first terminal T2D of the threshold compensation transistor is electrically connected to the first node N1; the gate T2G of the threshold compensation transistor is used to load the scan signal Gate; the threshold compensation transistor T2 is used to electrically connect the first node N1 and the third node N3 in response to the scan signal Gate. The second terminal T3S of the driving transistor is electrically connected to the second node N2, the first terminal T3D of the driving transistor is electrically connected to the third node N3, and the gate T3G of the driving transistor is electrically connected to the first node N1. The driving transistor T3 is used to control the magnitude of the output driving current under the control of the voltage of the first node N1. The second terminal T4S of the data writing transistor is used to load the data voltage Vdata, the first terminal T4D of the data writing transistor is electrically connected to the second node N2, and the gate T4G of the data writing transistor is used to load the scan signal Gate. The data writing transistor T4 is used to load the data voltage Vdata to the second node N2 in response to the scan signal Gate. The second terminal T5S of the current control transistor is used to load the driving power supply voltage VDD, the first terminal T5D of the current control transistor is electrically connected to the second node N2, and the gate T5G of the current control transistor is used to load the current control signal EM. The current control transistor T5 is used to load the driving power supply voltage VDD to the second node N2 under the control of the current control signal EM.

[0148] The pixel driving module (DRM) operates in three distinct phases: circuit reset, data writing, and current generation. During the circuit reset phase, capacitor reset transistor T1 resets the first node N1 in response to the capacitor reset signal Re; this causes driving transistor T3 to conduct under the control of the first initialization voltage Vinit1. During the data writing phase, threshold compensation transistor T2 and data writing transistor T4 conduct in response to the scan signal Gate, loading the data voltage Vdata to the second node N2 and charging the first node N1 through driving transistor T3 and threshold compensation transistor T2 until the voltage at the first node N1 rises to the point where driving transistor T3 is turned off. Thus, the voltage at the first node N1 is related to the data voltage Vdata and the threshold voltage of driving transistor T3, realizing the writing of data voltage Vdata and compensation of the threshold voltage of driving transistor T3. During the current generation phase, current control transistor T5 conducts in response to the current control signal EM. At this time, if one of the first light-emitting control transistor T61 and the second light-emitting control transistor T62 is also turned on, the driving transistor T3 can generate a corresponding driving current according to the voltage of the first node N1, thereby driving the first sub-pixel PIXA or the second sub-pixel PIXB to emit light.

[0149] In this example, the first light-emitting control transistor T61 can serve as the first light-emitting control module CTRA. The second terminal T61S of the first light-emitting control transistor is electrically connected to the third node N3, and the first terminal T61D of the first light-emitting control transistor is electrically connected to the pixel electrode of the first sub-pixel PIXA. The gate T61G of the first light-emitting control transistor is used to load the first light-emitting control signal EM1. The first light-emitting control transistor T61 is used to electrically connect the third node N3 and the first sub-pixel PIXA in response to the first light-emitting control signal EM1. Furthermore, the loading time of the first light-emitting control signal EM1 can partially overlap with the loading time of the current control signal EM; the overlapping time period is a first time period, during which the pixel driving module DRM generates a first driving current, and this first driving current drives the first sub-pixel PIXA through the first light-emitting control transistor T61.

[0150] In this example, the second light-emitting control transistor T62 can serve as the second light-emitting control module CTRB. The second terminal T62S of the second light-emitting control transistor is electrically connected to the third node N3, and the first terminal T62D of the second light-emitting control transistor is electrically connected to the pixel electrode of the second sub-pixel PIXB. The gate T62G of the second light-emitting control transistor is used to load the second light-emitting control signal EM2. The second light-emitting control transistor T62 is used to electrically connect the third node N3 and the second sub-pixel PIXB in response to the second light-emitting control signal EM2. Furthermore, the loading time of the second light-emitting control signal EM2 can partially overlap with the loading time of the current control signal EM; the overlapping period is a second time period during which the pixel driving module DRM generates a second driving current, and this second driving current drives the second sub-pixel PIXB through the second light-emitting control transistor T62. Furthermore, the loading time of the first light-emitting control signal EM1 and the loading time of the second light-emitting control signal EM2 do not overlap to avoid simultaneous emission of the first sub-pixel PIXA and the second sub-pixel PIXB.

[0151] In this example, the first electrode reset transistor T71 can serve as the first reset module ReA; the second terminal T71S of the first electrode reset transistor is used to apply the second initialization voltage Vinit2, the first terminal T71D of the first electrode reset transistor is electrically connected to the pixel electrode of the first sub-pixel PIXA, and the gate T71G of the first electrode reset transistor is used to apply the first electrode reset signal Re1. The first electrode reset transistor T71 is used to, in response to the first electrode reset signal Re1, apply the second initialization voltage Vinit2 to the pixel electrode of the first sub-pixel PIXA, thereby resetting the pixel electrode of the first sub-pixel PIXA. In some possible implementations, the first initialization voltage Vinit1 and the second initialization voltage Vinit2 can be the same initialization voltage; of course, they can also be different initialization voltages. In some possible implementations, the first electrode reset signal Re1 and the capacitor reset signal Re can be the same reset control signal; of course, they can also be different reset control signals. In some possible implementations, the reset time of the capacitor reset transistor T1 and the reset time of the first electrode reset transistor T71 may coincide or partially coincide; of course, the capacitor reset transistor T1 and the first electrode reset transistor T71 may also be reset sequentially, and their reset times may not coincide.

[0152] In this example, the second electrode reset transistor T72 can serve as the second reset module ReB. The second terminal T72S of the second electrode reset transistor is used to apply the second initialization voltage Vinit2, the first terminal T72D of the second electrode reset transistor is electrically connected to the pixel electrode of the second sub-pixel PIXB, and the gate T72G of the second electrode reset transistor is used to apply the second electrode reset signal Re2. The second electrode reset transistor T72 is used to apply the second initialization voltage Vinit2 to the pixel electrode of the second sub-pixel PIXB in response to the second electrode reset signal Re2, thereby resetting the pixel electrode of the second sub-pixel PIXB. In some possible implementations, the second electrode reset signal Re2 and the capacitor reset signal Re can be the same reset control signal; of course, they can also be different reset control signals. In some possible implementations, the reset time of the capacitor reset transistor T1 and the reset time of the second electrode reset transistor T72 can coincide or partially coincide; of course, the capacitor reset transistor T1 and the second electrode reset transistor T72 can also reset sequentially, and their reset times do not need to coincide.

[0153] As follows, Figure 12-1 Using the example of the pixel driving circuit group PDCS architecture, a second exemplary implementation of the pixel driving circuit group PDCS will be described in an exemplary manner.

[0154] In the second exemplary embodiment, both the first pixel driving circuit PDCA and the second pixel driving circuit PDCB are 9T1C circuits (9 transistors + 1 capacitor). In this example, the pixel driving circuit group PDCS includes a capacitor reset transistor T1, a threshold compensation transistor T2, a driving transistor T3, a data writing transistor T4, a current control transistor T5, a first light-emitting control transistor T61, a second light-emitting control transistor T62, a first electrode reset transistor T71, a second electrode reset transistor T72, a pressure sustaining transistor T8, a source-end reset transistor T9, and a storage capacitor Cst.

[0155] The storage capacitor Cst, capacitor reset transistor T1, threshold compensation transistor T2, drive transistor T3, data write transistor T4, current control transistor T5, pressure sustaining transistor T8, and source reset transistor T9 are components in the pixel drive module DRM. The second terminal T1S of the capacitor reset transistor is used to apply the first initialization voltage Vinit1, and the first terminal T1D of the capacitor reset transistor is electrically connected to the fourth node N4; the gate T1G of the capacitor reset transistor is used to apply the capacitor reset signal Re. Thus, the capacitor reset transistor T1 applies the first initialization voltage Vinit1 to the fourth node N4 in response to the capacitor reset signal Re. The second terminal T2S of the threshold compensation transistor is electrically connected to the third node N3, and the first terminal T2D of the threshold compensation transistor is electrically connected to the fourth node N4; the gate T2G of the threshold compensation transistor is used to apply the second scan signal GateP; the threshold compensation transistor T2 connects the fourth node N4 and the third node N3 in response to the second scan signal GateP. The second terminal T3S of the driving transistor is electrically connected to the second node N2, the first terminal T3D of the driving transistor is electrically connected to the third node N3, and the gate T3G of the driving transistor is electrically connected to the first node N1. The driving transistor T3 is used to control the magnitude of the output driving current under the control of the voltage of the first node N1. The second terminal T4S of the data writing transistor is used to load the data voltage Vdata. The first terminal T4D of the data writing transistor is electrically connected to the second node N2, and the gate T4G of the data writing transistor is used to load the second scan signal GateP. The data writing transistor T4 is used to load the data voltage Vdata to the second node N2 in response to the second scan signal GateP. The second terminal T5S of the current control transistor is used to load the driving power supply voltage VDD. The first terminal T5D of the current control transistor is electrically connected to the second node N2, and the gate T5G of the current control transistor is used to load the current control signal EM. The current control transistor T5 is used to load the driving power supply voltage VDD to the second node N2 under the control of the current control signal EM. The second terminal T8S of the pressure sustaining transistor is electrically connected to the fourth node N4, and the first terminal T8D of the pressure sustaining transistor is electrically connected to the first node N1. The gate T8G of the pressure sustaining transistor is used to load the first scan signal GateN. This pressure sustaining transistor T8 is used to electrically connect the first node N1 and the fourth node N4 under the control of the first scan signal GateN. The second terminal T9S of the source reset transistor is used to load the third initialization voltage Vinit3, and the first terminal T9D of the source reset transistor is electrically connected to the second node N2. The gate T9G of the source reset transistor is used to load the capacitor reset signal Re. This source reset transistor T9 is used to load the third initialization voltage Vinit3 onto the second node N2 under the control of the capacitor reset signal Re.

[0156] The pixel driver module (DRM) can be divided into three different stages during operation: circuit reset stage, data writing stage, and current generation stage.

[0157] During the circuit reset phase, the pressure sustaining transistor T8 responds to the first scan signal GateN, causing electrical conduction between the first node N1 and the fourth node N4; the capacitor reset transistor T1 responds to the capacitor reset signal Re, thereby applying the first initialization voltage Vinit1 to the first node N1 and the fourth node N4, resetting the first node N1. This causes the driving transistor T3 to conduct under the control of the first initialization voltage Vinit1. Simultaneously, the source reset transistor T9 responds to the capacitor reset signal Re, causing the third initialization voltage Vinit3 to be applied to the second node N2, resetting the second node N2. Furthermore, since the driving transistor T3 is conducting, the third initialization voltage Vinit3 can also be applied to the third node N3, resetting the third node N3.

[0158] During the data writing phase, the pressure sustaining transistor T8 responds to the first scan signal GateN, causing electrical conduction between the first node N1 and the fourth node N4; the threshold compensation transistor T2 and the data writing transistor T4 respond to the second scan signal GateP, which loads the data voltage Vdata onto the second node N2 and charges the first node N1 through the driving transistor T3, the threshold compensation transistor T2, and the pressure sustaining transistor T8 until the voltage of the first node N1 rises to the point that the driving transistor T3 is turned off. Thus, the voltage at the first node N1 is related to the data voltage Vdata and the threshold voltage of the driving transistor T3, realizing the writing of the data voltage Vdata and the compensation of the threshold voltage of the driving transistor T3.

[0159] During the current generation phase, the current control transistor T5 is turned on in response to the current control signal EM, while the pressure maintenance transistor T8 is turned off without the first scan signal GateN. At this time, if either the first light-emitting control transistor T61 or the second light-emitting control transistor T62 is also turned on, the driving transistor T3 can generate a corresponding driving current based on the voltage of the first node N1, thereby driving the first sub-pixel PIXA or the second sub-pixel PIXB to emit light. Furthermore, the pressure maintenance transistor T8 can be a metal-oxide-semiconductor transistor, which results in a smaller leakage current in the off state, facilitating the maintenance of the voltage of the first node N1. Correspondingly, the first scan signal GateN is a high-level signal.

[0160] In this second exemplary embodiment, the functions of the first light-emitting control transistor T61, the second light-emitting control transistor T62, the first electrode reset transistor T71, and the second electrode reset transistor T72 are the same as or substantially the same as those in the first exemplary embodiment, and will not be repeated here.

[0161] In some embodiments of this disclosure, one of the first light-emitting control module CTRA and the second light-emitting control module CTRB is an N-type transistor, and the other is a P-type transistor; the gates of the N-type transistor and the P-type transistor are connected to the same light-emitting control signal line. A light-emitting control signal can be loaded on this light-emitting control signal line; the light-emitting control signal has alternating high-level and low-level signals. One of the high-level and low-level signals serves as the first light-emitting control signal EM1, and the other serves as the second light-emitting control signal EM2. The high-level signal turns on the N-type transistor and turns off the P-type transistor. The low-level signal turns on the P-type transistor and turns off the N-type transistor.

[0162] For example, the first light-emitting control transistor T61 is a P-type transistor and the second light-emitting control transistor T62 is an N-type transistor. The gates T61G and T62G of the first and second light-emitting control transistors are connected to the same light-emitting control signal line, which is loaded with a light-emitting control signal. This light-emitting control signal has alternating high-level and low-level signals. The low-level signal serves as the first light-emitting control signal EM1, which turns on the first light-emitting control transistor T61 and turns off the second light-emitting control transistor T62. The high-level signal serves as the second light-emitting control signal EM2, which turns on the second light-emitting control transistor T62 and turns off the first light-emitting control transistor T61.

[0163] In the third exemplary implementation, see Figure 12-2 The first pixel driving circuit PDCA and the second pixel driving circuit PDCB are both 3T1C circuits (3 transistors + 1 capacitor). In this example, the pixel driving circuit group PDCS includes a data writing transistor T1, a driving transistor T2, a first light-emitting control transistor T3, a second light-emitting control transistor T4, and a storage capacitor Cst.

[0164] The storage capacitor Cst, data writing transistor T1, and driving transistor T2 are components in the pixel driving module (DRM). The second terminal T1S of the data writing transistor is used to load the data voltage Vdata, the first terminal T1D of the data writing transistor is electrically connected to the first node N1, and the gate T1G of the data writing transistor is used to load the first scan signal Gate1. The data writing transistor T1 is used to load the data voltage Vdata onto the first node N1 in response to the first scan signal Gate1. One end of the storage capacitor Cst is connected to the first node N1, and the other end is electrically connected to the third node N3, which is used to load the driving power supply voltage VDD. The second terminal T2S of the driving transistor is electrically connected to the third node N3, the first terminal T2D of the driving transistor is electrically connected to the second node N2, and the gate T2G of the driving transistor is electrically connected to the first node N1. The driving transistor T2 is used to control the magnitude of the output driving current under the control of the voltage at the first node N1.

[0165] The first light-emitting control transistor T3 serves as the first light-emitting control module CTRA of the pixel driving circuit group PDCS. Its second terminal T3S is connected to the second node N2, and its first terminal T3D is electrically connected to the pixel electrode of the first sub-pixel PIXA. The gate T3G of the first light-emitting control transistor is used to load the second scan signal Gate2. The second light-emitting control transistor T4 serves as the second light-emitting control module CTRB of the pixel driving circuit group PDCS. Its second terminal T4S is connected to the second node N2, and its first terminal T4D is electrically connected to the pixel electrode of the second sub-pixel PIXB. The gate T4G of the second light-emitting control transistor is used to load the second scan signal Gate2.

[0166] In this design, the first light-emitting control transistor T3 and the second light-emitting control transistor T4 are thin-film transistors of opposite types; specifically, one is an N-type transistor and the other is a P-type transistor. The gates T3G and T4G of the first and second light-emitting control transistors are loaded onto the same scan line, which is used to load the second scan signal Gate2. When the second scan signal Gate2 is high, the N-type transistor is turned on and the P-type transistor is turned off. When the second scan signal Gate2 is low, the N-type transistor is turned off and the P-type transistor is turned on. Thus, by controlling the high and low levels of the second scan signal Gate2, one of the first and second light-emitting control transistors T3 and T4 can be selectively turned on, thereby enabling selective light emission of the first sub-pixel PIXA and the second sub-pixel PIXB, achieving time-division multiplexing of the first and second sub-pixels PIXA and PIXB.

[0167] In this disclosure, see Figure 1and Figure 2 The View Definition Layer (VDL) defines the light emission and transmission space of the first sub-pixel PIXA and the second sub-pixel PIXB. In this disclosure, the boundary of the light emission projection space VA of the first sub-pixel PIXA on the side of the first direction D1 is designated as the first boundary EA1 (hereinafter referred to as boundary EA1) of the light emission projection space VA of the first sub-pixel PIXA, and the boundary on the side of the first sub-pixel PIXA on the side of the second direction D2 is designated as the second boundary EA2 (hereinafter referred to as boundary EA2) of the light emission projection space of the first sub-pixel PIXA. When the user is between boundary EA1 and boundary EA2, the user is within the light emission projection space VA of the first sub-pixel PIXA and can see the first image displayed by the first sub-pixel PIXA. The boundary of the light-emitting projection space VB of the second sub-pixel PIXB on the side of the first direction D1 is defined as the first boundary EB1 (hereinafter referred to as boundary EB1) of the light-emitting projection space VB of the second sub-pixel PIXB, and the boundary of the light-emitting projection space VB of the second sub-pixel PIXB on the side of the second direction D2 is defined as the second boundary EB2 (hereinafter referred to as boundary EB2) of the light-emitting projection space VB of the second sub-pixel PIXB. When the user is between boundary EB1 and boundary EB2, the user is in the light-emitting projection space VB of the second sub-pixel PIXB and can see the second image displayed by the second sub-pixel PIXB.

[0168] In this embodiment of the disclosure, the viewing angle definition layer VDL can adopt a black matrix + color filter strategy to define the light projection space VA of the first sub-pixel PIXA and the light projection space VB of the second sub-pixel PIXB. For example, one of the light projection space VA of the first sub-pixel PIXA and the light projection space VB of the second sub-pixel PIXB is at least partially located on the first direction D1 side of the display panel, and the other is at least partially located on the second direction D2 side of the display panel.

[0169] In some embodiments of this disclosure, see Figure 13 The viewing angle definition layer VDL includes a light-transmitting medium layer IJP and a first color filter layer CFLA, which are sequentially stacked on the side of the pixel layer F200 away from the substrate BP. The first color filter layer CFLA includes a viewing angle definition structure VDS corresponding to each of the sub-pixel groups PIXS; the sub-pixel groups PIXS and the corresponding viewing angle definition structures VDS form a light-emitting unit.

[0170] In this embodiment, the light-transmitting medium layer IJP can be a light-transmitting organic material layer, an inorganic material layer, or a composite film layer of organic and inorganic material layers. In one example, the light-transmitting medium layer IJP can be an organic material layer, which can be formed using printing technology.

[0171] In this embodiment, the light-emitting unit includes a first light-emitting unit PVSA; the sub-pixel group PIXS in the first light-emitting unit PVSA is the first sub-pixel group PIXSA, and the viewing angle definition structure VDS in the first light-emitting unit PVSA is the first viewing angle definition structure VDSA. In the first light-emitting unit PVSA, the first sub-pixel PIXA is located on the first direction D1 side of the second sub-pixel PIXB; the first viewing angle definition structure VDSA includes a first light-shielding part BMA corresponding to the first sub-pixel PIXA, a second light-shielding part BMB corresponding to the second sub-pixel PIXB, and a color resist unit CF located between the first light-shielding part BMA and the second light-shielding part BMB; the color of the color resist unit CF is the same as the emission color of the sub-pixel group PIXS. Wherein, the orthogonal projection of the first light-shielding portion BMA on the substrate BP is at least partially located on the side of the first direction D1 of the orthogonal projection of the first sub-pixel PIXA on the substrate BP, and at least a portion of the first sub-pixel PIXA is exposed; wherein, the orthogonal projection of the second light-shielding portion BMB on the substrate BP is at least partially located on the side of the second direction D2 of the orthogonal projection of the second sub-pixel PIXB on the substrate BP, and at least a portion of the second sub-pixel PIXB is exposed; the first direction D1 and the second direction D2 are opposite.

[0172] See Figure 13 In the first light-emitting unit PVSA, the light emitted by the first sub-pixel PIXA and the second sub-pixel PIXB exits from the color resist unit CF and is blocked by the first light-shielding part BMA and the second light-shielding part BMB. In this example, the first light-shielding part BMA is not located directly above the first sub-pixel PIXA (away from the substrate BP), but is offset towards the first direction D1. This causes the light-emitting projection space VA of the first sub-pixel PIXA to mainly face the second direction D2. Correspondingly, the second light-shielding part BMB is not located directly above the second sub-pixel PIXB (away from the substrate BP), but is offset towards the second direction D2. This causes the light-emitting projection space VB of the second sub-pixel PIXB to mainly face the first direction D1. Therefore, in front of the display panel, the light-emitting projection space VA of the first sub-pixel PIXA and the light-emitting projection space VB of the second sub-pixel PIXB can be at least partially separated. In at least a portion of the area on the side of the first direction D1 in front of the display panel, the user can see the second image displayed by the second sub-pixel PIXB, but cannot see the first image displayed by the first sub-pixel PIXA. In at least a portion of the area on the side of the second direction D2 in front of the display panel, the user can see the first image displayed by the first sub-pixel PIXA, but cannot see the second image displayed by the second sub-pixel PIXB.

[0173] In this embodiment, the light projection space VA of the first sub-pixel PIXA and the light projection space VB of the second sub-pixel PIXB can be adjusted by adjusting the distance between the inner edge of the first light-shielding portion BMA (the edge of the first light-shielding portion BMA near the second sub-pixel PIXB) and the inner edge of the first sub-pixel PIXA (the edge of the first sub-pixel PIXA near the second sub-pixel PIXB) in the first direction D1. See also Figure 13 and Figure 14 When the distance between the inner edge of the first light-shielding part BMA and the inner edge of the first sub-pixel PIXA decreases, the angle between the boundary EA1 and the second direction D2 decreases, and the angle between the boundary EB1 and the second direction D2 also decreases.

[0174] In this embodiment, the light projection space VA of the first sub-pixel PIXA and the light projection space VB of the second sub-pixel PIXB can be adjusted by adjusting the distance between the inner edge of the second light-shielding portion BMB (the edge of the second light-shielding portion BMB near the first sub-pixel PIXA) and the inner edge of the second sub-pixel PIXB (the edge of the second sub-pixel PIXB near the first sub-pixel PIXA) in the first direction D1. See also Figure 13 and Figure 14 When the distance between the inner edge of the second light-shielding part BMB and the inner edge of the second sub-pixel PIXB decreases, the angle between the boundary EA2 and the first direction D1 decreases, and the angle between the boundary EB2 and the first direction D1 also decreases.

[0175] In an optional embodiment, in at least a portion of the first light-emitting unit PVSA, the first sub-pixel PIXA and the first light-shielding portion BMA partially overlap; the overlapping portion of the first sub-pixel PIXA and the first light-shielding portion BMA has a size in the first direction D1 that does not exceed half the size of the first sub-pixel PIXA in the first direction D1. Thus, the first light-shielding portion BMA effectively defines the orientation of the boundaries EA1 and EB1 to define the light-emitting projection space VA of the first sub-pixel PIXA and the light-emitting projection space VB of the second sub-pixel PIXB, while also preventing the color resist unit CF from being too small in the first direction D1, which would lead to excessive reduction in the brightness of the first sub-pixel PIXA and the second sub-pixel PIXB, thereby maintaining a suitable aperture ratio for the display panel.

[0176] Furthermore, for any first light-emitting unit PVSA, the first sub-pixel PIXA and the first light-shielding part BMA partially overlap; the size of the overlapping portion of the first sub-pixel PIXA and the first light-shielding part BMA in the first direction D1 does not exceed half the size of the first sub-pixel PIXA in the first direction D1.

[0177] In one example, see Figure 13 The orthographic projection of the inner edge of the first light-shielding portion BMA onto the substrate BP at least partially coincides with the orthographic projection of the outer edge of the first sub-pixel PIXA (the edge of the first sub-pixel PIXA away from the second sub-pixel PIXB) onto the substrate BP.

[0178] In one example, see Figure 14 The orthographic projection of the geometric center of the first sub-pixel PIXA onto the substrate BP lies on the orthographic projection of the inner edge of the first light-shielding portion BMA onto the substrate BP. In other words, the first sub-pixel PIXA is divided into a first part located on the first direction D1 side and a second part located on the second direction D2 side, with the boundary line between the first part and the second part passing through the geometric center of the first sub-pixel PIXA. The first part of the first sub-pixel PIXA is shielded by the first light-shielding portion BMA, while the second part is exposed by the first light-shielding portion BMA. In this example, the first light-shielding portion BMA has a larger size, which allows for better separation of the light-emitting projection space VA of the first sub-pixel PIXA and the light-emitting projection space VB of the second sub-pixel PIXB on the first direction D1 side of the display panel, achieving better privacy protection on the first direction D1 side.

[0179] In an optional embodiment, in at least a portion of the first light-emitting unit PVSA, the second sub-pixel PIXB and the second light-shielding portion BMB partially overlap; the overlapping portion of the second sub-pixel PIXB and the second light-shielding portion BMB has a size in the first direction D1 that does not exceed half the size of the second sub-pixel PIXB in the first direction D1. Thus, the second light-shielding portion BMB effectively defines the orientation of boundaries EA2 and EB2 to define the light-emitting projection space VA of the first sub-pixel PIXA and the light-emitting projection space VB of the second sub-pixel PIXB, and also avoids excessive reduction in the brightness of the first sub-pixel PIXA and the second sub-pixel PIXB due to the excessively small size of the color resist unit CF in the second direction D2, thereby maintaining a suitable aperture ratio for the display panel.

[0180] Furthermore, for any first light-emitting unit PVSA, the second sub-pixel PIXB and the second light-shielding part BMB partially overlap; the size of the overlapping portion of the second sub-pixel PIXB and the second light-shielding part BMB in the second direction D2 does not exceed half the size of the second sub-pixel PIXB in the first direction D1.

[0181] In one example, see Figure 13The orthographic projection of the inner edge of the second light-shielding portion BMB onto the substrate BP at least partially coincides with the orthographic projection of the outer edge of the second sub-pixel PIXB (the edge of the second sub-pixel PIXB away from the first sub-pixel PIXA) onto the substrate BP.

[0182] In one example, see Figure 14 The orthographic projection of the geometric center of the second sub-pixel PIXB onto the substrate BP lies on the orthographic projection of the inner edge of the second light-shielding portion BMB onto the substrate BP. In other words, the second sub-pixel PIXB is divided into a first part located on the second direction D2 side and a second part located on the first direction D1 side, with the boundary line between the first part and the second part passing through the geometric center of the second sub-pixel PIXB. The first part of the second sub-pixel PIXB is shielded by the second light-shielding portion BMB, while the second part is exposed. In this example, the second light-shielding portion BMB has a larger size, which allows for better separation of the light-emitting projection space VA of the first sub-pixel PIXA and the light-emitting projection space VB of the second sub-pixel PIXB on the second direction D2 side of the display panel, achieving better privacy protection on the second direction D2 side.

[0183] In an alternative embodiment of this method, see [link to alternative implementation]. Figure 15 For two adjacent first light-emitting units (PVSAs) along the first direction D1, the second light-shielding portion BMB of the first light-emitting unit PVSA located on the first direction D1 side is multiplexed as the first light-shielding portion BMA of the first light-emitting unit PVSA located on the second direction D2 side. In other words, along the first direction D1, the first color filter layer CFLA may include light-shielding portions BM and color resist units CF arranged alternately in sequence; wherein, two adjacent light-shielding portions BM and the color resist unit CF between the two light-shielding portions BM can serve as the first viewing angle definition structure VDSA corresponding to the first sub-pixel group PIXSA below the color resist unit CF (in the direction close to the substrate BP). Therefore, for the non-end light-shielding portion BM, it can serve as both the second light-shielding portion BMB of the first viewing angle definition structure VDSA on the first direction D1 side and the first light-shielding portion BMA of the first viewing angle definition structure VDSA on the second direction D2 side.

[0184] For example, in Figure 15Along the second direction D2, the display panel includes a plurality of first sub-pixel groups PIXSA arranged sequentially, such as a red sub-pixel group PIXS-R, a green sub-pixel group PIXS-G, and a blue sub-pixel group PIXS-B arranged sequentially. Specifically, the red sub-pixel group PIXS-R includes a first red sub-pixel PIXA-R located on the first direction D1 side and a second red sub-pixel PIXB-R located on the second direction D2 side; the green sub-pixel group PIXS-G includes a first green sub-pixel PIXA-G located on the first direction D1 side and a second green sub-pixel PIXB-G located on the second direction D2 side; and the blue sub-pixel group PIXS-B includes a first blue sub-pixel PIXA-B located on the first direction D1 side and a second blue sub-pixel PIXB-B located on the second direction D2 side. The first color filter layer CFLA includes a light-shielding portion BM and a color resist unit CF arranged alternately along the second direction D2. The color resist unit CF is arranged in a one-to-one correspondence with the sub-pixel group PIXS, overlapping with the corresponding sub-pixel group PIXS and having the same color. For example, the color resist unit CF includes a red color resist unit CF-R corresponding to the red sub-pixel group PIXS-R, a green color resist unit CF-G corresponding to the green sub-pixel group PIXS-G, and a blue color resist unit CF-B corresponding to the blue sub-pixel group PIXS-B. The light-blocking portion BM on the first direction D1 side of the red color resist unit CF-R, the light-blocking portion BM on the second direction D2 side of the red color resist unit CF-R, and the red color resist unit CF-R itself can form the viewing angle definition structure VDS-R of the red sub-pixel group. This viewing angle definition structure VDS-R of the red sub-pixel group corresponds to the red sub-pixel group PIXS-R, forming a first light-emitting unit PVSA. The light-shielding portion BM on the first direction D1 side of the green color resist unit CF-G, the light-shielding portion BM on the second direction D2 side of the green color resist unit CF-G, and the green color resist unit CF-G can form the viewing angle definition structure VDS-G of the green sub-pixel group; this viewing angle definition structure VDS-G of the green sub-pixel group corresponds to the green sub-pixel group PIXS-G, forming a first light-emitting unit PVSA. The light-shielding portion BM between the red color resist unit CF-R and the green color resist unit CF-G can serve as the second light-shielding portion BMB in the viewing angle definition structure VDS-R of the red sub-pixel group (in... Figure 15 The part marked as BMB-R can also serve as the first light-shielding part (BMA) in the VDS-G view definition structure of the green sub-pixel group. Figure 15 (marked as BMA-G).

[0185] In an optional embodiment, the distance between the first color filter layer CFLA and the pixel layer F200 is not less than the size of the first sub-pixel group PIXSA along the first direction D1. In this embodiment, the size of the first sub-pixel group PIXSA along the first direction D1 can refer to the distance between the outer edge of the first sub-pixel PIXA and the outer edge of the second sub-pixel PIXB along the first direction D1. This avoids the spacing between the first color filter layer CFLA and the driving layer F100 being too small, better defining the light projection space VA of the first sub-pixel PIXA and the light projection space VB of the second sub-pixel PIXB, avoiding an excessively large angle between boundary EA1 and the second direction D2, and also avoiding an excessively large angle between boundary EB2 and the first direction D1, thus facilitating the separation of the light projection space VA of the first sub-pixel PIXA and the light projection space VB of the second sub-pixel PIXB. It is understandable that, with the dimensions of the first light-shielding part BMA and the second light-shielding part BMB fixed, the smaller the distance between the first color filter layer CFLA and the driving layer F100, the greater the overlap between the light-emitting projection space VA of the first sub-pixel PIXA and the light-emitting projection space VB of the second sub-pixel PIXB, which is less conducive to their separation.

[0186] In an alternative embodiment of this method, see [link to alternative implementation]. Figure 16 The viewing angle definition layer VDL further includes a first black matrix layer BML1 located between the pixel layer F200 and the light-transmitting medium layer IJP; the first viewing angle definition structure VDSA further includes a first bottom light-shielding part BMAx and a second bottom light-shielding part BMBx located in the first black matrix layer BML1; the first bottom light-shielding part BMAx overlaps with the first light-shielding part BMA, and the second bottom light-shielding part BMBx overlaps with the second light-shielding part BMB.

[0187] Thus, compared to the first light-blocking part BMA, the first bottom light-blocking part BMAx is closer to the first sub-pixel PIXA. This helps to better block the wide-viewing-angle light emitted by the first sub-pixel PIXA towards the first direction D1, reducing the risk of light leakage from the first sub-pixel PIXA. Therefore, even from a wide viewing angle on the first direction D1 side of the display panel, the first image displayed by the first sub-pixel PIXA will not be visible. Similarly, compared to the second light-blocking part BMB, the second bottom light-blocking part BMBx is closer to the second sub-pixel PIXB. This helps to better block the wide-viewing-angle light emitted by the second sub-pixel PIXB towards the second direction D2, reducing the risk of light leakage from the second sub-pixel PIXB. Therefore, even from a wide viewing angle on the second direction D2 side of the display panel, the second image displayed by the second sub-pixel PIXB will not be visible. This improves the privacy protection effect of the display panel in privacy mode.

[0188] Furthermore, it is understandable that if the first sub-pixel PIXA has a large viewing angle light leakage towards the first direction D1, the user can see a first light leakage image on the first direction D1 side of the display panel. This first light leakage image will overlap with the second image, thus preventing the user from seeing a high-quality second image on the first direction D1 side of the display panel, reducing the display effect on the first direction D1 side. Similarly, if the second sub-pixel PIXB has a large viewing angle light leakage towards the second direction D2, the user can see a second light leakage image on the second direction D2 side of the display panel. This second light leakage image will overlap with the first image, thus preventing the user from seeing a high-quality first image on the second direction D2 side of the display panel, reducing the display effect on the second direction D2 side. In an optional embodiment, the first bottom light-blocking portion BMAx and the second bottom light-blocking portion BMBx can block large viewing angle light leakage, thereby reducing the risk of first and second light leakage images appearing and improving the display effect of the display panel in privacy mode. In this embodiment of the disclosure, the viewing angle refers to the angle at which light deviates from the normal of the display panel in the first direction D1 or the second direction D2. The smaller the viewing angle, the more perpendicular the light is to the display panel; the larger the viewing angle, the smaller the angle between the light and the first direction D1 or the second direction D2.

[0189] Furthermore, the orthographic projection of the first bottom light-shielding portion BMAx onto the substrate BP does not exceed the orthographic projection of the first light-shielding portion BMA onto the substrate BP; the orthographic projection of the second bottom light-shielding portion BMBx onto the substrate BP does not exceed the orthographic projection of the second light-shielding portion BMB onto the substrate BP.

[0190] In one example, the orthographic projection of the first light-shielding portion BMA onto the substrate BP coincides with the orthographic projection of the first bottom light-shielding portion BMAx onto the substrate BP. Similarly, the orthographic projection of the second light-shielding portion BMB onto the substrate BP coincides with the orthographic projection of the second bottom light-shielding portion BMBx onto the substrate BP. Thus, the mask used to fabricate the first black matrix layer BML1 can be applied to the fabrication process of the first color filter layer CFLA, reducing the number of masks required in the display panel fabrication process and consequently lowering the fabrication cost of the display panel. Of course, in other examples of this disclosure, the shape, size, or orthographic projection position of the first light-shielding portion BMA onto the substrate BP may not be entirely consistent with the first bottom light-shielding portion BMAx; similarly, the shape, size, or orthographic projection position of the second light-shielding portion BMB onto the substrate BP may not be entirely consistent with the second bottom light-shielding portion BMBx.

[0191] In some embodiments of this disclosure, the viewing angle definition layer VDL includes a light-transmitting medium layer IJP and a first color filter layer CFLA, which are sequentially stacked on the side of the pixel layer F200 away from the substrate BP; the first color filter layer CFLA includes a viewing angle definition structure VDS corresponding to each of the sub-pixel groups PIXS; the sub-pixel groups PIXS and the corresponding viewing angle definition structures VDS form a light-emitting unit.

[0192] In this embodiment, see Figure 17 The light-emitting unit includes a second light-emitting unit PVSB; the second light-emitting unit PVSB includes a second sub-pixel group PIXSB and a second viewing angle definition structure VDSB corresponding to the second sub-pixel group PIXSB. In the second light-emitting unit PVSB, the first sub-pixel PIXA is located on the third direction D3 side of the second sub-pixel PIXB; the third direction D3 is perpendicular to the first direction D1 and parallel to the plane where the display panel is located. The second viewing angle definition structure VDSB includes a first light-shielding part BMA and a first color resist unit CFA corresponding to the first sub-pixel PIXA, and a second light-shielding part BMB and a second color resist unit CFB corresponding to the second sub-pixel PIXB; the colors of the first color resist unit CFA and the second color resist unit CFB are the same as the emission color of the sub-pixel group PIXS. Wherein, the orthographic projection of the first light-shielding part BMA on the substrate BP is at least partially located on the first direction D1 side of the orthographic projection of the first sub-pixel PIXA on the substrate BP, and at least a portion of the first sub-pixel PIXA is exposed. The orthographic projection of the first color resist unit CFA on the substrate BP is at least partially located on the side of the second direction D2 of the orthographic projection of the first sub-pixel PIXA on the substrate BP, and extends along the first direction D1 to connect with the first light-shielding portion BMA; wherein, the orthographic projection of the second light-shielding portion BMB on the substrate BP is at least partially located on the side of the second direction D2 of the orthographic projection of the second sub-pixel PIXB on the substrate BP, and exposes at least a portion of the second sub-pixel PIXB; the orthographic projection of the second color resist unit CFB on the substrate BP is at least partially located on the side of the first direction D1 of the orthographic projection of the second sub-pixel PIXB on the substrate BP, and extends along the second direction D2 to connect with the second light-shielding portion BMB.

[0193] Thus, the first light-shielding portion BMA is located above the first sub-pixel PIXA (in a direction away from the substrate BP) and biased towards the first direction D1, causing the light-emitting projection space VA of the first sub-pixel PIXA to face or primarily face the second direction D2. The second light-shielding portion BMB is located above the second sub-pixel PIXB (in a direction away from the substrate BP) and biased towards the second direction D2, causing the light-emitting projection space VB of the second sub-pixel PIXB to face or primarily face the first direction D1. This achieves separation of the light-emitting projection space VA of the first sub-pixel PIXA and the light-emitting projection space VB of the second sub-pixel PIXB on the first direction D1 side and on the second direction D2 side of the display panel.

[0194] In this embodiment, the boundary EA1 of the light projection space VA of the first sub-pixel PIXA can be adjusted by adjusting the distance between the edge of the first light-shielding part BMA on the second direction D2 side and the edge of the first sub-pixel PIXA on the second direction D2 side. When the distance between the edge of the first light-shielding part BMA on the second direction D2 side and the edge of the first sub-pixel PIXA on the second direction D2 side decreases, the angle between the boundary EA1 and the second direction D2 also decreases. Similarly, the boundary EB2 of the light projection space VB of the second sub-pixel PIXB can be adjusted by adjusting the distance between the edge of the second light-shielding part BMB on the first direction D1 side and the edge of the second sub-pixel PIXB on the first direction D1 side. When the distance between the edge of the second light-shielding part BMB on the first direction D1 side and the edge of the second sub-pixel PIXB on the first direction D1 side decreases, the angle between the boundary EB2 and the first direction D1 also decreases.

[0195] In an optional embodiment, in at least a portion of the second light-emitting unit PVSB, the first sub-pixel PIXA and the first light-shielding portion BMA partially overlap; the size of the overlapping portion of the first sub-pixel PIXA and the first light-shielding portion BMA in the first direction D1 does not exceed half the size of the first sub-pixel PIXA in the first direction D1. Further, for any second light-emitting unit PVSB, the first sub-pixel PIXA and the first light-shielding portion BMA partially overlap; the size of the overlapping portion of the first sub-pixel PIXA and the first light-shielding portion BMA in the first direction D1 does not exceed half the size of the first sub-pixel PIXA in the first direction D1.

[0196] In one example, the orthographic projection of the first light-shielding portion BMA on the substrate BP on the side of the second direction D2 at least partially coincides with the orthographic projection of the first sub-pixel PIXA on the substrate BP on the side of the first direction D1.

[0197] In one example, the orthographic projection of the geometric center of the first sub-pixel PIXA onto the substrate BP is on the orthographic projection of the edge of the first light-shielding portion BMA on the second direction D2 side onto the substrate BP. In this example, the first light-shielding portion BMA has a larger size, which allows for better separation of the light-emitting projection space VA of the first sub-pixel PIXA and the light-emitting projection space VB of the second sub-pixel PIXB on the first direction D1 side of the display panel, achieving better privacy protection on the first direction D1 side.

[0198] In an optional embodiment, in at least a portion of the second light-emitting unit PVSB, the second sub-pixel PIXB and the second light-shielding portion BMB partially overlap; the size of the overlapping portion of the second sub-pixel PIXB and the second light-shielding portion BMB in the second direction D2 does not exceed half the size of the second sub-pixel PIXB in the first direction D1. Further, for any second light-emitting unit PVSB, the second sub-pixel PIXB and the second light-shielding portion BMB partially overlap; the size of the overlapping portion of the second sub-pixel PIXB and the second light-shielding portion BMB in the first direction D1 does not exceed half the size of the second sub-pixel PIXB in the first direction D1.

[0199] In one example, the orthographic projection of the second light-shielding portion BMB on the substrate BP on the edge of the first direction D1 side coincides at least partially with the orthographic projection of the second sub-pixel PIXB on the substrate BP on the edge of the second direction D2 side.

[0200] In one example, the orthographic projection of the geometric center of the second sub-pixel PIXB onto the substrate BP is on the orthographic projection of the edge of the second light-shielding portion BMB on the first direction D1 side onto the substrate BP. In this example, the second light-shielding portion BMB has a larger size, which allows for better separation of the light-emitting projection space VA of the first sub-pixel PIXA and the light-emitting projection space VB of the second sub-pixel PIXB on the second direction D2 side of the display panel, achieving better privacy protection on the second direction D2 side.

[0201] In an optional embodiment, the distance between the first color filter layer CFLA and the pixel layer F200 is not less than the size of the sub-pixel group PIXS along the first direction D1. This avoids the spacing between the first color filter layer CFLA and the driving layer F100 being too small, better defining the light projection space VA of the first sub-pixel PIXA and the light projection space VB of the second sub-pixel PIXB, preventing the angle between boundary EA1 and the second direction D2 from being too large, and also preventing the angle between boundary EB2 and the first direction D1 from being too large, thus facilitating the separation of the light projection space VA of the first sub-pixel PIXA and the light projection space VB of the second sub-pixel PIXB.

[0202] In an optional embodiment, the viewing angle defining layer VDL may further include a first black matrix layer BML1 located between the pixel layer F200 and the light-transmitting medium layer IJP; the second viewing angle defining structure VDSB further includes a first bottom light-shielding portion BMAx and a second bottom light-shielding portion BMBx located in the first black matrix layer BML1; the first bottom light-shielding portion BMAx overlaps with the first light-shielding portion BMA, and the second bottom light-shielding portion BMBx overlaps with the second light-shielding portion BMB. For example, the orthographic projection of the first bottom light-shielding portion BMAx onto the substrate BP does not exceed the orthographic projection of the first light-shielding portion BMA onto the substrate BP; the orthographic projection of the second bottom light-shielding portion BMBx onto the substrate BP does not exceed the orthographic projection of the second light-shielding portion BMB onto the substrate BP. This reduces the light leakage risk of the first sub-pixel PIXA at ​​a large viewing angle on the first direction D1 side, and reduces the light leakage risk of the second sub-pixel PIXB at a large viewing angle on the second direction D2 side, thereby improving the privacy protection effect of the display panel in privacy mode and improving the display effect of the display panel in privacy mode.

[0203] In one example, the orthographic projection of the first light-shielding portion BMA onto the substrate BP coincides with the orthographic projection of the first bottom light-shielding portion BMAx onto the substrate BP. Similarly, the orthographic projection of the second light-shielding portion BMB onto the substrate BP coincides with the orthographic projection of the second bottom light-shielding portion BMBx onto the substrate BP. Thus, the mask used to fabricate the first black matrix layer BML1 can be applied to the fabrication process of the first color filter layer CFLA, reducing the number of masks required in the display panel fabrication process and consequently lowering the fabrication cost of the display panel. Of course, in other examples of this disclosure, the shape, size, or orthographic projection position of the first light-shielding portion BMA onto the substrate BP may not be entirely consistent with the first bottom light-shielding portion BMAx; similarly, the shape, size, or orthographic projection position of the second light-shielding portion BMB onto the substrate BP may not be entirely consistent with the second bottom light-shielding portion BMBx.

[0204] In this embodiment of the disclosure, the view definition layer VDL can use a strategy of setting multiple black matrices to limit the light projection space VA of the first sub-pixel PIXA and the light projection space VB of the second sub-pixel PIXB.

[0205] In some embodiments of this disclosure, see Figure 18 and Figure 19 The viewing angle definition layer VDL includes a first black matrix layer BML1, a light-transmitting medium layer IJP, and a second black matrix layer BML2, which are sequentially stacked on the side of the pixel layer F200 away from the substrate BP; the viewing angle definition layer VDL has a viewing angle definition structure VDS that corresponds one-to-one with the sub-pixel group PIXS; the sub-pixel group PIXS and the corresponding viewing angle definition structure VDS form a light-emitting unit;

[0206] In this embodiment, the light-emitting unit includes a first light-emitting unit PVSA; the first light-emitting unit PVSA includes a first sub-pixel group PIXSA and a first viewing angle definition structure VDSA corresponding to the first sub-pixel group PIXSA. In the first light-emitting unit PVSA, the first sub-pixel PIXA is located on the first direction D1 side of the second sub-pixel PIXB; the first viewing angle definition structure VDSA includes a first light-shielding part BMA and a first bottom light-shielding part BMAx corresponding to the first sub-pixel PIXA, and a second light-shielding part BMB and a second bottom light-shielding part BMBx corresponding to the second sub-pixel PIXB; wherein, the first bottom light-shielding part BMAx and the second bottom light-shielding part BMBx are located on the first black matrix layer BML1, and the first light-shielding part BMA and the second light-shielding part BMB are located on the second black matrix layer BML2; the orthographic projection of the first light-shielding part BMA on the substrate BP is at least partially located on the first direction D1 side of the orthographic projection of the first sub-pixel PIXA on the substrate BP. The first sub-pixel PIXA is exposed at least partially; the first bottom light-shielding portion BMAx is projected onto the substrate BP at least partially on the side of the first direction D1 of the projected projection of the first sub-pixel PIXA onto the substrate BP, and exposes at least partially the first sub-pixel PIXA; the second light-shielding portion BMB is projected onto the substrate BP at least partially on the side of the second direction D2 of the projected projection of the second sub-pixel PIXB onto the substrate BP, and exposes at least partially the second sub-pixel PIXB; the second bottom light-shielding portion BMBx is projected onto the substrate BP at least partially on the side of the second direction D2 of the projected projection of the second sub-pixel PIXB onto the substrate BP, and exposes at least partially the second sub-pixel PIXB.

[0207] See Figure 18In the first light-emitting unit PVSA, the light emitted by the first sub-pixel PIXA and the second sub-pixel PIXB exits from the color resist unit CF and is blocked by the first light-shielding part BMA, the second light-shielding part BMB, the first bottom light-shielding part BMAx, and the second bottom light-shielding part BMBx. In this example, the first light-shielding part BMA and the first bottom light-shielding part BMAx are not located directly above the first sub-pixel PIXA (away from the substrate BP), but are offset towards the first direction D1. This causes the light-emitting projection space VA of the first sub-pixel PIXA to mainly face the second direction D2. Correspondingly, the second light-shielding part BMB and the second bottom light-shielding part BMBx are not located directly above the second sub-pixel PIXB (away from the substrate BP), but are offset towards the second direction D2. This causes the light-emitting projection space VB of the second sub-pixel PIXB to mainly face the first direction D1. Therefore, in front of the display panel, the light-emitting projection space VA of the first sub-pixel PIXA and the light-emitting projection space VB of the second sub-pixel PIXB can be at least partially separated. In at least a portion of the area on the side of the first direction D1 in front of the display panel, the user can see the second image displayed by the second sub-pixel PIXB, but cannot see the first image displayed by the first sub-pixel PIXA. In at least a portion of the area on the side of the second direction D2 in front of the display panel, the user can see the first image displayed by the first sub-pixel PIXA, but cannot see the second image displayed by the second sub-pixel PIXB.

[0208] In this embodiment, the first black matrix layer BML1 is adjacent to the pixel layer F200, which can reduce the risk of light leakage of the first sub-pixel PIXA at ​​a large viewing angle on the first direction D1 side, and reduce the risk of light leakage of the second sub-pixel PIXB at a large viewing angle on the second direction D2 side, thereby improving the privacy protection effect of the display panel in privacy mode and improving the display effect of the display panel in privacy mode.

[0209] In an optional embodiment, in at least a portion of the first light-emitting units PVSA, the orthographic projection of the first bottom light-shielding portion BMAx onto the substrate BP does not exceed the orthographic projection of the first light-shielding portion BMA onto the substrate BP, and the orthographic projection of the second bottom light-shielding portion BMBx onto the substrate BP does not exceed the orthographic projection of the second light-shielding portion BMB onto the substrate BP. In this embodiment, the angle between the boundary EA1 and the second direction D2 is limited by the distance between the inner edge of the first light-shielding portion BMA (the edge of the first light-shielding portion BMA near the second sub-pixel PIXB) and the inner edge of the first sub-pixel PIXA (the edge of the first sub-pixel PIXA near the second sub-pixel PIXB) in the first direction D1, or by the distance between the inner edge of the first bottom light-shielding portion BMAx (the edge of the first bottom light-shielding portion BMAx near the second sub-pixel PIXB) and the inner edge of the first sub-pixel PIXA in the first direction D1, with the smaller angle between the two being used as the standard. The angle between boundary EB1 and the second direction D2 is limited by the distance between the inner edge of the first light-shielding part BMA and the inner edge of the first sub-pixel PIXA in the first direction D1. Therefore, by adjusting the distance between the inner edge of the first light-shielding part BMA and the inner edge of the first sub-pixel PIXA in the first direction D1, and the distance between the inner edge of the first bottom light-shielding part BMAx and the inner edge of the first sub-pixel PIXA in the first direction D1, the light projection space VA of the first sub-pixel PIXA and the light projection space VB of the second sub-pixel PIXB can be adjusted.

[0210] In an alternative embodiment, in at least a portion of the first light-emitting unit PVSA, the first sub-pixel PIXA and the first light-shielding portion BMA partially overlap; the size of the overlapping portion of the first sub-pixel PIXA and the first light-shielding portion BMA in the first direction D1 does not exceed half the size of the first sub-pixel PIXA in the first direction D1.

[0211] In an alternative embodiment, in at least a portion of the first light-emitting unit PVSA, the first sub-pixel PIXA and the first bottom light-shielding portion BMAx partially overlap; the size of the overlapping portion of the first sub-pixel PIXA and the first bottom light-shielding portion BMAx in the first direction D1 does not exceed half the size of the first sub-pixel PIXA in the first direction D1.

[0212] In this way, the viewing angle definition layer VDL can effectively limit the orientation of the boundary EA1 and the boundary EB1 to limit the light projection space VA of the first sub-pixel PIXA and the light projection space VB of the second sub-pixel PIXB. It can also prevent the size of the opening between the first light-shielding part BMA and the second light-shielding part BMB from being too small in the first direction D1 and prevent the size of the opening between the first bottom light-shielding part BMAx and the second bottom light-shielding part BMBx from being too small in the first direction D1. In this way, it can prevent the aperture ratio of the first black matrix layer BML1 and the second black matrix layer BML2 from being too low, which would lead to an excessive reduction in the brightness of the first sub-pixel PIXA and the second sub-pixel PIXB, so that the display panel maintains an appropriate aperture ratio.

[0213] Furthermore, for any first light-emitting unit PVSA, the first sub-pixel PIXA and the first light-shielding portion BMA partially overlap; the first sub-pixel PIXA and the first bottom light-shielding portion BMAx partially overlap. The size of the overlapping portion of the first sub-pixel PIXA and the first light-shielding portion BMA in the first direction D1 does not exceed half the size of the first sub-pixel PIXA in the first direction D1. The size of the overlapping portion of the first sub-pixel PIXA and the first bottom light-shielding portion BMAx in the first direction D1 does not exceed half the size of the first sub-pixel PIXA in the first direction D1.

[0214] In one example, see Figure 18 The orthographic projection of the inner edge of the first light-shielding portion BMA onto the substrate BP is at least partially coincident with, for example, the orthographic projection of the outer edge of the first sub-pixel PIXA (the edge of the first sub-pixel PIXA away from the second sub-pixel PIXB) onto the substrate BP.

[0215] In one example, see Figure 18 The orthographic projection of the inner edge of the first bottom light-shielding portion BMAx onto the substrate BP at least partially coincides with, for example, the orthographic projection of the outer edge of the first sub-pixel PIXA (the edge of the first sub-pixel PIXA away from the second sub-pixel PIXB) onto the substrate BP.

[0216] In one example, see Figure 19The orthographic projection of the geometric center of the first sub-pixel PIXA onto the substrate BP lies on the orthographic projection of the inner edge of the first light-shielding portion BMA onto the substrate BP. In other words, the first sub-pixel PIXA is divided into a first part located on the first direction D1 side and a second part located on the second direction D2 side, with the boundary line between the first part and the second part passing through the geometric center of the first sub-pixel PIXA. The first part of the first sub-pixel PIXA is shielded by the first light-shielding portion BMA, while the second part is exposed by the first light-shielding portion BMA. In this example, the first light-shielding portion BMA has a larger size, which allows for better separation of the light-emitting projection space VA of the first sub-pixel PIXA and the light-emitting projection space VB of the second sub-pixel PIXB on the first direction D1 side of the display panel, achieving better privacy protection on the first direction D1 side.

[0217] In one example, see Figure 19 The orthographic projection of the geometric center of the first sub-pixel PIXA onto the substrate BP lies on the orthographic projection of the inner edge of the first bottom light-shielding portion BMAx onto the substrate BP. In other words, the first part of the first sub-pixel PIXA is blocked by the first bottom light-shielding portion BMAx, while the second part of the first sub-pixel PIXA is exposed by the first bottom light-shielding portion BMAx. In this example, the first bottom light-shielding portion BMAx has a larger size, which allows for better separation of the light-emitting projection space VA of the first sub-pixel PIXA and the light-emitting projection space VB of the second sub-pixel PIXB on the first direction D1 side of the display panel, achieving better privacy protection on the first direction D1 side.

[0218] In an alternative embodiment, in at least a portion of the first light-emitting unit PVSA, the second sub-pixel PIXB and the second light-shielding portion BMB partially overlap; the size of the overlapping portion of the second sub-pixel PIXB and the second light-shielding portion BMB in the first direction D1 does not exceed half the size of the second sub-pixel PIXB in the first direction D1.

[0219] In an alternative embodiment, in at least a portion of the first light-emitting unit PVSA, the second sub-pixel PIXB and the second bottom light-shielding portion BMBx partially overlap; the size of the overlapping portion of the second sub-pixel PIXB and the second bottom light-shielding portion BMBx in the first direction D1 does not exceed half the size of the second sub-pixel PIXB in the first direction D1.

[0220] Thus, the viewing angle definition layer VDL can effectively limit the orientation of the boundaries EA2 and EB2 to limit the light projection space VA of the first sub-pixel PIXA and the light projection space VB of the second sub-pixel PIXB. It can also prevent the opening between the first light-shielding part BMA and the second light-shielding part BMB from being too small in the first direction D1 and prevent the opening between the first bottom light-shielding part BMAx and the second bottom light-shielding part BMBx from being too small in the first direction D1. In this way, it can prevent the aperture ratio of the first black matrix layer BML1 and the second black matrix layer BML2 from being too low, which would lead to an excessive reduction in the brightness of the first sub-pixel PIXA and the second sub-pixel PIXB, so that the display panel maintains an appropriate aperture ratio.

[0221] Furthermore, for any first light-emitting unit PVSA, the second sub-pixel PIXB and the second light-shielding portion BMB partially overlap; the second sub-pixel PIXB and the second bottom light-shielding portion BMBx partially overlap. The size of the overlapping portion of the second sub-pixel PIXB and the second light-shielding portion BMB in the first direction D1 does not exceed half the size of the second sub-pixel PIXB in the first direction D1. The size of the overlapping portion of the second sub-pixel PIXB and the second bottom light-shielding portion BMBx in the first direction D1 does not exceed half the size of the second sub-pixel PIXB in the first direction D1.

[0222] In one example, see Figure 18 The orthographic projection of the inner edge of the second light-shielding portion BMB onto the substrate BP at least partially coincides with, for example, the orthographic projection of the outer edge of the second sub-pixel PIXB (the edge of the second sub-pixel PIXB away from the first sub-pixel PIXA) onto the substrate BP.

[0223] In one example, see Figure 18 The orthographic projection of the inner edge of the second bottom light-shielding portion BMBx onto the substrate BP at least partially coincides with, for example, the orthographic projection of the outer edge of the second sub-pixel PIXB (the edge of the second sub-pixel PIXB away from the first sub-pixel PIXA) onto the substrate BP.

[0224] In one example, see Figure 19The orthographic projection of the geometric center of the second sub-pixel PIXB onto the substrate BP lies on the orthographic projection of the inner edge of the second light-shielding portion BMB onto the substrate BP. In other words, the second sub-pixel PIXB is divided into a first part located on the second direction D2 side and a second part located on the first direction D1 side, with the boundary line between the first part and the second part passing through the geometric center of the second sub-pixel PIXB. The first part of the second sub-pixel PIXB is shielded by the second light-shielding portion BMB, while the second part is exposed. In this example, the second light-shielding portion BMB has a larger size, which allows for better separation of the light-emitting projection space VA of the first sub-pixel PIXA and the light-emitting projection space VB of the second sub-pixel PIXB on the second direction D2 side of the display panel, achieving better privacy protection on the second direction D2 side.

[0225] In one example, see Figure 19 The orthographic projection of the geometric center of the second sub-pixel PIXB onto the substrate BP lies on the orthographic projection of the inner edge of the second bottom light-shielding portion BMBx onto the substrate BP. In other words, the first part of the second sub-pixel PIXB is blocked by the second bottom light-shielding portion BMBx, while the second part of the second sub-pixel PIXB is exposed by the second bottom light-shielding portion BMBx. In this example, the second bottom light-shielding portion BMBx has a larger size, which allows for better separation of the light-emitting projection space VA of the first sub-pixel PIXA and the light-emitting projection space VB of the second sub-pixel PIXB on the second direction D2 side of the display panel, achieving better privacy protection on the second direction D2 side.

[0226] In an optional embodiment, the orthographic projection of the first light-shielding portion BMA onto the substrate BP coincides with the orthographic projection of the first bottom light-shielding portion BMAx onto the substrate BP. Similarly, the orthographic projection of the second light-shielding portion BMB onto the substrate BP coincides with the orthographic projection of the second bottom light-shielding portion BMBx onto the substrate BP. Thus, the mask used to fabricate the first black matrix layer BML1 can be applied to the fabrication process of the second black matrix layer BML2, reducing the number of masks required in the display panel fabrication process and consequently lowering the fabrication cost of the display panel. Of course, in other examples of this disclosure, the shape, size, or orthographic projection position of the first light-shielding portion BMA onto the substrate BP may not be entirely consistent with the first bottom light-shielding portion BMAx; similarly, the shape, size, or orthographic projection position of the second light-shielding portion BMB onto the substrate BP may not be entirely consistent with the second bottom light-shielding portion BMBx.

[0227] In an alternative embodiment of this method, see [link to alternative implementation]. Figure 20For two adjacent first light-emitting units PVSA along the first direction D1, the second light-shielding portion BMB of the first light-emitting unit PVSA located on the first direction D1 side is multiplexed as the first light-shielding portion BMA of the first light-emitting unit PVSA located on the second direction D2 side, and the second bottom light-shielding portion BMBx of the first light-emitting unit PVSA located on the first direction D1 side is multiplexed as the first bottom light-shielding portion BMAx of the first light-emitting unit PVSA located on the second direction D2 side. In other words, along the first direction D1, the first black matrix layer BML1 may include bottom light-shielding portions BMx and first light-transmitting windows (e.g., between two adjacent bottom light-shielding portions BMx) arranged alternately in sequence. Figure 20 APx-R, APx-G, APx-B in the image); the second black matrix layer BML2 may include alternating light-blocking parts BM and a second light-transmitting window located between two adjacent light-blocking parts BM (e.g., APx-R, APx-G, APx-B); Figure 20 In the AP-R, AP-G, and AP-B sub-pixels, the pixel layer F200 is provided with multiple first sub-pixel groups (PIXSAs). Each first sub-pixel group (PIXSA), first light-transmitting window, and second light-transmitting window is configured in a one-to-one correspondence, meaning that the corresponding first sub-pixel groups (PIXSAs), first light-transmitting windows, and second light-transmitting windows overlap. The bottom light-blocking portion BMx of the first light-transmitting window on the first direction D1 side and the bottom light-blocking portion BMx of the second direction D2 side, and the light-blocking portion BMx of the second light-transmitting window on the first direction D1 side and the light-blocking portion BMx of the second light-transmitting window on the second direction D2 side, together form the first viewing angle definition structure (VDSA) corresponding to the first sub-pixel group (PIXSA) jointly represented by the first and second light-transmitting windows. For the non-end light-blocking portion BM, it can serve as either the second light-blocking portion BMB of the first viewing angle definition structure VDSA on the first direction D1 side or the first light-blocking portion BMA of the first viewing angle definition structure VDSA on the second direction D2 side. For the non-end bottom light-shielding part BMx, it can serve as either the second bottom light-shielding part BMBx of the first viewing angle definition structure VDSA on the first direction D1 side, or the first bottom light-shielding part BMAx of the first viewing angle definition structure VDSA on the second direction D2 side.

[0228] For example, in Figure 20Along the second direction D2, the display panel includes a plurality of first sub-pixel groups PIXSA arranged sequentially, such as a red sub-pixel group PIXS-R, a green sub-pixel group PIXS-G, and a blue sub-pixel group PIXS-B arranged sequentially. Specifically, the red sub-pixel group PIXS-R includes a first red sub-pixel PIXA-R located on the first direction D1 side and a second red sub-pixel PIXB-R located on the second direction D2 side; the green sub-pixel group PIXS-G includes a first green sub-pixel PIXA-G located on the first direction D1 side and a second green sub-pixel PIXB-G located on the second direction D2 side; and the blue sub-pixel group PIXS-B includes a first blue sub-pixel PIXA-B located on the first direction D1 side and a second blue sub-pixel PIXB-B located on the second direction D2 side. The first black matrix layer BML1 includes a bottom light-blocking portion BMx and a first light-transmitting window arranged alternately along the second direction D2, with each first light-transmitting window corresponding to a sub-pixel group PIXS. For example, the first light-transmitting window includes a first light-transmitting window APx-R corresponding to the red sub-pixel group PIXS-R, a first light-transmitting window APx-G corresponding to the green sub-pixel group PIXS-G, and a first light-transmitting window APx-B corresponding to the blue sub-pixel group PIXS-B. The second black matrix layer BML2 includes a light-blocking portion BM and a second light-transmitting window alternately arranged along the second direction D2, with each second light-transmitting window corresponding to a sub-pixel group PIXS. For example, the second light-transmitting window includes a second light-transmitting window AP-R corresponding to the red sub-pixel group PIXS-R, a second light-transmitting window AP-G corresponding to the green sub-pixel group PIXS-G, and a second light-transmitting window AP-B corresponding to the blue sub-pixel group PIXS-B.

[0229] Among them, the bottom light-blocking part BMx on the first direction D1 side of the first light-transmitting window APx-R, the bottom light-blocking part BMx on the second direction D2 side of the first light-transmitting window APx-R, the light-blocking part BM on the first direction D1 side of the second light-transmitting window AP-R, and the light-blocking part BM on the second direction D2 side of the second light-transmitting window AP-R form a viewing angle definition structure VDS-R for a red sub-pixel group. The viewing angle definition structure VDS-R for the red sub-pixel group and the corresponding red sub-pixel group PIXS-R form a first light-emitting unit PVSA. The bottom light-blocking portion BMx on the first direction D1 side of the first light-transmitting window APx-G, the bottom light-blocking portion BMx on the second direction D2 side of the first light-transmitting window APx-G, the light-blocking portion BM on the first direction D1 side of the second light-transmitting window AP-G, and the light-blocking portion BM on the second direction D2 side of the second light-transmitting window AP-G together form a viewing angle definition structure VDS-G for a green sub-pixel group. This viewing angle definition structure VDS-G and the corresponding green sub-pixel group PIXS-G together form a first light-emitting unit PVSA. The bottom light-blocking portion BMx between the first light-transmitting window APx-R and the first light-transmitting window APx-G can serve as the second bottom light-blocking portion BMBx in the viewing angle definition structure VDS-R of the red sub-pixel group (in... Figure 20 The part marked as BMBx-R can also be used as the first bottom shading part BMAx in the VDS-G view definition structure of the green sub-pixel group. Figure 20 The light-blocking portion BM between the second light-transmitting window AP-R and the second light-transmitting window AP-G can serve as both the second light-blocking portion BMB in the VDS-R structure defining the viewpoint of the red sub-pixel group (in...). Figure 20 The part marked as BMB-R can also serve as the first light-shielding part (BMA) in the VDS-G view definition structure of the green sub-pixel group. Figure 20 (marked as BMA-G).

[0230] In an optional embodiment, the distance between the second black matrix layer BML2 and the pixel layer F200 is not less than the size of the first sub-pixel group PIXSA along the first direction D1. This avoids the spacing between the second black matrix layer BML2 and the pixel layer F200 being too small, better defining the light projection space VA of the first sub-pixel PIXA and the light projection space VB of the second sub-pixel PIXB, preventing the angle between boundary EA1 and the second direction D2 from being too large, and also preventing the angle between boundary EB2 and the first direction D1 from being too large, thus facilitating the separation of the light projection space VA of the first sub-pixel PIXA and the light projection space VB of the second sub-pixel PIXB.

[0231] In some embodiments of this disclosure, the viewing angle definition layer VDL includes a first black matrix layer BML1, a light-transmitting medium layer IJP, and a second black matrix layer BML2, which are sequentially stacked on the side of the pixel layer F200 away from the substrate BP; the viewing angle definition layer VDL has a viewing angle definition structure VDS that corresponds one-to-one with the sub-pixel group PIXS; the sub-pixel group PIXS and the corresponding viewing angle definition structure VDS form a light-emitting unit;

[0232] See Figure 21 The light-emitting unit includes a second light-emitting unit PVSB; the second light-emitting unit PVSB may include a second sub-pixel group PIXSB and a second viewing angle definition structure VDSB corresponding to the second sub-pixel group PIXSB. In the second light-emitting unit PVSB, the first sub-pixel PIXA is located on the third direction D3 side of the second sub-pixel PIXB; the third direction D3 is perpendicular to the first direction D1; the second viewing angle definition structure VDSB includes a first light-shielding part BMA and a first bottom light-shielding part BMAx corresponding to the first sub-pixel PIXA, and a second light-shielding part BMB and a second bottom light-shielding part BMBx corresponding to the second sub-pixel PIXB; wherein, the first bottom light-shielding part BMAx and the second bottom light-shielding part BMBx are located in the first black matrix layer BML1, and the first light-shielding part BMA and the second light-shielding part BMB are located in the second black matrix layer BML2; the orthographic projection of the first light-shielding part BMA on the substrate BP is at least partially located on the orthographic projection of the first sub-pixel PIXA on the substrate BP. The first light-shielding portion BMAx is projected onto the substrate BP in a first direction D1, and exposes at least a portion of the first sub-pixel PIXA; the second light-shielding portion BMB is projected onto the substrate BP in a second direction D2, and exposes at least a portion of the second sub-pixel PIXB; the second light-shielding portion BMBx is projected onto the substrate BP in a second direction D2, and exposes at least a portion of the second sub-pixel PIXB.

[0233] Thus, the first light-shielding portion BMA and the first bottom light-shielding portion BMAx are located above the first sub-pixel PIXA (away from the substrate BP) and biased towards the first direction D1, causing the light-emitting projection space VA of the first sub-pixel PIXA to face or primarily face the second direction D2. The second light-shielding portion BMB and the second bottom light-shielding portion BMBx are located above the second sub-pixel PIXB (away from the substrate BP) and biased towards the second direction D2, causing the light-emitting projection space VB of the second sub-pixel PIXB to face or primarily face the first direction D1. This achieves separation of the light-emitting projection space VA of the first sub-pixel PIXA and the light-emitting projection space VB of the second sub-pixel PIXB on the first direction D1 side and on the second direction D2 side of the display panel. The first black matrix layer BML1 is positioned adjacent to the pixel layer F200, which improves the privacy protection effect of the display panel in privacy mode and enhances the display effect of the display panel in privacy mode.

[0234] In an optional embodiment, the orthographic projection of the first bottom light-shielding portion BMAx onto the substrate BP does not exceed the orthographic projection of the first light-shielding portion BMA onto the substrate BP; the orthographic projection of the second bottom light-shielding portion BMBx onto the substrate BP does not exceed the orthographic projection of the second light-shielding portion BMB onto the substrate BP.

[0235] In this embodiment, the boundary EA1 of the light projection space VA of the first sub-pixel PIXA can be adjusted by adjusting the distance between the edge of the first light-shielding part BMA on the second direction D2 side and the edge of the first sub-pixel PIXA on the second direction D2 side, or by adjusting the distance between the edge of the first bottom light-shielding part BMAx on the second direction D2 side and the edge of the first sub-pixel PIXA on the second direction D2 side.

[0236] In an alternative embodiment, in at least a portion of the second light-emitting unit PVSB, the first sub-pixel PIXA and the first light-shielding portion BMA partially overlap; the size of the overlapping portion of the first sub-pixel PIXA and the first light-shielding portion BMA in the first direction D1 does not exceed half the size of the first sub-pixel PIXA in the first direction D1.

[0237] In an alternative embodiment, in at least a portion of the second light-emitting unit PVSB, the first sub-pixel PIXA and the first bottom light-shielding portion BMAx partially overlap; the size of the overlapping portion of the first sub-pixel PIXA and the first bottom light-shielding portion BMAx in the first direction D1 does not exceed half the size of the first sub-pixel PIXA in the first direction D1.

[0238] In this way, the first light-shielding part BMA and the first bottom light-shielding part BMAx can effectively define the boundary EA1 and avoid excessive occlusion of the first sub-pixel PIXA, thus achieving a balance between privacy protection and display brightness.

[0239] Furthermore, for any second light-emitting unit PVSB, the first sub-pixel PIXA and the first light-shielding portion BMA partially overlap; the first sub-pixel PIXA and the first bottom light-shielding portion BMAx partially overlap. The size of the overlapping portion of the first sub-pixel PIXA and the first light-shielding portion BMA in the first direction D1 does not exceed half the size of the first sub-pixel PIXA in the first direction D1. The size of the overlapping portion of the first sub-pixel PIXA and the first bottom light-shielding portion BMAx in the first direction D1 does not exceed half the size of the first sub-pixel PIXA in the first direction D1.

[0240] In one example, the orthographic projection of the edge of the first light-shielding portion BMA on the substrate BP on the second direction D2 side at least partially coincides with, for example, the orthographic projection of the edge of the first sub-pixel PIXA on the substrate BP on the first direction D1 side.

[0241] In one example, the orthographic projection of the edge of the first bottom light-shielding portion BMAx on the substrate BP on the second direction D2 side at least partially coincides with, for example, the orthographic projection of the edge of the first sub-pixel PIXA on the substrate BP on the first direction D1 side.

[0242] In one example, the orthographic projection of the geometric center of the first sub-pixel PIXA onto the substrate BP lies on the orthographic projection of the edge of the first light-shielding portion BMA on the second direction D2 side onto the substrate BP. In other words, the first sub-pixel PIXA is divided into a first portion on the first direction D1 side and a second portion on the second direction D2 side, with the boundary line between the first and second portions passing through the geometric center of the first sub-pixel PIXA. The first portion of the first sub-pixel PIXA is shielded by the first light-shielding portion BMA, while the second portion is exposed. In this example, the first light-shielding portion BMA has a larger size, which improves the directivity of the light projection space VA of the first sub-pixel PIXA, allowing for better separation of the light projection space VA of the first sub-pixel PIXA and the light projection space VB of the second sub-pixel PIXB on the first direction D1 side of the display panel, thus achieving better privacy protection on the first direction D1 side.

[0243] In one example, the orthographic projection of the geometric center of the first sub-pixel PIXA onto the substrate BP lies on the orthographic projection of the edge of the first bottom light-shielding portion BMAx on the second direction D2 side onto the substrate BP. In other words, the first part of the first sub-pixel PIXA is blocked by the first bottom light-shielding portion BMAx, while the second part of the first sub-pixel PIXA is exposed by the first bottom light-shielding portion BMAx. This facilitates better privacy protection on the first direction D1 side of the display panel.

[0244] In this embodiment, the boundary EB2 of the light projection space VB of the second sub-pixel PIXB can be adjusted by adjusting the distance between the edge of the second light-shielding part BMB on the first direction D1 side and the edge of the second sub-pixel PIXB on the first direction D1 side, or by adjusting the distance between the edge of the second bottom light-shielding part BMBx on the first direction D1 side and the edge of the second sub-pixel PIXB on the first direction D1 side.

[0245] In an alternative embodiment, in at least a portion of the second light-emitting unit PVSB, the second sub-pixel PIXB and the second light-shielding portion BMB partially overlap; the size of the overlapping portion of the second sub-pixel PIXB and the second light-shielding portion BMB in the first direction D1 does not exceed half the size of the second sub-pixel PIXB in the first direction D1.

[0246] In an alternative embodiment, in at least a portion of the second light-emitting unit PVBB, the second sub-pixel PIXB and the second bottom light-shielding portion BMBx partially overlap; the portion of the second sub-pixel PIXB overlapping with the second bottom light-shielding portion BMBx has a size in the first direction D1 that does not exceed half the size of the second sub-pixel PIXB in the first direction D1.

[0247] In this way, the second light-blocking part BMB and the second bottom light-blocking part BMBx can effectively define the boundary EB2 and avoid excessive occlusion of the second sub-pixel PIXB, thus achieving a balance between privacy protection and display brightness.

[0248] Furthermore, for any second light-emitting unit PVSB, the second sub-pixel PIXB and the second light-shielding portion BMB partially overlap; the second sub-pixel PIXB and the second bottom light-shielding portion BMBx partially overlap. The size of the overlapping portion of the second sub-pixel PIXB and the second light-shielding portion BMB in the first direction D1 does not exceed half the size of the second sub-pixel PIXB in the first direction D1. The size of the overlapping portion of the second sub-pixel PIXB and the second bottom light-shielding portion BMBx in the first direction D1 does not exceed half the size of the second sub-pixel PIXB in the first direction D1.

[0249] In one example, the orthographic projection of the edge of the second light-shielding portion BMB on the substrate BP on the first direction D1 side at least partially coincides with, for example, the orthographic projection of the edge of the second sub-pixel PIXB on the substrate BP on the second direction D2 side.

[0250] In one example, the orthographic projection of the edge of the second bottom light-shielding portion BMBx on the substrate BP on the first direction D1 side at least partially coincides with, for example, the orthographic projection of the edge of the second sub-pixel PIXB on the substrate BP on the second direction D2 side.

[0251] In one example, the orthographic projection of the geometric center of the second sub-pixel PIXB onto the substrate BP lies on the orthographic projection of the edge of the second light-shielding portion BMB on the first direction D1 side onto the substrate BP. In other words, the second sub-pixel PIXB is divided into a first part located on the second direction D2 side and a second part located on the first direction D1 side, with the boundary line between the first and second parts passing through the geometric center of the second sub-pixel PIXB. The first part of the second sub-pixel PIXB is shielded by the second light-shielding portion BMB, while the second part is exposed. In this example, the second light-shielding portion BMB has a larger size, which improves the directivity of the light projection space VB of the second sub-pixel PIXB, allowing for better separation of the light projection space VA of the first sub-pixel PIXA and the light projection space VB of the second sub-pixel PIXB on the second direction D2 side of the display panel, thus achieving better privacy protection on the second direction D2 side.

[0252] In one example, the orthographic projection of the geometric center of the second sub-pixel PIXB onto the substrate BP lies on the orthographic projection of the edge of the second bottom light-shielding portion BMBx on the first direction D1 side onto the substrate BP. In other words, the first part of the second sub-pixel PIXB is blocked by the second bottom light-shielding portion BMBx, while the second part of the second sub-pixel PIXB is exposed by the second bottom light-shielding portion BMBx. In this example, the second bottom light-shielding portion BMBx has a larger size, which can improve the directivity of the light projection space VB of the second sub-pixel PIXB, allowing for better separation of the light projection space VA of the first sub-pixel PIXA and the light projection space VB of the second sub-pixel PIXB on the second direction D2 side of the display panel, thus achieving better privacy protection on the second direction D2 side.

[0253] In an optional embodiment, the orthographic projection of the first light-shielding portion BMA onto the substrate BP coincides with the orthographic projection of the first bottom light-shielding portion BMAx onto the substrate BP. Similarly, the orthographic projection of the second light-shielding portion BMB onto the substrate BP coincides with the orthographic projection of the second bottom light-shielding portion BMBx onto the substrate BP. Thus, the mask used to fabricate the first black matrix layer BML1 can be applied to the fabrication process of the second black matrix layer BML2, reducing the number of masks required in the display panel fabrication process and consequently lowering the fabrication cost of the display panel. Of course, in other examples of this disclosure, the shape, size, or orthographic projection position of the first light-shielding portion BMA onto the substrate BP may not be entirely consistent with the first bottom light-shielding portion BMAx; similarly, the shape, size, or orthographic projection position of the second light-shielding portion BMB onto the substrate BP may not be entirely consistent with the second bottom light-shielding portion BMBx.

[0254] In an optional embodiment, the distance between the second black matrix layer BML2 and the pixel layer F200 is not less than the size of the sub-pixel group PIXS along the first direction D1. This avoids the spacing between the second black matrix layer BML2 and the pixel layer F200 being too small, better defining the light projection space VA of the first sub-pixel PIXA and the light projection space VB of the second sub-pixel PIXB, preventing the angle between boundary EA1 and the second direction D2 from being too large, and also preventing the angle between boundary EB2 and the first direction D1 from being too large, thus facilitating the separation of the light projection space VA of the first sub-pixel PIXA and the light projection space VB of the second sub-pixel PIXB.

[0255] The viewing angle definition layer (VDL) disclosed herein can also employ a black matrix + color filter misalignment strategy to limit the light projection space VA of the first sub-pixel PIXA and the light projection space VB of the second sub-pixel PIXB of the sub-pixel group PIXS.

[0256] In some embodiments of this disclosure, see Figure 22 The viewing angle definition layer VDL includes a first black matrix layer BML1, a light-transmitting medium layer IJP, and a second color filter layer CFLB, which are sequentially stacked on the side of the pixel layer F200 away from the substrate BP; the viewing angle definition layer VDL includes a viewing angle definition structure VDS corresponding to each of the sub-pixel groups PIXS; the sub-pixel groups PIXS and the corresponding viewing angle definition structures VDS form a light-emitting unit.

[0257] In this embodiment, the light-emitting unit includes a first light-emitting unit PVSA; the first light-emitting unit PVSA includes a first sub-pixel group PIXSA and a first viewing angle definition structure VDSA corresponding to the first sub-pixel group PIXSA. In the first light-emitting unit PVSA, the first sub-pixel PIXA is located on the first direction D1 side of the second sub-pixel PIXB; the first viewing angle definition structure VDSA includes a first color resist unit CFA corresponding to the first sub-pixel PIXA, a second color resist unit CFB corresponding to the second sub-pixel PIXB, and an auxiliary color resist unit CFx located between the first color resist unit CFA and the second color resist unit CFB, and a bottom light-blocking portion BMx located in the first black matrix layer BML1; wherein, the first color resist unit CFA, the second color resist unit CFB, and the auxiliary color resist unit CFx are located in the second color filter layer CFLB; the colors of the first color resist unit CFA and the second color resist unit CFB are the same as the emission color of the sub-pixel group PIXS, and the color of the auxiliary color resist unit CFx is different from the emission color of the sub-pixel group PIXS;

[0258] The orthographic projection of the first color resist unit CFA on the substrate BP is located on the side of the first direction D1 of the orthographic projection of the first sub-pixel PIXA on the substrate BP; the orthographic projection of the second color resist unit CFB on the substrate BP is located on the side of the second direction D2 of the orthographic projection of the second sub-pixel PIXB on the substrate BP; the orthographic projection of the bottom light-blocking portion BMx on the substrate BP at least covers the gap between the first sub-pixel PIXA and the second sub-pixel PIXB; wherein, the optical path between the second sub-pixel PIXB and the first color resist unit CFA is blocked by the bottom light-blocking portion BMx, and the optical path between the first sub-pixel PIXA and the second color resist unit CFB is blocked by the bottom light-blocking portion BMx.

[0259] In this embodiment, see Figure 22The portion of light emitted from the first sub-pixel PIXA that illuminates the second color resist unit CFB is blocked by the bottom light-blocking portion BMx. This prevents the light from the first sub-pixel PIXA from escaping from the second color resist unit CFB. The portion of light from the first sub-pixel PIXA that illuminates the auxiliary color resist unit CFx is absorbed by the auxiliary color resist unit CFx and emitted. Therefore, the light emitted from the first sub-pixel PIXA can only exit through the first color resist unit CFA. Consequently, the light projection space VA of the first sub-pixel PIXA faces the first direction D1 of the display panel. Similarly, the portion of light emitted from the second sub-pixel PIXB that illuminates the first color resist unit CFA is blocked by the bottom light-blocking portion BMx. This prevents the light from the second sub-pixel PIXB from escaping from the first color resist unit CFA. The portion of light from the second sub-pixel PIXB that illuminates the auxiliary color resist unit CFx is absorbed by the auxiliary color resist unit CFx and emitted. Therefore, the light emitted from the second sub-pixel PIXB can only exit through the second color resist unit CFB. Therefore, the light-emitting projection space VB of the second sub-pixel PIXB faces the second direction D2 side of the display panel. In this embodiment, by placing the first color resist unit CFA on the first direction D1 side of the first sub-pixel PIXA and the second color resist unit CFB on the second direction D2 side of the second sub-pixel PIXB, the light-emitting projection space VA of the first sub-pixel PIXA and the light-emitting projection space VB of the second sub-pixel PIXB of the first sub-pixel group PIXSA can be completely separated, thereby maximizing the privacy protection effect.

[0260] In an optional embodiment, in at least a portion of the first light-emitting unit PVSA, the bottom light-shielding portion BMx partially overlaps with the first sub-pixel PIXA; the overlapping portion of the first sub-pixel PIXA and the bottom light-shielding portion BMx has a size in the first direction D1 that does not exceed half the size of the first sub-pixel PIXA in the first direction D1. This avoids the bottom light-shielding portion BMx having too large a width (size in the first direction D1) and excessively obscuring the first sub-pixel PIXA, thereby preventing excessive obstruction of the optical path between the first sub-pixel PIXA and the first color resist unit CFA, which would lead to an excessive reduction in the display brightness of the first sub-pixel PIXA. Simultaneously, it avoids the bottom light-shielding portion BMx having too small a width, making it difficult to completely obscure the optical path between the first sub-pixel PIXA and the second color resist unit CFB.

[0261] In an optional embodiment, in at least a portion of the first light-emitting unit PVSA, the second sub-pixel PIXB and the bottom light-blocking portion BMx partially overlap; the overlapping portion of the second sub-pixel PIXB and the bottom light-blocking portion BMx has a dimension in the first direction D1 that does not exceed half the dimension of the second sub-pixel PIXB in the first direction D1. This avoids the bottom light-blocking portion BMx having a width (dimension in the first direction D1) that is too large, thus preventing excessive obstruction of the second sub-pixel PIXB and consequently preventing excessive reduction in the display brightness of the second sub-pixel PIXB due to excessive obstruction of the optical path between the second sub-pixel PIXB and the second color resist unit CFB. Simultaneously, it also avoids the bottom light-blocking portion BMx having a width that is too small, making it difficult to completely obstruct the optical path between the second sub-pixel PIXB and the first color resist unit CFA.

[0262] Furthermore, for any first light-emitting unit PVSA, the bottom light-shielding portion BMx partially overlaps with the first sub-pixel PIXA; the size of the overlapping portion of the first sub-pixel PIXA and the bottom light-shielding portion BMx in the first direction D1 does not exceed half the size of the first sub-pixel PIXA in the first direction D1. For any first light-emitting unit PVSA, the second sub-pixel PIXB partially overlaps with the bottom light-shielding portion BMx; the size of the overlapping portion of the second sub-pixel PIXB and the bottom light-shielding portion BMx in the first direction D1 does not exceed half the size of the second sub-pixel PIXB in the first direction D1.

[0263] In one example, in at least a portion of the first light-emitting unit PVSA, the orthographic projection of the edge of the first sub-pixel PIXA on the substrate BP on the second direction D2 side at least partially coincides with, for example, completely coincides with, the orthographic projection of the edge of the bottom light-shielding portion BMx on the substrate BP on the first direction D1 side.

[0264] In one example, in at least a portion of the first light-emitting unit PVSA, the orthographic projection of the edge of the second sub-pixel PIXB on the substrate BP on the first direction D1 side at least partially coincides with, for example, completely coincides with, the orthographic projection of the edge of the bottom light-shielding portion BMx on the substrate BP on the second direction D2 side.

[0265] In an alternative embodiment of this method, see [link to alternative implementation]. Figure 22In at least a portion of the first light-emitting unit PVSA, the number of auxiliary color resist units CFx is two. Each auxiliary color resist unit CFx includes a first auxiliary color resist unit CFx1 and a second auxiliary color resist unit CFx2. The first auxiliary color resist unit CFx1 is located on the first direction D1 side of the second auxiliary color resist unit CFx2. The color of the first auxiliary color resist unit CFx1 may be different from the color of the second auxiliary color resist unit CFx2.

[0266] In an alternative embodiment of this method, see [link to alternative implementation]. Figure 23 In at least a portion of the first light-emitting unit PVSA, the auxiliary color resist unit CFx includes a first auxiliary color resist unit CFx1 and a second auxiliary color resist unit CFx2, with the first auxiliary color resist unit CFx1 located on one side of the second auxiliary color resist unit CFx2 in a first direction D1. The first light-emitting unit PVSA also includes a light-shielding portion BM located between the first auxiliary color resist unit CFx1 and the second auxiliary color resist unit CFx2 and disposed on the second color filter layer CFLB. Thus, the light-shielding portion BM can precisely define the edges of the first auxiliary color resist unit CFx1 and the second auxiliary color resist unit CFx2. In one example, the orthogonal projection of the light-shielding portion BM onto the substrate BP is within the orthogonal projection range of the bottom light-shielding portion BMx onto the substrate BP, meaning the size of the light-shielding portion BM along the first direction D1 can be smaller than the size of the bottom light-shielding portion BMx. This allows the first auxiliary color resist unit CFx1 and the second auxiliary color resist unit CFx2 to have a larger width. Furthermore, the orthogonal projection of the light-shielding portion BM onto the substrate BP coincides with the orthogonal projection of the bottom light-shielding portion BMx onto the substrate BP.

[0267] In an alternative embodiment of this method, see [link to alternative implementation]. Figure 24 For two first light-emitting units PVSAs adjacent to each other along the first direction D1, the second auxiliary color resist unit CFx2 of the first light-emitting unit PVSA located on the first direction D1 side is multiplexed into the first color resist unit CFA of the first light-emitting unit PVSA located on the second direction D2 side, and the first auxiliary color resist unit CFx1 of the first light-emitting unit PVSA located on the second direction D2 side is multiplexed into the second color resist unit CFB of the first light-emitting unit PVSA located on the first direction D1 side.

[0268] For example, see Figure 24Along the second direction D2, the display panel includes a plurality of first sub-pixel groups PIXSA arranged sequentially, such as a red sub-pixel group PIXS-R, a green sub-pixel group PIXS-G, and a blue sub-pixel group PIXS-B arranged sequentially. Specifically, the red sub-pixel group PIXS-R includes a first red sub-pixel PIXA-R located on the first direction D1 side and a second red sub-pixel PIXB-R located on the second direction D2 side; the green sub-pixel group PIXS-G includes a first green sub-pixel PIXA-G located on the first direction D1 side and a second green sub-pixel PIXB-G located on the second direction D2 side; and the blue sub-pixel group PIXS-B includes a first blue sub-pixel PIXA-B located on the first direction D1 side and a second blue sub-pixel PIXB-B located on the second direction D2 side. The first black matrix layer BML1 includes a bottom light-blocking portion BMx and a light-transmitting window arranged alternately along the second direction D2, with the bottom light-blocking portion BMx corresponding one-to-one with each of the first sub-pixel groups PIXSA. The second color filter layer CFLB includes a plurality of color resist units CF arranged sequentially along the second direction D2. The color of any color resist unit CF is different from the color of the overlapping first sub-pixel group PIXSA, and the same as the color of the adjacent first sub-pixel group PIXSA. For example, the second color filter layer CFLB includes a red color resist unit CF-R, a blue color resist unit CF-B, and a green color resist unit CF-G arranged periodically along the second direction D2. Specifically, the color resist unit overlapping with the first red sub-pixel PIXA-R is a blue color resist unit CF-B; the color resist unit overlapping with the second red sub-pixel PIXB-R is a green color resist unit CF-G; the color resist unit overlapping with the first green sub-pixel PIXA-G is a red color resist unit CF-R; the color resist unit overlapping with the second green sub-pixel PIXB-G is a blue color resist unit CF-B; the color resist unit overlapping with the first blue sub-pixel PIXA-B is a green color resist unit CF-G; and the color resist unit overlapping with the second blue sub-pixel PIXB-B is a red color resist unit CF-R. (See also...) Figure 24 The second color resist unit CFB in the VDS-R structure defining the viewpoint of the red sub-pixel group. Figure 24 The color filter unit (CFx1) marked as CFB-R in the VDS-G view definition structure for the green subpixel group can be used as the first auxiliary color filter unit (CFx1). Figure 24 The middle part is marked as CFx1-G); the second auxiliary color resist unit CFx2 in the VDS-R view definition structure of the red subpixel group (marked as CFx1-G); Figure 24 The color filter unit (CFA) marked as CFx2-R can be used as the first color filter unit (CFA) in the VDS-G view definition structure of the green subpixel group. Figure 24 The middle label is CFA-G); the second auxiliary color resist unit CFx2 in the VDS-G view definition structure of the green subpixel group (marked as CFA-G); Figure 24The color filter element (CFA) marked as CFx2-G can be used as the first color filter unit (CFA) in the VDS-B view definition structure of the blue sub-pixel group. Figure 24 The middle label is CFA-B); the second color resist unit CFB in the VDS-G view definition structure of the green subpixel group (marked as CFA-B); Figure 24 The one marked as CFB-G can be used as the first auxiliary color resist unit CFx1 in the VDS-B view definition structure of the blue sub-pixel group. Figure 24 (marked as CFx1-B).

[0269] In an alternative embodiment of this method, see [link to alternative implementation]. Figure 23 In at least a portion of the first light-emitting units PVSA, the first auxiliary color resist unit CFx1, projected onto the substrate BP, covers the first sub-pixel PIXA; the second auxiliary color resist unit CFx2, projected onto the substrate BP, covers the second sub-pixel PIXB. This ensures that the first auxiliary color resist unit CFx1 and the second auxiliary color resist unit CFx2 have large areas. In this embodiment, although the first auxiliary color resist unit CFx1 is not used to emit light emitted from the covered sub-pixel group PIXS, it can be used to emit light emitted from adjacent sub-pixel groups PIXS. Therefore, the large area of ​​the first auxiliary color resist unit CFx1 ensures that the display panel has high display brightness. Similarly, the large area of ​​the second auxiliary color resist unit CFx2 ensures that the display panel has high display brightness.

[0270] In an optional embodiment, the distance between the second color filter layer CFLB and the pixel layer F200 is not less than the size of the sub-pixel group PIXS along the first direction D1. This better defines the orientation of the light-emitting projection space VA of the first sub-pixel PIXA and the light-emitting projection space VB of the second sub-pixel PIXB.

[0271] In some embodiments of this disclosure, the viewing angle definition layer VDL includes a first black matrix layer BML1, a light-transmitting medium layer IJP, and a second color filter layer CFLB, which are sequentially stacked on the side of the pixel layer F200 away from the substrate BP; the viewing angle definition layer VDL includes a viewing angle definition structure VDS corresponding to each of the sub-pixel groups PIXS; the sub-pixel groups PIXS and the corresponding viewing angle definition structures VDS form a light-emitting unit;

[0272] The light-emitting unit includes a second light-emitting unit PVSB; see [link / reference] Figure 25The second light-emitting unit PVSB includes a second sub-pixel group PIXSB and a second viewing angle definition structure VDSB corresponding to the second sub-pixel group PIXSB. In the second light-emitting unit PVSB, the first sub-pixel PIXA is located on the third direction D3 side of the second sub-pixel PIXB; the third direction D3 is perpendicular to the first direction D1; for the second light-emitting unit PVSB, the second viewing angle definition structure VDSB includes a first color resist unit CFA and a first bottom light-blocking part BMAx corresponding to the first sub-pixel PIXA, a second color resist unit CFB and a second bottom light-blocking part BMBx corresponding to the second sub-pixel PIXB, and an auxiliary color resist unit CFx located between the first color resist unit CFA and the second color resist unit CFB; wherein, the first color resist unit CFA, the second color resist unit CFB and the auxiliary color resist unit CFx are located in the second color filter layer CFLB; the colors of the first color resist unit CFA and the second color resist unit CFB are the same as the emission color of the sub-pixel group PIXS, and the color of the auxiliary color resist unit CFx is different from the emission color of the sub-pixel group PIXS; the first bottom light-blocking part BMAx and the second bottom light-blocking part BMBx are... Bx is located in the first black matrix layer BML1; the orthographic projection of the first color resist unit CFA on the substrate BP is located on the side of the first direction D1 of the orthographic projection of the first sub-pixel PIXA on the substrate BP; the orthographic projection of the second color resist unit CFB on the substrate BP is located on the side of the second direction D2 of the orthographic projection of the second sub-pixel PIXB on the substrate BP; the orthographic projection of the first bottom light-shielding portion BMAx on the substrate BP is at least partially located on the side of the second direction D2 of the orthographic projection of the first sub-pixel PIXA on the substrate BP; the orthographic projection of the second bottom light-shielding portion BMBx on the substrate BP is at least partially located on the side of the first direction D1 of the orthographic projection of the second sub-pixel PIXB on the substrate BP; the optical path between the second sub-pixel PIXB and the first color resist unit CFA is blocked by the second bottom light-shielding portion BMBx, and the optical path between the first sub-pixel PIXA and the second color resist unit CFB is blocked by the first bottom light-shielding portion BMAx.

[0273] In this embodiment, see Figure 25The portion of light emitted from the first sub-pixel PIXA that illuminates the second color resist unit CFB is blocked by the first bottom light-blocking portion BMAx. This prevents the light from the first sub-pixel PIXA from escaping from the second color resist unit CFB. The portion of light from the first sub-pixel PIXA that illuminates the auxiliary color resist unit CFx is absorbed by the auxiliary color resist unit CFx and emitted. Therefore, the light emitted from the first sub-pixel PIXA can only exit through the first color resist unit CFA. Consequently, the light projection space VA of the first sub-pixel PIXA faces the first direction D1 of the display panel. Similarly, the portion of light emitted from the second sub-pixel PIXB that illuminates the first color resist unit CFA is blocked by the second bottom light-blocking portion BMBx. This prevents the light from the second sub-pixel PIXB from escaping from the first color resist unit CFA. The portion of light from the second sub-pixel PIXB that illuminates the auxiliary color resist unit CFx is absorbed by the auxiliary color resist unit CFx and emitted. Therefore, the light emitted from the second sub-pixel PIXB can only exit through the second color resist unit CFB. Therefore, the light-emitting projection space VB of the second sub-pixel PIXB faces the second direction D2 side of the display panel. In this embodiment, by placing the first color resist unit CFA on the first direction D1 side of the first sub-pixel PIXA and the second color resist unit CFB on the second direction D2 side of the second sub-pixel PIXB, the light-emitting projection space VA of the first sub-pixel PIXA and the light-emitting projection space VB of the second sub-pixel PIXB of the first sub-pixel group PIXSA can be completely separated, thereby maximizing the privacy protection effect.

[0274] In an optional embodiment, in at least a portion of the second light-emitting unit PVB, the first bottom light-shielding portion BMAx partially overlaps with the first sub-pixel PIXA; the overlapping portion of the first sub-pixel PIXA and the first bottom light-shielding portion BMAx has a size in the first direction D1 that does not exceed half the size of the first sub-pixel PIXA in the first direction D1. This avoids the first bottom light-shielding portion BMAx having too large a width (size in the first direction D1) and excessively obscuring the first sub-pixel PIXA, thereby preventing excessive obstruction of the optical path between the first sub-pixel PIXA and the first color resist unit CFA, which would lead to an excessive reduction in the display brightness of the first sub-pixel PIXA. Simultaneously, it also avoids the first bottom light-shielding portion BMAx having too small a width, making it difficult to completely obscure the optical path between the first sub-pixel PIXA and the second color resist unit CFB.

[0275] In an optional embodiment, in at least a portion of the second light-emitting unit PVB, the second sub-pixel PIXB and the second bottom light-shielding portion BMBx partially overlap; the overlapping portion of the second sub-pixel PIXB and the second bottom light-shielding portion BMBx has a size in the first direction D1 that does not exceed half the size of the second sub-pixel PIXB in the first direction D1. This avoids the second bottom light-shielding portion BMBx having too large a width (size in the first direction D1) and excessively obscuring the second sub-pixel PIXB, thereby preventing excessive obstruction of the optical path between the second sub-pixel PIXB and the second color resist unit CFB, which would lead to an excessive reduction in the display brightness of the second sub-pixel PIXB. Simultaneously, it also avoids the second bottom light-shielding portion BMBx having too small a width, making it difficult to completely obscure the optical path between the second sub-pixel PIXB and the first color resist unit CFA.

[0276] In an optional embodiment, the distance between the second color filter layer CFLB and the pixel layer F200 is not less than the size of the sub-pixel group PIXS along the first direction D1. This better defines the orientation of the light-emitting projection space VA of the first sub-pixel PIXA and the light-emitting projection space VB of the second sub-pixel PIXB.

[0277] In the embodiments described above, three different strategies—a black matrix + color filter strategy, a multi-layer black matrix strategy, and a black matrix + color filter misalignment strategy—are used as examples to introduce the structure, principle, and application of the viewing angle definition layer (VDL). It is understood that, in order to at least partially separate the light projection space VA of the first sub-pixel PIXA and the light projection space VB of the second sub-pixel PIXB, the viewing angle definition layer (VDL) can also employ other strategies and corresponding structures, which will not be detailed in this disclosure.

[0278] In the embodiments described above, the implementation method and principle of the first viewing angle definition structure VDSA corresponding to the first sub-pixel group PIXSA and the second viewing angle definition structure VDSB corresponding to the second sub-pixel group PIXSB are also exemplarily introduced. It is understood that the first viewing angle definition structure VDSA corresponding to the first sub-pixel group PIXSA can also employ other structures to achieve at least partial separation of the light emission projection space VA of the first sub-pixel PIXA and the light emission projection space VB of the second sub-pixel PIXB, and the second viewing angle definition structure VDSB corresponding to the second sub-pixel group PIXSB can also employ other structures to achieve at least partial separation of the light emission projection space VA of the first sub-pixel PIXA and the light emission projection space VB of the second sub-pixel PIXB. It is understood that when the display panel also has other types of sub-pixel groups PIXS, a corresponding viewing angle definition structure can also be set based on the principles of the embodiments of this disclosure.

[0279] In the fabrication of the display panel provided in this embodiment, a display backplane can be fabricated first, and then a viewing angle defining layer can be fabricated on the light-emitting side of the display backplane. It is understood that when a functional film layer exists between the display backplane and the viewing angle defining layer, the functional film layer can be fabricated first on the light-emitting side of the display backplane, and then the viewing angle defining layer can be fabricated on the light-emitting side of the functional film layer.

[0280] For example, Figures 26-29 The fabrication process of a display panel according to an embodiment of this disclosure is illustrated. The display panel includes a display backplane, a touch functional layer (TSL, functional film layer), and a viewing angle definition layer (VDL) stacked sequentially. The viewing angle definition layer (VDL) includes a light-transmitting dielectric layer (IJP) and a first color filter layer (CFLA) stacked sequentially.

[0281] See Figure 26 The display backplane can be fabricated first. This display backplane may include a substrate BP, a driving layer F100, a pixel layer F200, and an encapsulation layer TFE, stacked sequentially. See also Figure 27 Then, a touch functional layer (TSL) is fabricated on the light-emitting side of the display backplane. Specifically, the touch functional layer (TSL) is fabricated on the side of the encapsulation layer (TFE) away from the substrate (BP). Optionally, the touch functional layer (TSL) may include a buffer layer (which may be omitted in other examples), a first metal layer, a touch dielectric layer, a second metal layer, and an organic protective layer (which may be omitted in other examples) sequentially stacked on the side of the encapsulation layer (TFE) away from the substrate (BP). It is understood that when the display panel (PNL) does not have a touch functional layer (TSL), this step of fabricating the touch functional layer (TSL) can be omitted. See also Figure 28 A light-transmitting dielectric layer IJP is fabricated on the side of the touch functional layer TSL away from the substrate BP. The desired thickness of the light-transmitting dielectric layer IJP can be fabricated using printing technology. See [link to documentation]. Figure 29 A first color filter layer CFLA is prepared on the side of the light-transmitting medium layer IJP away from the substrate BP. The first color filter layer CFLA includes a light-shielding part BM and a color resist unit CF.

[0282] In the example of the above-described display panel fabrication method, the display panel PNL includes a touch function layer TSL and a viewing angle definition layer VDL includes a light-transmitting dielectric layer IJP and a first color filter layer CFLA stacked together. It is understood that when the display panel PNL does not include the touch function layer TSL, or when the structure of the viewing angle definition layer VDL is of another type, the fabrication method of the display panel PNL can be adapted accordingly.

[0283] It should be noted that although the steps of the driving method in this disclosure are described in a specific order in the accompanying drawings, this does not require or imply that the steps must be performed in that specific order, or that all the steps shown must be performed to achieve the desired result. Additional or alternative steps may be omitted, multiple steps may be combined into one step, and / or a step may be broken down into multiple steps.

[0284] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the appended claims.

Claims

1. A display panel, comprising a substrate, a driving layer, a pixel layer, and a viewing angle definition layer sequentially stacked; wherein, The pixel layer includes sub-pixel groups arranged in an array, and any one of the sub-pixel groups includes an adjacent first sub-pixel and a second sub-pixel of the same color. The view definition layer enables the light projection space of the first sub-pixel to overlap with the light projection space of the second sub-pixel at most. The viewing angle definition layer includes a light-transmitting medium layer and a first color filter layer, which are sequentially stacked on the side of the pixel layer away from the substrate; the first color filter layer includes viewing angle definition structures corresponding one-to-one with the sub-pixel groups; the sub-pixel groups and the corresponding viewing angle definition structures form a light-emitting unit; The light-emitting unit includes a first light-emitting unit; in the first light-emitting unit, the first sub-pixel is located on one side of the second sub-pixel in a first direction; the viewing angle definition structure includes a first light-shielding part corresponding to the first sub-pixel, a second light-shielding part corresponding to the second sub-pixel, and a color resist unit located between the first light-shielding part and the second light-shielding part; the color of the color resist unit is the same as the emission color of the sub-pixel group; wherein, the orthographic projection of the first light-shielding part on the substrate is at least partially located on one side of the first direction of the orthographic projection of the first sub-pixel on the substrate, and exposes at least a portion of the first sub-pixel; wherein, the orthographic projection of the second light-shielding part on the substrate is at least partially located on one side of the second direction of the orthographic projection of the second sub-pixel on the substrate, and exposes at least a portion of the second sub-pixel; the first direction and the second direction are opposite; In at least a portion of the light-emitting unit, the first sub-pixel and the first light-shielding portion partially overlap; the size of the overlapping portion of the first sub-pixel and the first light-shielding portion in the first direction does not exceed half the size of the first sub-pixel in the first direction; And / or, in at least a portion of the light-emitting unit, the second sub-pixel and the second light-shielding portion partially overlap; the size of the overlapping portion of the second sub-pixel and the second light-shielding portion in the first direction does not exceed half the size of the second sub-pixel in the first direction.

2. The display panel according to claim 1, wherein, For two first light-emitting units that are adjacent along the first direction, the second light-shielding part of the first light-emitting unit located on one side of the first direction is reused as the first light-shielding part of the first light-emitting unit located on one side of the second direction.

3. The display panel according to any one of claims 1 to 2, wherein, The distance between the first color filter layer and the pixel layer is not less than the size of the sub-pixel group along the first direction.

4. The display panel according to any one of claims 1 to 2, wherein, The viewpoint definition layer also includes a first black matrix layer located between the pixel layer and the light-transmitting medium layer; The viewpoint definition structure further includes a first bottom light-shielding part and a second bottom light-shielding part located in the first black matrix layer; the orthographic projection of the first bottom light-shielding part on the substrate does not exceed the orthographic projection of the first light-shielding part on the substrate. The orthographic projection of the second bottom light-shielding part on the substrate does not exceed the orthographic projection of the second light-shielding part on the substrate.

5. The display panel according to claim 1, wherein, The driving layer has a pixel driving circuit group that corresponds one-to-one with the sub-pixel group. The pixel driving circuit group includes a first pixel driving circuit for driving the first sub-pixel and a second pixel driving circuit for driving the second sub-pixel. The first pixel driving circuit and the second pixel driving circuit share some transistors.

6. The display panel according to claim 5, wherein, The pixel driving circuit group includes: The pixel driver module is used to provide drive current; The first light emission control module is used to respond to the first light emission control signal to cause the driving current to flow to the first sub-pixel; The second light emission control module is used to respond to the second light emission control signal so that the driving current flows to the second sub-pixel.

7. The display panel according to claim 6, wherein, The pixel driving circuit group further includes: The first reset module is used to reset the voltage on the pixel electrode of the first sub-pixel in response to the first electrode reset signal; The second reset module is used to reset the voltage on the pixel electrode of the second sub-pixel in response to the second electrode reset signal.

8. The display panel according to claim 6, wherein, One of the first light-emitting control module and the second light-emitting control module is an N-type transistor and the other is a P-type transistor; the gate of the N-type transistor and the gate of the P-type transistor are connected to the same light-emitting control signal line.

9. The display panel according to claim 1, wherein, The pixel layer includes a pixel electrode layer, a pixel definition layer, a light-emitting function layer, and a common electrode layer stacked in sequence. The pixel electrode layer is provided with a pixel electrode for the first sub-pixel and a pixel electrode for the second sub-pixel; The pixel definition layer has a first sub-pixel opening that exposes at least a portion of the pixel electrode of the first sub-pixel and a second sub-pixel opening that exposes at least a portion of the pixel electrode of the second sub-pixel; The light-emitting functional layer has a light-emitting functional unit group corresponding to the sub-pixel group. The light-emitting functional unit group covers the first sub-pixel opening, the second sub-pixel opening, and the area between the first sub-pixel opening and the second sub-pixel opening.

10. A display panel, comprising a substrate, a driving layer, a pixel layer, and a viewing angle definition layer sequentially stacked; wherein, The pixel layer includes sub-pixel groups arranged in an array, and any one of the sub-pixel groups includes an adjacent first sub-pixel and a second sub-pixel of the same color. The view definition layer enables the light projection space of the first sub-pixel to overlap with the light projection space of the second sub-pixel at most. The viewing angle definition layer includes a light-transmitting medium layer and a first color filter layer, which are sequentially stacked on the side of the pixel layer away from the substrate; the first color filter layer includes viewing angle definition structures corresponding one-to-one with the sub-pixel groups; the sub-pixel groups and the corresponding viewing angle definition structures form a light-emitting unit; The light-emitting unit includes a second light-emitting unit; in the second light-emitting unit, the first sub-pixel is located on a third direction side of the second sub-pixel; the viewing angle definition structure includes a first light-shielding part and a first color resist unit corresponding to the first sub-pixel, and a second light-shielding part and a second color resist unit corresponding to the second sub-pixel; the colors of the first color resist unit and the second color resist unit are the same as the emission color of the sub-pixel group; wherein, the orthographic projection of the first light-shielding part on the substrate is at least partially located on a first direction side of the orthographic projection of the first sub-pixel on the substrate, and exposes at least a portion of the first sub-pixel; ...; the orthographic projection of the first light-shielding part on the substrate is at least partially located on a third direction side of the first sub-pixel. The projection of the second light-shielding unit on the substrate is at least partially located on one side of the second direction of the orthogonal projection of the first sub-pixel on the substrate, and extends along the first direction to connect with the first light-shielding portion; wherein, the orthogonal projection of the second light-shielding portion on the substrate is at least partially located on one side of the second direction of the orthogonal projection of the second sub-pixel on the substrate, and exposes at least a portion of the second sub-pixel; the orthogonal projection of the second color resist unit on the substrate is at least partially located on one side of the first direction of the orthogonal projection of the second sub-pixel on the substrate, and extends along the second direction to connect with the second light-shielding portion; the first direction and the second direction are opposite and perpendicular to the third direction; In at least a portion of the light-emitting unit, the first sub-pixel and the first light-shielding portion partially overlap; the size of the overlapping portion of the first sub-pixel and the first light-shielding portion in the first direction does not exceed half the size of the first sub-pixel in the first direction; And / or, in at least a portion of the light-emitting unit, the second sub-pixel and the second light-shielding portion partially overlap; the size of the overlapping portion of the second sub-pixel and the second light-shielding portion in the first direction does not exceed half the size of the second sub-pixel in the first direction.

11. The display panel according to claim 10, wherein, The distance between the first color filter layer and the pixel layer is not less than the size of the sub-pixel group along the first direction.

12. The display panel according to claim 10, wherein, The viewpoint definition layer also includes a first black matrix layer located between the pixel layer and the light-transmitting medium layer; The viewpoint definition structure further includes a first bottom light-shielding part and a second bottom light-shielding part located in the first black matrix layer; the orthographic projection of the first bottom light-shielding part on the substrate does not exceed the orthographic projection of the first light-shielding part on the substrate. The orthographic projection of the second bottom light-shielding part on the substrate does not exceed the orthographic projection of the second light-shielding part on the substrate.

13. The display panel according to claim 10, wherein, The driving layer has a pixel driving circuit group that corresponds one-to-one with the sub-pixel group. The pixel driving circuit group includes a first pixel driving circuit for driving the first sub-pixel and a second pixel driving circuit for driving the second sub-pixel. The first pixel driving circuit and the second pixel driving circuit share some transistors.

14. The display panel according to claim 13, wherein, The pixel driving circuit group includes: The pixel driver module is used to provide drive current; The first light emission control module is used to respond to the first light emission control signal to cause the driving current to flow to the first sub-pixel; The second light emission control module is used to respond to the second light emission control signal so that the driving current flows to the second sub-pixel.

15. The display panel according to claim 14, wherein, The pixel driving circuit group further includes: The first reset module is used to reset the voltage on the pixel electrode of the first sub-pixel in response to the first electrode reset signal; The second reset module is used to reset the voltage on the pixel electrode of the second sub-pixel in response to the second electrode reset signal.

16. The display panel according to claim 14, wherein, One of the first light-emitting control module and the second light-emitting control module is an N-type transistor and the other is a P-type transistor; the gate of the N-type transistor and the gate of the P-type transistor are connected to the same light-emitting control signal line.

17. The display panel according to claim 10, wherein, The pixel layer includes a pixel electrode layer, a pixel definition layer, a light-emitting function layer, and a common electrode layer stacked in sequence. The pixel electrode layer is provided with a pixel electrode for the first sub-pixel and a pixel electrode for the second sub-pixel; The pixel definition layer has a first sub-pixel opening that exposes at least a portion of the pixel electrode of the first sub-pixel and a second sub-pixel opening that exposes at least a portion of the pixel electrode of the second sub-pixel; The light-emitting functional layer has a light-emitting functional unit group corresponding to the sub-pixel group. The light-emitting functional unit group covers the first sub-pixel opening, the second sub-pixel opening, and the area between the first sub-pixel opening and the second sub-pixel opening.

18. A display panel, comprising a substrate, a driving layer, a pixel layer, and a viewing angle definition layer sequentially stacked; wherein, The pixel layer includes sub-pixel groups arranged in an array, and any one of the sub-pixel groups includes an adjacent first sub-pixel and a second sub-pixel of the same color. The view definition layer enables the light projection space of the first sub-pixel to overlap with the light projection space of the second sub-pixel at most. The viewing angle definition layer includes a first black matrix layer, a light-transmitting medium layer, and a second black matrix layer, which are sequentially stacked on the side of the pixel layer away from the substrate. The viewing angle definition layer has a viewing angle definition structure that corresponds one-to-one with the sub-pixel group. The sub-pixel group and the corresponding viewing angle definition structure form a light-emitting unit. The light-emitting unit includes a first light-emitting unit; in the first light-emitting unit, the first sub-pixel is located on one side of the second sub-pixel in a first direction; the viewing angle definition structure includes a first light-shielding part and a first bottom light-shielding part corresponding to the first sub-pixel, and a second light-shielding part and a second bottom light-shielding part corresponding to the second sub-pixel; wherein, the first bottom light-shielding part and the second bottom light-shielding part are located in the first black matrix layer, and the first light-shielding part and the second light-shielding part are located in the second black matrix layer; the orthographic projection of the first light-shielding part on the substrate is at least partially located on one side of the first direction of the orthographic projection of the first sub-pixel on the substrate, and exposes at least part of the... First sub-pixel; the orthographic projection of the first bottom light-shielding portion on the substrate is at least partially located on one side of the first direction of the orthographic projection of the first sub-pixel on the substrate, and exposes at least a portion of the first sub-pixel; the orthographic projection of the second light-shielding portion on the substrate is at least partially located on one side of the second direction of the orthographic projection of the second sub-pixel on the substrate, and exposes at least a portion of the second sub-pixel; the orthographic projection of the second bottom light-shielding portion on the substrate is at least partially located on one side of the second direction of the orthographic projection of the second sub-pixel on the substrate, and exposes at least a portion of the second sub-pixel; the first direction and the second direction are opposite; In at least a portion of the light-emitting unit, the first sub-pixel and the first bottom light-shielding portion partially overlap; the size of the portion of the first sub-pixel overlapping with the first bottom light-shielding portion in the first direction does not exceed half the size of the first sub-pixel in the first direction; the first sub-pixel and the first light-shielding portion partially overlap; the size of the portion of the first sub-pixel overlapping with the first light-shielding portion in the first direction does not exceed half the size of the first sub-pixel in the first direction; And / or, in at least a portion of the light-emitting unit, the second sub-pixel and the second bottom light-shielding portion partially overlap; the size of the portion of the second sub-pixel overlapping with the second bottom light-shielding portion in the first direction does not exceed half the size of the second sub-pixel in the first direction; the second sub-pixel and the second light-shielding portion partially overlap; the size of the portion of the second sub-pixel overlapping with the second light-shielding portion in the first direction does not exceed half the size of the second sub-pixel in the first direction.

19. The display panel according to claim 18, wherein, For two adjacent first light-emitting units along the first direction, the second light-shielding part of the first light-emitting unit located on one side of the first direction is reused as the first light-shielding part of the first light-emitting unit located on one side of the second direction, and the second bottom light-shielding part of the first light-emitting unit located on one side of the first direction is reused as the first bottom light-shielding part of the first light-emitting unit located on one side of the second direction.

20. The display panel according to claim 18, wherein, The distance between the second black matrix layer and the pixel layer is not less than the size of the sub-pixel group along the first direction.

21. The display panel according to claim 18, wherein, The driving layer has a pixel driving circuit group that corresponds one-to-one with the sub-pixel group. The pixel driving circuit group includes a first pixel driving circuit for driving the first sub-pixel and a second pixel driving circuit for driving the second sub-pixel. The first pixel driving circuit and the second pixel driving circuit share some transistors.

22. The display panel according to claim 21, wherein, The pixel driving circuit group includes: The pixel driver module is used to provide drive current; The first light emission control module is used to respond to the first light emission control signal to cause the driving current to flow to the first sub-pixel; The second light emission control module is used to respond to the second light emission control signal so that the driving current flows to the second sub-pixel.

23. The display panel according to claim 22, wherein, The pixel driving circuit group further includes: The first reset module is used to reset the voltage on the pixel electrode of the first sub-pixel in response to the first electrode reset signal; The second reset module is used to reset the voltage on the pixel electrode of the second sub-pixel in response to the second electrode reset signal.

24. The display panel according to claim 22, wherein, One of the first light-emitting control module and the second light-emitting control module is an N-type transistor and the other is a P-type transistor; the gate of the N-type transistor and the gate of the P-type transistor are connected to the same light-emitting control signal line.

25. The display panel according to claim 18, wherein, The pixel layer includes a pixel electrode layer, a pixel definition layer, a light-emitting function layer, and a common electrode layer stacked in sequence. The pixel electrode layer is provided with a pixel electrode for the first sub-pixel and a pixel electrode for the second sub-pixel; The pixel definition layer has a first sub-pixel opening that exposes at least a portion of the pixel electrode of the first sub-pixel and a second sub-pixel opening that exposes at least a portion of the pixel electrode of the second sub-pixel; The light-emitting functional layer has a light-emitting functional unit group corresponding to the sub-pixel group. The light-emitting functional unit group covers the first sub-pixel opening, the second sub-pixel opening, and the area between the first sub-pixel opening and the second sub-pixel opening.

26. A display panel, comprising a substrate, a driving layer, a pixel layer, and a viewing angle definition layer sequentially stacked; wherein, The pixel layer includes sub-pixel groups arranged in an array, and any one of the sub-pixel groups includes an adjacent first sub-pixel and a second sub-pixel of the same color. The view definition layer enables the light projection space of the first sub-pixel to overlap with the light projection space of the second sub-pixel at most. The viewing angle definition layer includes a first black matrix layer, a light-transmitting medium layer, and a second black matrix layer, which are sequentially stacked on the side of the pixel layer away from the substrate. The viewing angle definition layer has a viewing angle definition structure that corresponds one-to-one with the sub-pixel group. The sub-pixel group and the corresponding viewing angle definition structure form a light-emitting unit. The light-emitting unit includes a second light-emitting unit; in the second light-emitting unit, the first sub-pixel is located on a third direction side of the second sub-pixel; the viewing angle definition structure includes a first light-shielding part and a first bottom light-shielding part corresponding to the first sub-pixel, and a second light-shielding part and a second bottom light-shielding part corresponding to the second sub-pixel; wherein, the first bottom light-shielding part and the second bottom light-shielding part are located in the first black matrix layer, and the first light-shielding part and the second light-shielding part are located in the second black matrix layer; the orthographic projection of the first light-shielding part on the substrate is at least partially located on a first direction side of the orthographic projection of the first sub-pixel on the substrate, and exposes at least a portion of the first sub-pixel; The orthographic projection of the first bottom light-shielding portion on the substrate is at least partially located on one side of the first direction of the orthographic projection of the first sub-pixel on the substrate, and exposes at least a portion of the first sub-pixel; the orthographic projection of the second light-shielding portion on the substrate is at least partially located on one side of the second direction of the orthographic projection of the second sub-pixel on the substrate, and exposes at least a portion of the second sub-pixel; the first direction and the second direction are opposite and perpendicular to the third direction; In at least a portion of the light-emitting unit, the first sub-pixel and the first bottom light-shielding portion partially overlap; the size of the portion of the first sub-pixel overlapping with the first bottom light-shielding portion in the first direction does not exceed half the size of the first sub-pixel in the first direction; the first sub-pixel and the first light-shielding portion partially overlap; the size of the portion of the first sub-pixel overlapping with the first light-shielding portion in the first direction does not exceed half the size of the first sub-pixel in the first direction; And / or, in at least a portion of the light-emitting unit, the second sub-pixel and the second bottom light-shielding portion partially overlap; the size of the portion of the second sub-pixel overlapping with the second bottom light-shielding portion in the first direction does not exceed half the size of the second sub-pixel in the first direction; the second sub-pixel and the second light-shielding portion partially overlap; the size of the portion of the second sub-pixel overlapping with the second light-shielding portion in the first direction does not exceed half the size of the second sub-pixel in the first direction.

27. The display panel according to claim 26, wherein, The distance between the second black matrix layer and the pixel layer is not less than the size of the sub-pixel group along the first direction.

28. The display panel according to claim 26, wherein, The driving layer has a pixel driving circuit group that corresponds one-to-one with the sub-pixel group. The pixel driving circuit group includes a first pixel driving circuit for driving the first sub-pixel and a second pixel driving circuit for driving the second sub-pixel. The first pixel driving circuit and the second pixel driving circuit share some transistors.

29. The display panel according to claim 28, wherein, The pixel driving circuit group includes: The pixel driver module is used to provide drive current; The first light emission control module is used to respond to the first light emission control signal to cause the driving current to flow to the first sub-pixel; The second light emission control module is used to respond to the second light emission control signal so that the driving current flows to the second sub-pixel.

30. The display panel according to claim 29, wherein, The pixel driving circuit group further includes: The first reset module is used to reset the voltage on the pixel electrode of the first sub-pixel in response to the first electrode reset signal; The second reset module is used to reset the voltage on the pixel electrode of the second sub-pixel in response to the second electrode reset signal.

31. The display panel according to claim 29, wherein, One of the first light-emitting control module and the second light-emitting control module is an N-type transistor and the other is a P-type transistor; the gate of the N-type transistor and the gate of the P-type transistor are connected to the same light-emitting control signal line.

32. The display panel according to claim 26, wherein, The pixel layer includes a pixel electrode layer, a pixel definition layer, a light-emitting function layer, and a common electrode layer stacked in sequence. The pixel electrode layer is provided with a pixel electrode for the first sub-pixel and a pixel electrode for the second sub-pixel; The pixel definition layer has a first sub-pixel opening that exposes at least a portion of the pixel electrode of the first sub-pixel and a second sub-pixel opening that exposes at least a portion of the pixel electrode of the second sub-pixel; The light-emitting functional layer has a light-emitting functional unit group corresponding to the sub-pixel group. The light-emitting functional unit group covers the first sub-pixel opening, the second sub-pixel opening, and the area between the first sub-pixel opening and the second sub-pixel opening.

33. A display panel, comprising a substrate, a driving layer, a pixel layer, and a viewing angle definition layer sequentially stacked; wherein, The pixel layer includes sub-pixel groups arranged in an array, and any one of the sub-pixel groups includes an adjacent first sub-pixel and a second sub-pixel of the same color. The view definition layer enables the light projection space of the first sub-pixel to overlap with the light projection space of the second sub-pixel at most. The viewing angle definition layer includes a first black matrix layer, a light-transmitting medium layer, and a second color filter layer, which are sequentially stacked on the side of the pixel layer away from the substrate. The viewing angle definition layer includes a viewing angle definition structure that corresponds one-to-one with each sub-pixel group. The sub-pixel group and the corresponding viewing angle definition structure form a light-emitting unit. The light-emitting unit includes a first light-emitting unit; in the first light-emitting unit, the first sub-pixel is located on one side of the second sub-pixel in a first direction; the viewing angle definition structure includes a first color resist unit corresponding to the first sub-pixel, a second color resist unit corresponding to the second sub-pixel, an auxiliary color resist unit located between the first color resist unit and the second color resist unit, and a bottom light-blocking part located in the first black matrix layer. The first color resist unit, the second color resist unit, and the auxiliary color resist unit are located in the second color filter layer; the colors of the first color resist unit and the second color resist unit are the same as the emission color of the sub-pixel group, and the color of the auxiliary color resist unit is different from the emission color of the sub-pixel group. The orthographic projection of the first color resist unit on the substrate is located on one side of the first direction of the orthographic projection of the first sub-pixel on the substrate; the orthographic projection of the second color resist unit on the substrate is located on one side of the second direction of the orthographic projection of the second sub-pixel on the substrate; the orthographic projection of the bottom light-blocking portion on the substrate at least covers the orthographic projection of the gap between the first sub-pixel and the second sub-pixel on the substrate; wherein, the optical path between the second sub-pixel and the first color resist unit is blocked by the bottom light-blocking portion, and the optical path between the first sub-pixel and the second color resist unit is blocked by the bottom light-blocking portion; the first direction and the second direction are opposite; In at least a portion of the first light-emitting unit, the bottom light-shielding portion overlaps with a portion of the first sub-pixel; the size of the portion of the first sub-pixel overlapping with the bottom light-shielding portion in the first direction does not exceed half the size of the first sub-pixel in the first direction; And / or, in at least a portion of the first light-emitting unit, the second sub-pixel and the bottom light-shielding portion partially overlap; the size of the portion of the second sub-pixel overlapping the bottom light-shielding portion in the first direction does not exceed half the size of the second sub-pixel in the first direction.

34. The display panel according to claim 33, wherein, The auxiliary color resist unit includes a first auxiliary color resist unit and a second auxiliary color resist unit, wherein the first auxiliary color resist unit is located on one side of the second auxiliary color resist unit in a first direction. For two adjacent first light-emitting units along the first direction, the second auxiliary color resist unit of the first light-emitting unit located on one side of the first direction is multiplexed as the first color resist unit of the first light-emitting unit located on one side of the second direction, and the first auxiliary color resist unit of the first light-emitting unit located on one side of the second direction is multiplexed as the second color resist unit of the first light-emitting unit located on one side of the first direction.

35. The display panel according to claim 33, wherein, In at least a portion of the first light-emitting unit, the auxiliary color resist unit includes a first auxiliary color resist unit and a second auxiliary color resist unit, wherein the first auxiliary color resist unit is located on one side of the second auxiliary color resist unit in a first direction; the orthographic projection of the first auxiliary color resist unit on the substrate covers the orthographic projection of the first sub-pixel on the substrate; and the orthographic projection of the second auxiliary color resist unit on the substrate covers the orthographic projection of the second sub-pixel on the substrate.

36. The display panel according to claim 33, wherein, In at least a portion of the first light-emitting unit, the auxiliary color resist unit includes a first auxiliary color resist unit and a second auxiliary color resist unit, wherein the first auxiliary color resist unit is located on one side of the second auxiliary color resist unit in a first direction; the first light-emitting unit further includes a light-shielding portion located between the first auxiliary color resist unit and the second auxiliary color resist unit and disposed on the second color filter layer.

37. The display panel according to any one of claims 33 to 36, wherein, The distance between the second color filter layer and the pixel layer is not less than the size of the sub-pixel group along the first direction.

38. The display panel according to claim 33, wherein, The driving layer has a pixel driving circuit group that corresponds one-to-one with the sub-pixel group. The pixel driving circuit group includes a first pixel driving circuit for driving the first sub-pixel and a second pixel driving circuit for driving the second sub-pixel. The first pixel driving circuit and the second pixel driving circuit share some transistors.

39. The display panel according to claim 38, wherein, The pixel driving circuit group includes: The pixel driver module is used to provide drive current; The first light emission control module is used to respond to the first light emission control signal to cause the driving current to flow to the first sub-pixel; The second light emission control module is used to respond to the second light emission control signal so that the driving current flows to the second sub-pixel.

40. The display panel according to claim 39, wherein, The pixel driving circuit group further includes: The first reset module is used to reset the voltage on the pixel electrode of the first sub-pixel in response to the first electrode reset signal; The second reset module is used to reset the voltage on the pixel electrode of the second sub-pixel in response to the second electrode reset signal.

41. The display panel according to claim 39, wherein, One of the first light-emitting control module and the second light-emitting control module is an N-type transistor and the other is a P-type transistor; the gate of the N-type transistor and the gate of the P-type transistor are connected to the same light-emitting control signal line.

42. The display panel according to claim 33, wherein, The pixel layer includes a pixel electrode layer, a pixel definition layer, a light-emitting function layer, and a common electrode layer stacked in sequence. The pixel electrode layer is provided with a pixel electrode for the first sub-pixel and a pixel electrode for the second sub-pixel; The pixel definition layer has a first sub-pixel opening that exposes at least a portion of the pixel electrode of the first sub-pixel and a second sub-pixel opening that exposes at least a portion of the pixel electrode of the second sub-pixel; The light-emitting functional layer has a light-emitting functional unit group corresponding to the sub-pixel group. The light-emitting functional unit group covers the first sub-pixel opening, the second sub-pixel opening, and the area between the first sub-pixel opening and the second sub-pixel opening.

43. A display panel, comprising a substrate, a driving layer, a pixel layer, and a viewing angle definition layer sequentially stacked; wherein, The pixel layer includes sub-pixel groups arranged in an array, and any one of the sub-pixel groups includes an adjacent first sub-pixel and a second sub-pixel of the same color. The view definition layer enables the light projection space of the first sub-pixel to overlap with the light projection space of the second sub-pixel at most. The viewing angle definition layer includes a first black matrix layer, a light-transmitting medium layer, and a second color filter layer, which are sequentially stacked on the side of the pixel layer away from the substrate. The viewing angle definition layer includes a viewing angle definition structure that corresponds one-to-one with each sub-pixel group. The sub-pixel group and the corresponding viewing angle definition structure form a light-emitting unit. The light-emitting unit includes a second light-emitting unit; in the second light-emitting unit, the first sub-pixel is located on a third-direction side of the second sub-pixel; the viewing angle definition structure includes a first color resist unit and a first bottom light-shielding part corresponding to the first sub-pixel, a second color resist unit and a second bottom light-shielding part corresponding to the second sub-pixel, and an auxiliary color resist unit located between the first color resist unit and the second color resist unit; wherein, the first color resist unit, the second color resist unit, and the auxiliary color resist unit are located in the second color filter layer; the colors of the first color resist unit and the second color resist unit are the same as the emission color of the sub-pixel group, and the color of the auxiliary color resist unit is different from the emission color of the sub-pixel group; the first bottom light-shielding part and the second bottom light-shielding part are located in the first black matrix layer; the first color resist unit is located on the substrate. The orthographic projection of the first sub-pixel on the substrate is located on one side of the first direction of the orthographic projection of the first sub-pixel on the substrate; the orthographic projection of the second color resist unit on the substrate is located on one side of the second direction of the orthographic projection of the second sub-pixel on the substrate; the orthographic projection of the first bottom light-blocking portion on the substrate is at least partially located on one side of the second direction of the orthographic projection of the first sub-pixel on the substrate; the orthographic projection of the second bottom light-blocking portion on the substrate is at least partially located on one side of the first direction of the orthographic projection of the second sub-pixel on the substrate; the optical path between the second sub-pixel and the first color resist unit is blocked by the second bottom light-blocking portion, and the optical path between the first sub-pixel and the second color resist unit is blocked by the first bottom light-blocking portion; the first direction and the second direction are opposite and perpendicular to the third direction; In at least a portion of the second light-emitting unit, the first bottom light-shielding portion overlaps with the first sub-pixel portion; the size of the overlapping portion of the first sub-pixel and the first bottom light-shielding portion in the first direction does not exceed half the size of the first sub-pixel in the first direction; And / or, in at least a portion of the second light-emitting unit, the second sub-pixel and the second bottom light-shielding portion partially overlap; the portion of the second sub-pixel overlapping with the second bottom light-shielding portion has a size in the first direction that does not exceed half the size of the second sub-pixel in the first direction.

44. The display panel according to claim 43, wherein, The distance between the second color filter layer and the pixel layer is not less than the size of the sub-pixel group along the first direction.

45. The display panel according to claim 43, wherein, The driving layer has a pixel driving circuit group that corresponds one-to-one with the sub-pixel group. The pixel driving circuit group includes a first pixel driving circuit for driving the first sub-pixel and a second pixel driving circuit for driving the second sub-pixel. The first pixel driving circuit and the second pixel driving circuit share some transistors.

46. ​​The display panel according to claim 45, wherein, The pixel driving circuit group includes: The pixel driver module is used to provide drive current; The first light emission control module is used to respond to the first light emission control signal to cause the driving current to flow to the first sub-pixel; The second light emission control module is used to respond to the second light emission control signal so that the driving current flows to the second sub-pixel.

47. The display panel according to claim 46, wherein, The pixel driving circuit group further includes: The first reset module is used to reset the voltage on the pixel electrode of the first sub-pixel in response to the first electrode reset signal; The second reset module is used to reset the voltage on the pixel electrode of the second sub-pixel in response to the second electrode reset signal.

48. The display panel according to claim 46, wherein, One of the first light-emitting control module and the second light-emitting control module is an N-type transistor and the other is a P-type transistor; the gate of the N-type transistor and the gate of the P-type transistor are connected to the same light-emitting control signal line.

49. The display panel according to claim 43, wherein, The pixel layer includes a pixel electrode layer, a pixel definition layer, a light-emitting function layer, and a common electrode layer stacked in sequence. The pixel electrode layer is provided with a pixel electrode for the first sub-pixel and a pixel electrode for the second sub-pixel; The pixel definition layer has a first sub-pixel opening that exposes at least a portion of the pixel electrode of the first sub-pixel and a second sub-pixel opening that exposes at least a portion of the pixel electrode of the second sub-pixel; The light-emitting functional layer has a light-emitting functional unit group corresponding to the sub-pixel group. The light-emitting functional unit group covers the first sub-pixel opening, the second sub-pixel opening, and the area between the first sub-pixel opening and the second sub-pixel opening.

50. A display device comprising the display panel as described in any one of claims 1 to 49.

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