An audio back-coupling device

By using an equalizer and a sample rate converter in the hardware circuit for audio re-sampling, the difficulties in timeline alignment and CPU burden caused by software re-sampling are solved, achieving stable synchronization of audio data and system simplification.

CN116389974BActive Publication Date: 2026-06-12合肥智能语音创新发展有限公司

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
合肥智能语音创新发展有限公司
Filing Date
2023-03-23
Publication Date
2026-06-12

AI Technical Summary

Technical Problem

In cost-reducing software echo sampling scenarios, timeline alignment of audio information is difficult, affecting echo cancellation performance and increasing the software processing burden on the chip.

Method used

Audio re-sampling is achieved through hardware circuitry, and equalizers and sampling rate converters are used to adjust the frequency band gain and sample rate of the audio signal, ensuring stable and synchronized audio data latency and reducing CPU resource consumption.

🎯Benefits of technology

It improves the audio re-sampling effect, reduces system complexity and CPU load, and ensures stable audio data output and sampling alignment.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses an audio back-sampling device. The device comprises a peripheral bus, a first register, a sampling rate converter, a second register and an equalizer. The first register and the sampling rate converter are connected in series. The input end of the sampling rate converter is used for being coupled with an external sound pickup device. The output end of the first register is electrically connected with the input end of the peripheral bus. The second register and the equalizer are connected in series. The output end of the equalizer is electrically coupled with the input end of the sampling rate converter. The output end of the equalizer is also used for being coupled with an external loudspeaker device. The input end of the second register is electrically connected with the output end of the peripheral bus. The above scheme can reduce the system complexity and improve the effect of audio back-sampling.
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Description

Technical Field

[0001] This application relates to the field of audio processing devices, and in particular to an audio acquisition device. Background Technology

[0002] With the continued rapid development of AIoT (Artificial Intelligence of Things) and the intelligent voice industry, voice wake-up and recognition interaction are becoming increasingly mature, and a large number of home appliances, mobile phones, and toys are being endowed with voice interaction and control capabilities. Similarly, in online office and online meeting scenarios, there is also a large demand for intelligent audio processing for voice communication calls.

[0003] In current scenarios such as conference calls and intelligent voice interaction, it is necessary to capture the audio played by the device and then send it to algorithms for echo cancellation to ensure that the device's playback does not interfere with the intelligibility of voice interaction and call information. However, in scenarios where cost-saving software echo sampling is used, the timeline of the audio information processed by the software sampling algorithm is not well aligned, resulting in time jitter that affects the echo cancellation effect and also increases the software processing burden on the chip. In view of this, how to improve the effect of audio software echo sampling has become an urgent problem to be solved. Summary of the Invention

[0004] The main technical problem addressed by this application is to provide an audio re-acquisition device that reduces system complexity and improves audio re-acquisition performance by mitigating issues such as CPU resource consumption and data alignment caused by software re-acquisition.

[0005] To address the aforementioned technical problems, the first aspect of this application provides an audio re-entry device, comprising: a peripheral bus, a first register, a sampling rate converter, a second register, and an equalizer; the peripheral bus; the first register and the sampling rate converter are serially connected, the input terminal of the sampling rate converter being coupled to an external pickup device, and the output terminal of the first register being electrically connected to the input terminal of the peripheral bus; the second register and the equalizer are serially connected, the output terminal of the equalizer being electrically coupled to the input terminal of the sampling rate converter, and the output terminal of the equalizer also being coupled to an external speaker device, and the input terminal of the second register being electrically connected to the output terminal of the peripheral bus.

[0006] The aforementioned device is electrically connected to the input of the second register via the output of the peripheral bus. The second register is serially connected to the equalizer. The audio signal to be processed is transmitted to the equalizer via the peripheral bus, where the equalizer adjusts the gain values ​​of each frequency band of the audio signal. The output of the equalizer is electrically coupled to the input of an external speaker and a sampling rate converter. The external speaker can receive and play the equalized audio signal to improve the playback effect. After receiving the equalized audio signal, the sampling rate converter performs a sampling rate conversion on the audio signal to make the sampling specifications of the audio signal to be processed conform to the sampling specifications of the audio signal in the recording link required by subsequent algorithms or services. The sampling rate converter is then serially connected to the first register. The first register is electrically connected to the input of the external bus to complete the audio re-sampling of the audio signal to be processed. At the same time, the output of the sampling rate converter is also coupled to the external pickup device to process the audio signal acquired by the external pickup device into the sampling specifications of the audio signal of the recording link that meets the requirements of the subsequent algorithm or business. The equalizer and sampling rate converter in the above audio re-sampling circuit directly realize the loopback and downsampling of audio data through hardware circuit, so that the audio data obtained by register re-sampling is delayed, always synchronized and strictly aligned, reducing the CPU load and cost when re-sampling audio data through software methods, thus reducing system complexity and improving the effect of audio re-sampling. Attached Figure Description

[0007] Figure 1 This is a schematic diagram of the framework of an embodiment of the audio re-acquisition device of this application;

[0008] Figure 2 This is a schematic diagram of another embodiment of the audio re-acquisition device of this application;

[0009] Figure 3 This is a schematic diagram of the framework of another embodiment of the audio re-acquisition device of this application. Detailed Implementation

[0010] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0011] In this paper, the terms "system" and "network" are often used interchangeably. The term "and / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone. Additionally, the character " / " generally indicates that the preceding and following related objects have an "or" relationship. Furthermore, "many" in this paper means two or more.

[0012] Please see Figure 1 , Figure 1 This is a schematic diagram of the framework of an embodiment of the audio re-entry device 10 of this application. Specifically, it may include: a peripheral bus 11, a first register 21, a sampling rate converter 30, a second register 22, and an equalizer 40. The first register 21 and the sampling rate converter 30 are connected in series. The input terminal of the sampling rate converter 30 is used to couple with an external pickup device 51, and the output terminal of the first register 21 is electrically connected to the input terminal of the peripheral bus 11. The second register 22 and the equalizer 40 are connected in series. The output terminal of the equalizer 40 is electrically coupled to the input terminal of the sampling rate converter 30, and the output terminal of the equalizer 40 is also used to couple with an external speaker device 52. The input terminal of the second register 22 is electrically connected to the output terminal of the peripheral bus 11.

[0013] In one implementation scenario, the equalizer 40 can be used to adjust the gain value of audio signals in various frequency bands. By adjusting electrical signals of different frequencies, it can compensate for the defects of audio signals, compensate and modify various audio signals, and perform other special functions. The output terminal of the peripheral bus 11 is electrically connected to the input terminal of the second register 22. The second register 22 is serially connected to the equalizer 40. The audio signal to be processed is transmitted to the equalizer 40 via the peripheral bus 11, and the equalizer 40 adjusts the gain value of each frequency band of the audio signal to be processed. The output terminal of the equalizer 40 is electrically coupled to the external speaker device 52. The external speaker can receive and play the audio signal adjusted by the equalizer to improve the audio playback effect.

[0014] In one implementation scenario, the sampling rate converter 30 is a device widely used in the field of digital signal processing to convert digital signals from one sampling rate to another. In this application, the sampling rate converter 30 can perform sampling and difference smoothing of audio data. By setting different sampling rates, it can flexibly configure and achieve output at different sampling rates.

[0015] In one implementation scenario, the output of the peripheral bus 11 is electrically connected to the input of the second register 22. The second register 22 is serially connected to the equalizer 40. The audio signal to be processed is transmitted to the equalizer 40 via the peripheral bus 11. The equalizer 40 adjusts the gain values ​​of each frequency band of the audio signal to be processed. The output of the equalizer 40 is electrically coupled to the input of the sampling rate converter 30. After receiving the audio signal adjusted by the equalizer, the sampling rate converter 30 converts the sampling rate of the audio signal to make the sampling specifications of the audio signal to be processed conform to the sampling specifications of the audio signal of the recording link required by the subsequent algorithm or business. For example, the playback audio requires a 48KHz sampling rate, while the audio of the recording link required by the algorithm or business is a 16KHz sampling rate. In this case, the sampling rate converter 30 is needed to convert the sampling rate to ensure that the audio data received by the first register 21 does not need further processing. The sampling rate converter 30 is serially connected to the first register 21, and the output of the first register 21 is electrically connected to the input of the peripheral bus 11 to complete the audio retrieval of the audio signal to be processed. Through the above-mentioned device, the equalizer 40 and the sampling rate converter 30 in the audio back-sampling circuit directly realize the loopback and downsampling of audio data through hardware circuitry, so that the audio data obtained by register back-sampling is stable in delay, always synchronized and strictly aligned. This reduces the CPU load when back-sampling audio data through software methods, improves the stability of the audio back-sampling device 10, and can achieve stable data output and sampling alignment. Therefore, it can reduce system complexity and improve the effect of audio back-sampling.

[0016] Please see Figure 2 , Figure 2 This is a schematic diagram of another embodiment of this application. (See diagram below.) Figure 2As shown, in one implementation scenario, the equalizer 40 includes a first-stage equalizer 410 and a second-stage equalizer 420 connected in series. The input of the first-stage equalizer 410 is electrically connected to the output of the second register 22, the output of the first-stage equalizer 410 is electrically connected to the input of the second-stage equalizer 420, and the output of the second-stage equalizer 420 is electrically connected to the input of the sampling rate converter 30. At this time, the first-stage equalizer 410 is used to adjust audio effects, the second-stage equalizer 420 is used for low-pass filtering, and the output of the first-stage equalizer 410 is also used to couple with an external speaker device 52. The audio information processed by the first-stage equalizer 410 is transmitted to the external speaker, which can improve the quality of the played audio. However, the audio information at this time does not meet the sampling signal requirements of the sampling rate converter 30, so it needs to be processed again by the second-stage equalizer 420 to perform low-pass filtering on the audio signal so that the processed signal meets the sampling signal requirements of the sampling rate converter 30. The first-stage equalizer 410 and the second-stage equalizer 420 together constitute the equalizer 40 required in the audio back-sampling device 10 of this application. This can improve the processing capability of the equalizer 40 and meet the functional requirements of the current scenario in different implementation scenarios, reduce the need for external circuits, and ensure that the audio information played by the external speaker 52 and the audio information obtained by internal audio back-sampling maintain stable delay, clock synchronization and strict alignment. Therefore, it can improve the flexibility of the audio back-sampling device 10 and improve the audio back-sampling effect.

[0017] In a specific implementation scenario, the first-stage equalizer 410 includes a first number of cascaded bisecond-order filters (not shown). Each bisecond-order filter in the first-stage equalizer 410 has its filter parameters individually configured to meet the audio quality adjustment function of the first-stage equalizer 410. A bisecond-order filter is a filter consisting of two poles and two zeros, and can serve as a basic building block. The range of values ​​for the first number can be adjusted according to user needs. For example, eight cascaded bisecond-order filters can be used to construct the first-stage equalizer 410, with each bisecond-order filter set to pass-through mode to reduce latency. The filter parameters for each bisecond-order filter can be configured individually to enable the first-stage equalizer 410 to adjust audio information.

[0018] In a specific implementation scenario, the second-stage equalizer 420 includes a second number of cascaded bisecond-order filters. Each bisecond-order filter in the second-stage equalizer 420 has its filter parameters individually configured to fulfill the low-pass filtering function of the second-stage equalizer 420. The range of the first number can be adjusted according to user needs. For example, four cascaded bisecond-order filters can form the first-stage equalizer 410, with each bisecond-order filter set to direct-pass mode to reduce latency. The filter parameters of each bisecond-order filter can be configured separately to enable the first-stage equalizer 410 to perform low-pass filtering.

[0019] It should be noted that the first number of dual second-order filters required to constitute the first-stage equalizer in this application is not limited, and the second number of dual second-order filters required to constitute the second-stage equalizer in this application is not limited.

[0020] In one implementation scenario, the output of the sampling rate converter 30 is also coupled to an external microphone 51. This allows the sampling rate converter 30 to process the audio signal acquired by the external microphone 51 into a sampling specification that meets the requirements of subsequent algorithms or business operations for the recording signal in the recording link. For example, it receives audio signals from the external microphone 51.

[0021] The audio information in register 51 requires a 48kHz sampling rate, while the audio in the recording link required by the algorithm or business needs a 16kHz sampling rate. In this case, a sampling rate converter 30 is needed to convert the sampling rate, ensuring that the audio data received by the first register 21 does not require further processing. Through this device, the required functions can be met in different implementation scenarios, reducing the need for external circuitry. It also ensures that the audio information played by the external speaker 52 and the audio information obtained from internal audio backtracking maintain stable delay, clock synchronization, and strict alignment. Therefore, it improves the flexibility of the audio backtracking device 10 and enhances the audio backtracking effect.

[0022] In one implementation scenario, the audio re-acquisition device 10 can use a FIFO (First Input First Output) memory as the first register 21 and the second register 22. A FIFO is a register array and is a first-in, first-out dual-port buffer, meaning the first data to enter is the first to be removed. FIFO memories are widely used to increase data transfer rates, process large data streams, and match systems with different transfer rates, thus improving system performance. The FIFO memory is divided into a dedicated write area and a dedicated read area. The dedicated read area can serve as the first register 21 in the audio re-acquisition device 10, and the dedicated write area can serve as the second register 22. Read and write operations can be performed asynchronously. Data written in the write area is read from the read area in the order it was written, similar to a buffer absorbing the speed difference between the write and read ends. This buffers the continuous data stream, preventing data loss during input and storage operations. Data is centralized for stacking and storage, avoiding frequent bus operations, reducing the CPU load, allowing the system to perform DMA operations, and improving data transfer speed.

[0023] It should be noted that the types and specific circuit structures of the sampling rate converter 30, equalizer 40, first register 21 and second register 22 in the audio re-sampling device 10 in this application are not limited.

[0024] Please continue reading. Figure 2 In one implementation scenario, the audio re-sampling device 10 provided in this application also includes a selector 14. The output of the selector 14 is electrically connected to the input of the sampling rate converter 30, and the input of the selector 14 is electrically connected to the output of the equalizer 40 and coupled to an external microphone 51. By configuring the selector 14, the source of the audio signal input to the sampling rate converter 30 can be selected. For example, when multiple external microphones 51 are connected to the audio re-sampling circuit, only one or a few audio signals need to be sampled back, which can be achieved by configuring the selector 14. By adding a selector 14 to the front end of the sampling rate converter 30 for selecting the audio signal source, the functionality of the audio re-sampling device 10 can be expanded. The configuration is flexible and highly reliable, reducing external requirements and thus improving the performance of the audio re-sampling device 10.

[0025] In a specific implementation scenario, the audio re-acquisition device 10 provided in this application also includes an external analog-to-digital converter 141. The output terminal of the external analog-to-digital converter 141 is electrically connected to the input terminal of the selector 14, and the input terminal of the external analog-to-digital converter 141 is coupled to the external microphone 51. In this case, the selector 14 is used to select whether to connect the external analog-to-digital converter 141 or the equalizer 40 module to the sampling rate conversion module. When the audio signal acquired by the external microphone 51 has not been converted from an analog signal to a digital signal, the acquired analog signal is sent to the external analog-to-digital converter 141 to be converted into a digital signal that can be used for data re-acquisition, and the selector 14 selects the signal source input to the sampling rate converter 30. With the above device, when connecting the external microphone 51, there is no need to consider adding related devices or software algorithms for analog-to-digital conversion. The configuration is flexible and highly reliable, reducing external requirements and thus improving the performance of the audio re-acquisition device 10.

[0026] Please see Figure 3 , Figure 3 This is a schematic diagram of another embodiment of the audio re-encoding device 10 of this application. Figure 3 As shown, in one implementation scenario, the audio sampling device 10 also includes an audio bus 12. The audio bus 12 is dedicated to data transmission between audio devices. It adopts a design that transmits clock and data signals along independent wires. By separating the data and clock signals, distortion induced by time difference is avoided. The output of the equalizer 40 is electrically connected to the input of the audio bus 12, and the input of the sampling rate converter 30 is electrically connected to the output of the audio bus 12. The data terminal of the audio bus 12 is used to be electrically connected to the external speaker 52 and coupled to the external pickup device 51, respectively. The audio bus 12 can be used to transmit the audio information obtained from the equalizer 40 to the external speaker 52, or to transmit the audio information obtained from the external pickup device 51 to the sampling rate converter 30 for processing via the audio bus 12. The above-mentioned device facilitates the expansion of the functions of the audio re-acquisition device 10, provides flexible and reliable configuration, reduces external requirements, and ensures that the audio information played by the external speaker device 52 and the audio information obtained by internal audio re-acquisition maintain stable delay, clock synchronization and strict alignment. Therefore, it can improve the flexibility of the audio re-acquisition device 10 and enhance the effect of audio re-acquisition.

[0027] In one implementation scenario, the audio re-sampling device 10 also includes a digital-to-analog converter 13, and the output of the equalizer 40 is electrically connected to the input of the digital-to-analog converter 13. Through this device, the equalizer 40 adjusts the gain values ​​of each frequency band of the audio signal to be processed. The output of the equalizer 40 is electrically connected to the digital-to-analog converter 13 to improve the audio playback effect. When connecting an external speaker device 52, there is no need to consider adding additional components or software algorithms for digital-to-analog conversion. The configuration is flexible and highly reliable, reducing external requirements and thus improving the performance of the audio re-sampling device 10.

[0028] In one implementation scenario, the audio signal to be processed is a two-channel signal. The audio signal transmitted by the peripheral bus 11 is also a two-channel signal. Two-channel means having two sound channels. The principle is that when people hear a sound, they can determine the specific location of the sound source based on the phase difference between the left and right ears. In the circuit, they often transmit different electrical signals. The first register 21 includes a first left channel register (not shown) and a first right channel register (not shown) configured in parallel. The sampling rate converter 30 includes a left channel converter (not shown) and a right channel converter (not shown) configured in parallel. The left channel register is connected serially to the left channel converter, and the right channel register is connected serially to the right channel converter. The left channel register is used to output the left channel signal, and the right channel register is used to output the right channel signal. Through the above device, the two-channel register and two-channel converter process the two-channel audio signal, thus improving the performance of the audio re-sampling device 10.

[0029] In a specific implementation scenario, corresponding to the dual-channel register and the dual-channel converter, the second register 22 includes a second left channel register (not shown) and a second right channel register (not shown) arranged in parallel. The equalizer 40 includes a left channel equalizer 40 (not shown) and a right channel equalizer 40 (not shown) arranged in parallel. The second left channel register is serially connected to the left channel equalizer 40, and the second right channel register is serially connected to the right channel equalizer 40. The output of the left channel equalizer 40 is coupled to the left channel converter, and the output of the right channel equalizer 40 is coupled to the right channel converter. The second left channel register is used to obtain the left channel signal from the external bus 11, and the second right channel register is used to obtain the right channel signal from the external bus 11, thus improving the performance of the audio re-encoding device 10.

[0030] The aforementioned device is electrically connected to the output of the peripheral bus 11 and the input of the second register 22. The second register 22 is serially connected to the equalizer 40. The audio signal to be processed is transmitted to the equalizer 40 via the peripheral bus 11, and the equalizer 40 adjusts the signal gain values ​​of each frequency band of the audio signal to be processed. The output of the equalizer 40 is electrically coupled to the external speaker device 52 and the input of the sampling rate converter 30. The external speaker can receive and play the audio signal adjusted by the equalizer to improve the audio playback effect. After receiving the audio signal adjusted by the equalizer, the sampling rate converter 30 converts the sampling rate of the audio signal to make the sampling specifications of the audio signal to be processed conform to the sampling specifications of the audio signal of the recording link required by subsequent algorithms or services. The sampling rate converter 30 is then connected to the first register 40. The register 21 is serially connected, and the output of the first register 21 is electrically connected to the input of the peripheral bus 11 to complete the audio back-sampling of the audio signal to be processed. At the same time, the output of the sampling rate converter 30 is also coupled to the external pickup device 51, which is used to process the audio signal acquired by the external pickup device 51 into the sampling specifications of the audio signal of the recording link that meets the requirements of the subsequent algorithm or business. The equalizer 40 and the sampling rate converter 30 in the above audio back-sampling circuit directly realize the loopback and downsampling of the audio data through hardware circuit, so that the audio data back-sampling through the register is stable in delay, always synchronized and strictly aligned, reducing the CPU load and cost when back-sampling audio data through software methods, thus reducing system complexity and improving the effect of audio back-sampling.

[0031] In the several embodiments provided in this application, it should be understood that the disclosed methods and apparatus can be implemented in other ways. For example, the apparatus implementations described above are merely illustrative. For instance, the division of circuits or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection of devices or units may be electrical, mechanical, or other forms.

[0032] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment, depending on actual needs.

[0033] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0034] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) or processor to execute all or part of the steps of the methods of various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

Claims

1. An audio acquisition device, characterized in that, include: Peripheral bus; A first register and a sampling rate converter are connected in series, wherein the input of the sampling rate converter is used to couple with an external pickup device, and the output of the first register is electrically connected to the input of the peripheral bus; A second register and an equalizer are serially connected. The output of the equalizer is electrically coupled to the input of the sample rate converter. The output of the equalizer is also used to couple to an external speaker. The input of the second register is electrically connected to the output of the peripheral bus. The equalizer includes a first-stage equalizer and a second-stage equalizer serially connected. The input of the first-stage equalizer is electrically connected to the output of the second register. The output of the first-stage equalizer is electrically connected to the input of the second-stage equalizer. The output of the second-stage equalizer is electrically connected to the input of the sample rate converter. The output of the first-stage equalizer is also used to couple to the external speaker. The first-stage equalizer is used to adjust audio effects, and the second-stage equalizer is used for low-pass filtering.

2. The audio acquisition device according to claim 1, characterized in that, The first-stage equalizer includes a first number of cascaded second-order filters; In the first stage equalizer, each of the two second-order filters is configured with filter parameters individually.

3. The audio acquisition device according to claim 1, characterized in that, The second-stage equalizer includes a second number of cascaded bi-second-order filters; In the second-stage equalizer, the filter parameters of each of the two second-order filters are configured individually.

4. The audio acquisition device according to claim 1, characterized in that, The audio sampling device also includes an audio bus, the output of the equalizer is specifically electrically connected to the input of the audio bus, the input of the sampling rate converter is specifically electrically connected to the output of the audio bus, and the data terminal of the audio bus is used to be electrically connected to the external speaker and coupled to the external pickup device respectively.

5. The audio acquisition device according to claim 1, characterized in that, The audio re-sampling device also includes a digital-to-analog converter, and the output of the equalizer is specifically electrically connected to the input of the digital-to-analog converter.

6. The audio acquisition device according to claim 1, characterized in that, The audio re-sampling device also includes a selector, the output of which is electrically connected to the input of the sampling rate converter, the input of which is electrically connected to the output of the equalizer, and coupled to the external pickup device.

7. The audio acquisition device according to claim 6, characterized in that, The device further includes an external analog-to-digital converter, the output of which is electrically connected to the input of the selector, and the input of which is coupled to the external pickup device; wherein the selector is used to select whether to connect the external analog-to-digital converter or the equalizer to the sampling rate converter.

8. The audio acquisition device according to claim 1, characterized in that, The audio signal transmitted by the peripheral bus is a two-channel signal. The first register includes a first left channel register and a first right channel register arranged in parallel. The sampling rate converter includes a left channel converter and a right channel converter arranged in parallel. The left channel register is serially connected to the left channel converter, and the right channel register is serially connected to the right channel converter. The left channel register is used to output the left channel signal, and the right channel register is used to output the right channel signal.

9. The audio acquisition device according to claim 8, characterized in that, The second register includes a second left channel register and a second right channel register arranged in parallel. The equalizer includes a left channel equalizer and a right channel equalizer arranged in parallel. The second left channel register is connected in series with the left channel equalizer, and the second right channel register is connected in series with the right channel equalizer. The output of the left channel equalizer is coupled to the left channel converter, and the output of the right channel equalizer is coupled to the right channel converter. The second left channel register is used to obtain the left channel signal from the peripheral bus, and the second right channel register is used to obtain the right channel signal from the peripheral bus.