Liquid crystal display device and display driving method thereof

Abstract

The application discloses a liquid crystal display device and a display driving method thereof. The liquid crystal display device comprises a liquid crystal display panel, a plurality of arrayed pixel structures arranged in the display area, a plurality of memory modules corresponding to the pixel structures, a control circuit arranged in the non-display area, and the like. In the display driving process of the current frame, the control circuit obtains the identification information of the pixel structure in the previous frame from the memory module, performs overdrive compensation on the initial data signal of the pixel structure in the current frame based on the identification information and the initial data signal, and controls the pixel structure to display images based on the data signal after the overdrive compensation. The identification information can represent the data signal of the pixel structure after the overdrive compensation in the related frame. The overdrive display control can be realized, and the width of the frame area can be reduced.

Description

Technical Field

[0001] This application relates to the field of image display technology, and more specifically, to a liquid crystal display device and its display driving method. Background Technology

[0002] Liquid crystal displays (LCDs) are one of the mainstream display panels currently available. Unlike organic light-emitting diode (OLED) displays, which are self-emissive, LCDs are passively illuminated displays that rely on backlighting provided by a backlight module to display images. When displaying images, LCDs use data signals from the pixel structure to control the rotation of liquid crystal molecules in the liquid crystal layer. This control over the backlight transmittance of the corresponding areas of the liquid crystal layer and pixel structure allows for the display of image information corresponding to the data signals.

[0003] In practical display control, after a data signal is applied through the pixel structure, the liquid crystal molecules in the corresponding area cannot immediately rotate to the target state; a certain amount of time is required (liquid crystal response time). Due to this response time, the target state of the liquid crystal molecules lags behind the data signal, causing image retention issues on the LCD panel. Currently, the industry uses overdrive technology for overdrive display control of LCD panels. Overdrive technology applies a larger overdrive data signal than the initial data signal, accelerating the rotation speed of the liquid crystal molecules. This eliminates the image retention problem caused by the liquid crystal response time when displaying dynamic images on the LCD panel, resulting in smoother playback.

[0004] In existing liquid crystal display devices with liquid crystal display panels, when using overdrive technology to control the liquid crystal display panel for overdrive display control, a large-sized control circuit needs to be set in the non-display area of ​​the liquid crystal display panel, resulting in a large bezel width of the liquid crystal display panel, which makes it difficult for the liquid crystal display device to achieve a narrow bezel design. Summary of the Invention

[0005] In view of the above, this application provides a liquid crystal display device and a display driving method thereof, the solution of which is as follows:

[0006] This application provides a liquid crystal display device, comprising:

[0007] A liquid crystal display panel having a display area and a non-display area surrounding at least a portion of the display area;

[0008] A pixel structure arranged in multiple arrays in the display area;

[0009] Multiple memory modules, each corresponding to a pixel structure, are located in the display area and are used to store the identification information of the corresponding pixel structure.

[0010] The control circuit located in the non-display area is used to obtain the identification information of the pixel structure in the previous frame from the memory module during the display driving process of the current frame. Based on the identification information and the initial data signal of the pixel structure in the current frame, the control circuit performs overdrive compensation on the initial data signal. Based on the overdrive compensated data signal, the control circuit controls the pixel structure to display the image. The identification information can characterize the data signal of the pixel structure after overdrive compensation in the relevant frame.

[0011] In the liquid crystal display device provided in this application, a plurality of memory modules corresponding one-to-one with pixel structures are provided in the display area to store the identification information of the pixel structures. The identification information can characterize the data signal of the pixel structure after overdrive compensation in the relevant frame. The control circuit located in the non-display area can obtain the identification information of the pixel structure in the previous frame from the memory modules, so as to perform overdrive compensation on the initial data signal of the pixel structure in the current frame based on the identification information of the pixel structure in the previous frame, so as to control the pixel structure to display the image based on the data signal after overdrive compensation, which can solve the image retention problem caused by the liquid crystal response time of the liquid crystal display panel.

[0012] Furthermore, the control circuit can be an integrated circuit (IC) located in the non-display area. In this application, a memory module is set in the display area. Since the display area has a larger area than the integrated circuit, it is not necessary to set more memory devices in the integrated circuit, thereby reducing the size of the control circuit and the size of the non-display area occupied by the control circuit. This reduces the bezel width of the liquid crystal display panel and facilitates the implementation of a narrow bezel design in the liquid crystal display device.

[0013] This application also provides a display driving method for the above-mentioned liquid crystal display device, including:

[0014] During the display driving process of the current frame, the pixel structure identification information of the previous frame is obtained from the memory module;

[0015] Based on the identification information and the pixel structure of the initial data signal in the current frame, overdrive compensation is performed on the initial data signal;

[0016] Based on the overdrive compensated data signal, the pixel structure is controlled to display the image;

[0017] Among them, the pixel structure identification information in the previous frame can characterize the data signal of the pixel structure after overdrive compensation in the relevant frame.

[0018] The display driving method provided in this application can control the pixel structure for image display based on the overdrive compensated data signal, which can solve the image retention problem caused by the liquid crystal response time in the liquid crystal display panel. Furthermore, it eliminates the need for numerous memory devices in the integrated circuit, reducing the size of the control circuit and consequently the size of the non-display area occupied by the control circuit. This allows for a reduction in the bezel width of the liquid crystal display panel, facilitating the implementation of narrow bezel designs in liquid crystal display devices. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments or prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0020] The structures, proportions, sizes, etc., shown in the accompanying drawings are only for the purpose of assisting those skilled in the art in understanding and reading the content disclosed in the specification, and are not intended to limit the implementation conditions of this application. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in the proportions, or adjustments to the size, without affecting the effects and purposes that this application can produce, should still fall within the scope of the technical content disclosed in this application.

[0021] Figure 1 This is a schematic diagram of the structure of a liquid crystal display device provided in an embodiment of this application;

[0022] Figure 2 This is a schematic diagram of the circuit structure of a partial area in a liquid crystal display device provided in an embodiment of this application;

[0023] Figure 3 This is a schematic diagram of the circuit structure of a partial area in another liquid crystal display device provided in an embodiment of this application;

[0024] Figure 4 A schematic diagram of the circuit structure in a partial area of ​​another liquid crystal display device provided in an embodiment of this application;

[0025] Figure 5 This is a schematic diagram of the circuit structure of a partial area in a liquid crystal display device provided in an embodiment of this application;

[0026] Figure 6 A timing diagram of data signals during overdrive display control of pixel structures;

[0027] Figure 7 For pixel structure based Figure 6 The grayscale change curve of the time-series data signal shown in the image is used for image display.

[0028] Figure 8 A circuit diagram of a control circuit provided in an embodiment of this application;

[0029] Figure 9 A circuit diagram of another control circuit provided in an embodiment of this application;

[0030] Figure 10 This is a schematic diagram of the circuit structure of a partial area in a liquid crystal display device provided in an embodiment of this application;

[0031] Figure 11 Another timing diagram of data signals when performing overdrive display control for pixel structure;

[0032] Figure 12 This is a flowchart illustrating a display driving method provided in an embodiment of this application;

[0033] Figure 13 A flowchart illustrating a method for calculating overdriven compensated data signals provided in this application embodiment;

[0034] Figure 14 This is a flowchart illustrating a method for calculating overdriven compensated data signals, as provided in an embodiment of this application. Detailed Implementation

[0035] The embodiments of this application will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0036] When performing overdrive display control on a liquid crystal display panel, the control circuit needs to be able to compare whether there is a significant difference between the data signal of the previous frame and the data signal of the next frame. In order to achieve this comparison function, a memory device capable of storing at least one whole frame of data signal is required.

[0037] Taking the control circuit as an example of an IC located in the non-display area of ​​an LCD panel, a sufficiently large memory device (such as a random access memory, RAM) needs to be set inside the IC or in the non-display area of ​​the LCD panel to store data signals used for overdrive display control. This results in a need for a larger non-display area, thereby increasing the bezel width of the LCD panel.

[0038] Furthermore, when the aforementioned memory devices are incorporated within the IC, as the resolution of LCD devices increases, greater memory capacity is required for overdrive display control. This means higher costs for the memory devices and a larger IC area required. Moreover, during overdrive display control, the IC needs to continuously perform high-speed access operations on the memory devices, which can impact the electromagnetic compatibility (EMC) characteristics of the integrated circuit.

[0039] To address the aforementioned issues, this application provides a liquid crystal display device. Multiple memory modules, each corresponding to a pixel structure, are disposed within the display area of ​​the liquid crystal display panel to store identification information of the pixel structures. A control circuit located in the non-display area can obtain the identification information of the pixel structure in the previous frame from the memory modules. This allows overdrive compensation to be performed on the initial data signal of the pixel structure in the current frame based on the identification information of the pixel structure in the previous frame, thereby enabling control of the pixel structure to display an image based on the overdrive-compensated data signal.

[0040] Furthermore, the control circuit can be an IC located in the non-display area. Since the display area has a larger area than the integrated circuit, there is no need to place more memory devices in the integrated circuit, which reduces the size of the control circuit and thus reduces the size of the non-display area occupied by the control circuit, thereby reducing the bezel width of the LCD panel.

[0041] Compared to integrating large memory devices within the IC, setting up memory modules corresponding one-to-one with the pixel structure within the display area—which has a larger circuit layout space—to store identification information representing data signals is simpler and less expensive. Furthermore, the IC can access memory from external modules, avoiding the problem of excessively large internal RAM. Also, the IC does not need to communicate with the internal RAM at high frequencies, reducing the impact on the integrated circuit's electromagnetic compatibility.

[0042] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0043] refer to Figure 1 As shown, Figure 1 This is a schematic diagram of a liquid crystal display device provided in an embodiment of this application. The liquid crystal display device includes:

[0044] Liquid crystal display panel 10, the liquid crystal display panel 10 having a display area 101 and a non-display area 102 surrounding at least a portion of the display area 101;

[0045] A pixel structure 11 arranged in multiple arrays in the display area 101;

[0046] Multiple memory modules 21, each corresponding to a pixel structure 11, are provided in the display area 101 and are used to store the identification information of the corresponding pixel structure 11.

[0047] The control circuit 20, located in the non-display area 102, is used to obtain the identification information of the pixel structure 11 in the previous frame from the memory module 21 during the display driving process of the current frame. Based on the identification information and the initial data signal of the pixel structure 11 in the current frame, the control circuit 20 performs overdrive compensation on the initial data signal of the current frame. Based on the overdrive compensated data signal, the control circuit 20 controls the pixel structure 11 to display the image. The identification information can characterize the data signal of the pixel structure after overdrive compensation in the relevant frame.

[0048] In the liquid crystal display device provided in the embodiments of this application, a plurality of memory modules 21 corresponding one-to-one with pixel structures 11 are provided in the display area 101 of the liquid crystal display panel 10 for storing the identification information of the pixel structures 11. The control circuit 20 located in the non-display area 102 can obtain the identification information of the corresponding pixel structure 11 in the previous frame from the memory module 21, so as to perform overdrive compensation on the initial data signal of the pixel structure 11 in the current frame based on the identification information of the pixel structure 11 in the previous frame, so as to control the pixel structure 11 to display the image based on the data signal after overdrive compensation.

[0049] Furthermore, the control circuit 20 can be an IC located in the non-display area 102. In this case, since the display area 101 has a larger area than the IC, it is not necessary to place more memory devices in the IC, reducing the size of the control circuit and thus reducing the size of the non-display area occupied by the control circuit 20, thereby reducing the bezel width of the liquid crystal display panel 10. In addition, compared with the solution of integrating a large memory device inside the IC, the embodiment of this application sets a memory module 21 corresponding one-to-one with the pixel structure 11 in the display area 101, which has a larger circuit layout space, to store identification information that can represent data signals. The manufacturing process is simpler and the manufacturing cost is lower. The IC can perform access operations from the external memory module 21, which can avoid the problem of excessive RAM inside the IC. At the same time, the IC does not need to communicate with the internal RAM at high frequency, which can reduce the impact on the electromagnetic compatibility characteristics of the integrated circuit.

[0050] Pixel structure 11 is connected to control circuit 20 via data line 12, such as Figure 1 As shown, pixel structures 11 in the same column can be connected to the control circuit 20 via the same data line 12, while pixel structures 11 in different columns can be connected to the control circuit 20 via different data lines 12. Generally, the data lines 12 are set to extend along the column direction Y of the pixel structure array.

[0051] During the display driving process of the current frame, the control circuit 20 is also used to write the identification information of the data signal representing the pixel structure 11 after driving compensation in the current frame into the memory module 21 corresponding to the pixel structure 11.

[0052] In one embodiment of this application, for two adjacent pixel structures 11 in the column direction Y, the control circuit 20 is used to write the current frame's identification information into the memory module 21 corresponding to the previous pixel structure 11 during the scanning period of the previous pixel structure 11, and to read the identification information written in the previous frame by the memory module 21 corresponding to the next pixel structure 11. This facilitates the control circuit 20 in reading the identification information of the previous frame from the memory module 21 and writing the current frame's identification information into the memory module 21. When storing the current frame's identification information, the identification information of the previous frame is replaced by the identification information of the current frame.

[0053] Before writing the identification information of the corresponding pixel structure 11 in the current frame to the memory module 21, the memory module 21 stores the identification information of the previous frame. At this time, the relevant frame is the previous frame. After writing the identification information of the corresponding pixel structure 11 in the current frame to the memory module 21, the memory module 21 stores the identification information of the current frame. At this time, the relevant frame is the current frame.

[0054] The memory module 21 is connected to the control circuit 20 via signal line 25, which can be configured to extend along the column direction Y. The control circuit 20 reads identification information from the memory module 21 via signal line 25 and can also write identification information to the memory module 21 via signal line 25. For any two adjacent memory modules 21 in the column direction Y, the control circuit 20 can write the identification information of the current frame into the memory module 21 corresponding to the pixel structure 11 in the previous row, and can also simultaneously read the identification information of the pixel structure 11 in the previous frame stored in the memory module 21 corresponding to the pixel structure 11 in the next row. The reading and writing processes of the identification information of two adjacent memory modules 21 in the column direction Y can be staggered to facilitate the reading and writing of identification information by the control circuit 20.

[0055] In this embodiment, the process of reading and writing the identification information of the memory module 21 is less demanding on impedance than the charging of the pixel electrodes in the pixel structure 11.

[0056] refer to Figure 2 As shown, Figure 2This is a schematic diagram of the circuit structure of a partial area in a liquid crystal display device according to an embodiment of this application. The control circuit 20 is connected to the memory module 21 via signal lines 25. The signal lines 25 include a first signal line 251 and a second signal line 252. For any two adjacent memory modules 21 in the column direction Y, one memory module 21 is connected to the first signal line 251, and the other memory module 21 is connected to the second signal line 252. For example, in the pixel structures 11 of the same column, the pixel structures 11 located in odd-numbered rows can be connected to the first signal line 251, and the pixel structures 11 located in even-numbered rows can be connected to the second signal line 252.

[0057] When scanning the pixel structure 11 in row N-1, it is necessary not only to read the identification information of the previous frame from the memory module 21 in row N-1, but also to write the identification information of the current frame into the memory module 21 in row N-1. To achieve the above objective, in this embodiment, memory modules 21 in the same column are set, and along the column direction Y, memory modules 21 are alternately connected to the first signal line 251 and the second signal line 252. N is a positive integer greater than 1.

[0058] exist Figure 2 In the illustrated configuration, since two adjacent pixel structures 11 in the column direction Y are connected to the first signal line 251 and the second signal line 252 respectively, for pixel structures 11 in the same column, the control circuit 20 can read the identification information of the corresponding pixel structure 11 in the previous frame from the memory module 21 of the Nth row via the second signal line 252, and simultaneously write the identification information of the corresponding pixel structure 11 in the current frame to the memory module 21 of the (N-1)th row via the first signal line 251. Thus, during the scanning period of the pixel structure 11 in the (N-1)th row, the identification information of the pixel structure 11 in the current frame can be written to the memory module 21 corresponding to the pixel structure 11 in the (N-1)th row, and the identification information of the pixel structure 11 in the previous frame stored in the memory module 21 corresponding to the pixel structure 11 in the Nth row can be read.

[0059] For any two adjacent memory modules 21 in the column direction Y, one memory module 21 is connected to the first signal line 251 and the other memory module 21 is connected to the second signal line 252. At the same time, the identification information of the current frame can be written into the memory module 21 corresponding to the pixel structure 11 in the previous row, and the identification information of the pixel structure 11 in the previous frame stored in the memory module 21 corresponding to the pixel structure 11 in the next row can be read at the same time.

[0060] Optionally, the pixel structure 11 includes a pixel transistor M0, with its gate connected to the scan line 13, its source connected to the data line 12, and its drain connected to the pixel electrode. When the pixel transistor M0 is turned on by the scan line 13, a data signal can be input to the pixel electrode through the data line 12. The data signal, together with the common voltage Vcom connected to the common electrode, can control the rotation of the liquid crystal molecules in the corresponding area of ​​the pixel structure 11, thereby realizing image display.

[0061] The gates of pixel transistors M0 in the same row of pixel structure 11 are connected to the same scan line 13, while the gates of pixel transistors M0 in different rows of pixel structure 11 are connected to different scan lines 13, thereby enabling the scanning of each row of pixel structure 11 one by one. Generally, the scan line 13 extends along the row direction X of the pixel structure array.

[0062] A power signal can be provided to the memory module 21 via power signal line 28. Power signal line 28 can extend along the row direction X. Memory modules 21 in the same row can be connected to the same power signal line 28, while memory modules 21 in different rows can be connected to different power signal lines 28. The power signal provided by power signal line 28 is located between 0V and a set high level VGH.

[0063] It should be noted that in the embodiments of this application, the lines in the accompanying drawings do not represent the actual line width. The different thicknesses of the lines are mainly used to distinguish different types of wiring. For example, in order to facilitate the distinction between the power signal line 28 and the scan line 13, the scan line 13 is represented by a thinner straight line along the X direction, and the power signal line 28 is represented by a thicker straight line along the X direction.

[0064] In the liquid crystal display device provided in this application embodiment, the control circuit 20 can write the identification information of the current frame into the memory module 21 corresponding to the pixel structure 11 during the scanning period of the pixel structure 11, so as to determine the data signal after overdrive compensation in the next frame for overdrive display control in the next frame.

[0065] Optionally, the memory module 21 and the gate of the pixel transistor M0 in the corresponding pixel structure 11 can be connected to the same scan line 13. In this way, for the corresponding pixel structure 11 and memory module 21 in the same row, the scanning period of the pixel transistor M0 and the identification information writing process of the memory module 21 are synchronized. When the pixel transistor M0 is turned on by controlling the scan line 13, the control circuit 20 can synchronously write the identification information of the current frame to the corresponding memory module 21.

[0066] Alternatively, the memory module 21 can be connected to the scan line 13 connected to the gate of the pixel transistor M0 in the previous row pixel structure 11. In this way, in the current frame, the reading of the previous frame identification information in the next row memory module 21 and the writing of the current frame identification information in the previous row memory module 21 can be performed synchronously.

[0067] In the liquid crystal display device provided in this application embodiment, for two adjacent memory modules 21 in the same column, the control circuit 20 can simultaneously write the identification information of the current frame into the memory module 21 in the previous row while reading the identification information of the previous frame from the memory module 21 in the next row. This allows the data writing process of the memory module 21 in the previous row to be synchronized with the data reading process of the memory module 21 in the next row, improving the data interaction efficiency between the control circuit 20 and the memory module 21.

[0068] The memory module 21 is a storage circuit, which includes multiple interconnected transistors. The functional layers in the pixel transistor M0 can be reused to fabricate the transistors in the storage circuit. Thus, when fabricating the pixel crystal M0 in the pixel structure 11, the transistors in the storage circuit can be fabricated simultaneously without the need for additional process steps and film structures to fabricate the transistors in the storage circuit.

[0069] refer to Figure 3 As shown, Figure 3 This is a schematic diagram of the circuit structure of a partial area in another liquid crystal display device provided in this application embodiment. In this embodiment, the memory modules 21 in the same row are connected to the same clock signal line 29, and the memory modules 21 in different rows are connected to different clock signal lines 29. The control circuit 20 is connected to the memory modules 21 through signal lines 25. The memory modules 21 in the same column are connected to the same signal line 25, and the memory modules 21 in different columns are connected to different signal lines 25. During the scanning period of the previous pixel structure 11, the clock signal line 29 connected to the corresponding memory module 21 performs a high-low level switch of the clock signal once, so that the control circuit can write the current frame identification information to the memory module corresponding to the previous pixel structure through the same signal line, and read the identification information written by the memory module corresponding to the next pixel structure in the previous frame.

[0070] exist Figure 2 In the illustration, to facilitate the distinction between clock signal line 29 and scan line 13, a thinner straight line along the row direction X represents clock signal line 29, and a thicker straight line along the row direction X represents scan line 13.

[0071] like Figure 2As shown in the dashed elliptical region, during the scanning period of the previous pixel structure 11 (the wider square wave pulse above the dashed ellipse), the clock signal line 29 connected to the corresponding memory module 21 undergoes a high-low level switch of the clock signal (a high-low level switch of the narrower square wave pulse below the dashed ellipse). In this way, the scanning period of the previous pixel structure 11 can be divided into two periods. One period can be used to write the identification information of the current frame into the memory module 21 corresponding to the previous pixel structure 11, and the other period can be used to read the identification information of the previous frame stored in the memory module 21 corresponding to the next pixel structure 11.

[0072] refer to Figure 4 As shown, Figure 4 This is a schematic diagram of the circuit structure of a partial area of ​​another liquid crystal display device provided in an embodiment of this application. Based on any of the above embodiments, the control circuit 20 of the liquid crystal display device includes:

[0073] The identification module 22 can read the identification information of the pixel structure 11 in the previous frame from the memory module 21, and can also write the identification information of the pixel structure 11 in the current frame into the memory module 21.

[0074] The compensation module 23 can obtain the identification information of the pixel structure 11 in the previous frame through the identification module 22, perform overdrive compensation based on the identification information of the previous frame and the initial signal of the pixel structure 11 in the current frame, and calculate the data signal after overdrive compensation in the current frame.

[0075] The compensation module 23 can also write the identification information of the pixel structure 11 in the current frame into the corresponding memory module 21 through the identification module 22.

[0076] exist Figure 4 In the illustrated embodiment, the control circuit 20 includes an identification module 22 and a compensation module 23. The control circuit 20 can read the identification information of the pixel structure 11 from the memory module 21 in the previous frame through the identification module 22, and can also write the identification information of the current frame into the memory module 21. The control circuit 20 can perform overdrive compensation on the initial signal of the current frame through the compensation module 23, and calculate the overdrive-compensated data signal of the current frame. This allows the control circuit 20 to control the pixel structure 11 to display an image based on the overdrive-compensated data signal of the current frame, thereby achieving overdrive display control of the pixel structure 11 and solving the image retention problem caused by the liquid crystal response time.

[0077] like Figure 4As shown, the identification module 22 is connected to the memory module 21 via signal line 25, so that the identification module 22 can read identification information from or write identification information to the memory module 21. The identification module 22 is connected to the compensation module 23 via trace 27, so that the identification module 22 and trace 27 can interact with each other.

[0078] It should be noted that, Figure 4 Therefore Figure 2 The implementation of the control circuit 20 is described in the manner shown, but obviously, it can also be implemented in other ways. Figure 3 As shown, the memory modules 21 in the same column are connected to the identification module 22 through the same signal line 25. This embodiment of the application will not be described separately.

[0079] like Figure 4 As shown, the control circuit 20 further includes: a data buffer 24, which is used to acquire and store the initial data signal Db of the pixel structure 11 in the current frame; a data latch 26, which is used to acquire the overdrive compensated data signal from the compensation module 23; an identification module 22 acquires the overdrive compensated data signal of the current frame through the data latch 26 to determine the identification information of the pixel structure 11 in the current frame; and an ADC (analog-to-digital converter) module 30, which is used to acquire the overdrive compensated data signal of the current frame from the data latch 26 and transmit the overdrive compensated data signal to the pixel structure 11 to control the pixel structure 11 to display the image.

[0080] In this embodiment, pixel structures 11 in the same column are connected to the same ADC module 30, and pixel structures 11 in different columns are connected to different ADC modules 30; pixel structures 11 in the same column are connected to the same recognition module 22, and pixel structures 11 in different columns are connected to different recognition modules 22; pixel structures 11 in the same column are connected to the same compensation module 23, and pixel structures 11 in different columns are connected to different compensation modules 23; data latch 26 has multiple data latch unit groups, pixel structures 11 in the same column are connected to the same data latch unit group, and pixel structures 11 in different columns are connected to different data latch unit groups; data temporary register 24 has multiple data temporary register unit groups, pixel structures 11 in the same column are connected to the same data temporary register unit group, and pixel structures 11 in different columns are connected to different data temporary register unit groups.

[0081] The memory modules 21 in the same column can be alternately connected to the first signal line 251 and the second signal line 252. During the display driving process of the current frame, the recognition module 22 can read the identification information of the Nth row pixel structure 11 in the previous frame from the memory module 21 through the second signal line 252, and write the identification information of the N-1th row pixel structure 11 in the current frame to the memory module 21 through the first signal line 251. In this embodiment, for the memory modules 21 in the same column, each memory module 21 located in odd-numbered rows is connected in series to the recognition module 22 through the same second signal line 252, and each memory module 21 located in even-numbered rows is connected in series to the recognition module 22 through the same first signal line 251. The recognition module 22 is connected to the compensation module 23 through the trace 27. The initial data signal of each frame is first input to the data buffer 24, and after overdrive compensation by the compensation module 23, it is output to the data latch 26. The data latch 26 sends the overdrive-compensated data signal to the ADC module 30 to control the pixel structure 11 to perform overdrive display in the current frame, and sends the overdrive-compensated data signal to the recognition module 22 so that the recognition module 22 can write the identification information of the current frame into the memory module 21.

[0082] As can be seen from the above description, when the IC based on the above control circuit 20 architecture performs overdrive display control, the memory module 21 for storing data required for overdrive display control is set in the display area 101, which has more layout space than the IC. This eliminates the need to set more memory devices in the IC and avoids the inherent defects of conventional overdrive display solutions.

[0083] In the liquid crystal display device provided in this application embodiment, compared with the conventional overdrive display solution, the technical solution of this application embodiment only requires adding a data buffer 24 to the IC, while the data latch 26 is an existing structure in the IC. The data buffer 24 only needs to store the data signal of one row of pixel structure 11, without storing the data signal of an entire frame, which effectively solves the problem of excessive RAM in the IC. At the same time, it does not need to communicate with RAM at high frequency, which can reduce the impact on EMC characteristics.

[0084] In other methods, for memory modules 21 in the same column, it is also possible to base them on... Figure 3The configuration shown is such that memory modules 21 in the same row are connected to the same clock signal line 29 extending along the row direction, while memory modules 21 in different rows are connected to different clock signal lines 29. Memory modules 21 in the same column are all connected to the same signal line 25, and the signal lines 25 connected to memory modules 21 in the same column are connected to the same identification module 22. During the scanning period of a row of pixel structures 11, the clock signal line 29 connected to the corresponding column of memory modules 21 can switch between high and low levels once, so that the identification module 22 can write the identification information of the row of pixel structures in the current frame and read the identification information of the next row of pixel structures 11 in the previous frame through the same signal line 25 in a time-division manner.

[0085] refer to Figure 5 As shown, Figure 5 This is a schematic diagram of the circuit structure of a partial area in another liquid crystal display device provided in the embodiments of this application, combined with... Figure 4 and Figure 5 As shown, based on the above implementation method, in this implementation method, the identification information includes first information, and the memory module 21 includes a first memory unit 211 for storing the first information;

[0086] The recognition module 22 includes a first recognition unit 221. The first recognition unit can read the first information of the pixel structure in the previous frame from the first memory unit, and can also write the first information of the pixel structure in the current frame into the first memory unit. The first information indicates whether the data signal of the pixel structure in the relevant frame is less than the first gray level.

[0087] The compensation module 23 includes a first compensation unit 231. The first compensation unit 231 can obtain the first information of the pixel structure 11 in the previous frame through the first recognition unit 221. When the initial data signal of the pixel structure 11 in the current frame is greater than the data signal after overdrive compensation in the previous frame, the first compensation unit 231 is used to perform overdrive compensation based on the first information of the previous frame and the initial signal of the pixel structure in the current frame. The data signal after overdrive compensation is not less than the initial data signal.

[0088] For the same pixel structure 11, when the data signal of the previous frame differs significantly from the data signal of the next frame, and the grayscale corresponding to the data signal of the previous frame is small, based on Figure 5 The liquid crystal display device shown performs overdrive display control on the pixel structure 11, which can effectively solve the image retention problem caused by the liquid crystal response time of the liquid crystal display panel.

[0089] refer to Figure 6 and Figure 7 As shown, Figure 6 A timing diagram of data signals during overdrive display control of pixel structures. Figure 7 For pixel structure based Figure 6 The grayscale change curve of the timing data signal shown is used for image display. For the same pixel structure 11, the previous frame F is set. M-1 In the middle, pixel junction 11 displays the image based on data signal V1, corresponding to the first display grayscale G1, and in the next frame F M In this context, the initial data signal corresponding to pixel structure 11 is V2. If pixel structure 11 displays an image based on the initial data signal V2, it corresponds to the second display grayscale G2. Here, M is a positive integer greater than 1. In this case, V2 is greater than V1, and G2 is greater than G1.

[0090] It is readily apparent that pixel structure 11 can display gray levels of 0, 225, or any positive gray level between 0 and 255 based on the input data signal. Therefore, when pixel structure 11 displays an image based on the data signal, the minimum gray level it can display is 0, and the maximum gray level is 255. The values ​​of the gray levels that pixel structure 11 can display can be controlled by providing different data signals to pixel structure 11.

[0091] Optionally, the first gray level can be 64. In this embodiment, the value of the first gray level can be set according to requirements, and is not limited to 64. For example, the first gray level can also be set to 50, 55, or 60. This embodiment does not limit the specific value of the first gray level.

[0092] For the same pixel structure 11, when the control circuit 20 performs overdrive display control on the pixel structure 11 based on the first recognition unit 221 and the first compensation unit 231, the pixel structure 11 in the current frame F... i+1 The initial data signal V2 is overdriven and compensated, thereby increasing the initial data signal V2 to V3, which enables the pixel structure 11 to be driven by the previous frame F. i The first display grayscale G1 switches to the current frame F i+1 When displaying the second grayscale G2, the switching delay time caused by the liquid crystal response time is shortened, thereby solving the image retention problem caused by the liquid crystal response time in the liquid crystal display panel.

[0093] To facilitate testing the display effect of pixel structure 11, when testing and verifying the display effect of the liquid crystal display device based on overdrive display control, the time ΔT required for the pixel structure to display from 10% G2 to 90% G2 is generally used, and ΔT represents the aforementioned delay time. Based on the technical solution of the embodiments of this application, ΔT can be effectively shortened, thereby effectively solving the image retention problem caused by the liquid crystal response time of the liquid crystal display panel.

[0094] In this embodiment, the working principle of the control circuit 20 during the display driving process of two adjacent frames is as follows:

[0095] In the previous frame FM-1 During the display driving process, when scanning the Nth row of pixel structure 11, the data signal output from the data buffer 24 is overdriven compensated by the compensation module 23 and then output to the data latch 26. The recognition module 22 can identify the possibility that the next frame needs overdrive compensation, such as when the data signal meets the requirements. Figure 6 The previous frame F shown M-1 With the next frame F M Difference relationship. The identification module 22 writes the identification information of the current frame into the memory module 21 of the current line. At this time, the scan line 13 of the Nth line is input with a high level. The identification module 22 can directly pull the potential of point P in the memory module 21 low through the second signal line 252. After the memory module 21 is turned off, the potential of point P will remain low as identification information.

[0096] In the next frame F M During the display driving process, when scanning the (N-1)th row, if the scan line 13 of the N1th row is high, the potential stored at point P is output to the recognition module 22 through the second signal line 52. This allows the recognition module 22 to recognize the low level stored at point P and enable the compensation module 23 through the trace 27. The compensation module 23 can calculate the compensated upper data signal based on the output of the data buffer 24, such as... Figure 6 As shown, the initial data signal V2 is increased to V3.

[0097] In this embodiment, if the overdriven data signal of the previous frame is less than the first gray level, and the initial data signal of the current frame is less than the first overdriven reference gray level, the first compensation unit 231 is used to take the initial data signal of the pixel structure 11 in the current frame as the overdriven data signal of the current frame. The first overdriven reference gray level is greater than the first gray level. At this time, since the difference between the initial data signal of the pixel structure 11 in the current frame and the data signal displayed in the previous frame is small, the difference between the gray level to be displayed in the current frame and the gray level displayed in the previous frame is small. When switching between the two frames, the liquid crystal molecules do not need to undergo a large-scale state change, so the initial data signal of the current frame can be directly used as the overdriven data signal of the current frame.

[0098] Optionally, the first overdrive reference grayscale can be set to 192. In this embodiment, the value of the first overdrive reference grayscale can be set according to requirements, and is not limited to 192. For example, the first overdrive reference grayscale can also be set to 180, 190, or 200. This embodiment does not limit the specific value of the first overdrive reference grayscale.

[0099] If the data signal displayed by pixel structure 11 in the previous frame is less than the first gray level, and the initial data signal of pixel structure 11 in the current frame is not less than the first overdrive reference gray level, the first compensation unit 231 is used to perform overdrive compensation on the initial data signal based on the first gray level range where the initial data signal of the current frame is located. At this time, since the initial data signal of pixel structure 11 in the current frame differs greatly from the data signal displayed in the previous frame, the gray level required to be displayed in the current frame differs greatly from the gray level displayed in the previous frame. When switching between the two frames, the liquid crystal molecules need to undergo a significant state change, and at this time, overdrive compensation is required on the initial data signal of pixel structure 11 in the current frame.

[0100] Among them, the first overdrive reference gray level to 255 is divided into at least two non-overlapping first gray level intervals. Different first gray level intervals correspond to different compensation values, and the compensation value corresponding to the first gray level interval is a positive value.

[0101] If the initial data signal of pixel structure 11 in the current frame corresponds to a gray level of 255, it indicates that it is the maximum data signal, and the corresponding compensation value is 0, that is, 255 is used as the data signal after overdrive compensation. If the initial data signal of pixel structure 11 in the current frame is less than the first overdrive reference gray level, the corresponding compensation value is 0.

[0102] In this embodiment, different compensation values ​​can be set for each first grayscale interval. The first compensation unit 231 can calculate the data signal after driving compensation based on the initial data signal of the pixel structure 11 in the current frame and the corresponding compensation value. Optionally, the data signal after driving compensation is equal to the sum of the initial data signal and the compensation value.

[0103] The closer the first grayscale interval is to 255, the larger the corresponding compensation value can be set. It is easy to see that when the initial data signal of pixel structure 11 in the current frame is located in the first grayscale interval close to 255, the difference between it and the data signal displayed by pixel structure 11 in the previous frame is greater. When switching between the two frames, the liquid crystal molecules need to rotate a larger amplitude. At this time, using a larger compensation value can make the liquid crystal molecules switch to the required state faster, which can better solve the image retention problem caused by the liquid crystal response time of the liquid crystal display panel.

[0104] The first gray level can be set to 64, and the first overdrive reference gray level to 192. The range 192 to 255 can be divided into three first gray level intervals, namely [192, 240), [240, 252), and [252, 255). The compensation value corresponding to [192, 240) can be set to Dr3, the compensation value corresponding to [240, 252) to Dr2, and the compensation value corresponding to [252, 255) to Dr1, with Dr3, Dr2, and Dr1 increasing sequentially. The initial data signal of pixel structure 11 in the current frame is set to Db, and the data signal after overdrive compensation is set to DI. If 192 ≤ Db < 240, then DI = Db + Dr3; if 240 ≤ Db < 252, then DI = Db + Dr2; if 252 ≤ Db < 255, then DI = Db + Dr1; if Db = 255 or Db < 192, then DI = Db + Dr0, where Dr0 = 0.

[0105] refer to Figure 8 As shown, Figure 8 The circuit diagram of a control circuit provided in this application embodiment shows that the identification module 22 is connected to a switch in the first switch group S1 and a switch in the second switch group S2 via a first logic circuit, and is respectively connected to the first signal line 251 and the second signal line 252. The first logic circuit includes two interconnected OR gates 43. The first signal line 251 is also connected to the second logic circuit via another switch in the first switch group S1 and another switch in the second switch group S2, so that it is respectively connected to the compensation module 23, the data register 24, and the adder 44 based on the second logic circuit. The second logic circuit includes one interconnected OR gate 43, 22 AND gates 42, and three XOR gates 41.

[0106] When corresponding to three first grayscale intervals, the compensation module 23 includes at least the first to fourth storage unit groups for storing Dr0, Dr1, Dr2, and Dr3 in sequence.

[0107] The implementation method of the logic circuit in the control circuit 20 can be set according to the requirements, and this application embodiment does not limit this. The control circuit 20 can be designed with an identification module 22 and a compensation module 23 based on compensation requirements to implement the above-mentioned compensation logic. The logic devices required in the control circuit 20 are all commonly used devices in current IC design, making the control circuit 20 more feasible and reducing manufacturing costs.

[0108] Taking the three first grayscale intervals and their corresponding compensation values ​​as examples, in the current frame F i During the display driving process, i is a positive integer, and the working principle of the control circuit 20 is as follows:

[0109] Current frame F iDuring the display driving process, when scanning the (N-1)th row of heated pixel structure 11, the current frame F is written into the memory module 21 based on the output of the data latch 26. i The identification information, such as DI < 64, is output at a low level through the first signal line 251 and latched in the memory module 21 of the (N-1)th row. The compensation module 23 reads the level of the memory module 21 of the Nth row based on the first signal line 251, and calculates the DI corresponding to the N-1th row based on the level. As mentioned above, if 192 ≤ Db < 240, then DI = Db + Dr3; if 240 ≤ Db < 252, then DI = Db + Dr; if 252 ≤ Db < 255, then DI = D + bD; if Db = 255 or Db < 192, then DI = Db + Dr0.

[0110] Current frame F i During the display driving process, when scanning the (N-1)th row, DI is output to the pixel structure 11, simultaneously closing two switches in the first switch group S1 and simultaneously opening two switches in the second switch group S2, thus swapping the logical relationship between the first signal line 251 and the second signal line 252. When DI < 64, a low level is output through the second signal line 252 and latched in the memory module 21 of the Nth row. The supplementary module 23 reads the level of the memory module 21 previously stored in the (N+1)th row based on the first signal line 251, calculates the DI corresponding to the Nth row based on this level, and updates the identification information in the memory module 21. The calculation method for the DI corresponding to the Nth row is the same as the calculation method for the DI corresponding to the (N-1)th row.

[0111] As mentioned above, the clock signal line 29 can also be configured so that memory modules 21 in the same column are connected to the same signal line 25. In this case, the circuit diagram of the control circuit can be as follows: Figure 9 As shown.

[0112] refer to Figure 9 As shown, Figure 9 The circuit diagram of another control circuit provided in this application embodiment shows that in this embodiment, memory modules 21 in the same column are connected to the control circuit 20 via the same signal line 25. Signal line 25 is connected to the first logic circuit via one switch in switch group S, to be connected to the identification module 22, and to the second logic circuit via another switch in switch group S, to be connected to the compensation module 23, the data buffer 24, and the adder 44 respectively. In this embodiment, the first logic circuit includes five interconnected OR gates 43, and the second logic circuit... Figure 8 The implementation method shown is the same.

[0113] based on Figure 9In the illustrated embodiment, by setting a clock signal line 29 in the row direction X, the same memory module 21 can be connected to the control circuit 20 via only one signal line 25, reducing the number of wirings in the column direction Y. Based on the high-low level switching of the signal transmitted by the clock signal line 29, the signal line 25 can perform time-division multiplexing of the reading and writing of identification information. During the scanning period of a row, identification information in the (N-1)th row memory module 21 can be read, and identification information can be written to the Nth row memory module 21 via the same signal line 25. The clock signal line 29 can input a signal with a fixed waveform. Different clock signal lines 29 can share the same signal.

[0114] refer to Figure 10 As shown, Figure 10 This is a schematic diagram of the circuit structure of a partial area in another liquid crystal display device provided in an embodiment of this application. Figure 5 Based on the implementation method shown, Figure 10 In the liquid crystal display device shown, the identification information also includes second information. The memory module 21 includes a second memory unit 212 for storing the second information. The identification module 22 includes a second identification unit 222, which can read the second information of the pixel structure 11 in the previous frame from the second memory unit 212 and can also write the second information of the pixel structure 11 in the current frame into the second memory unit 212. The second information indicates whether the data signal of the pixel structure 11 in the relevant frame is greater than the second gray level.

[0115] The compensation module 23 includes a second compensation unit 232. The second compensation unit 232 can obtain the second information of the pixel structure 11 in the previous frame through the second recognition unit 222. When the initial data signal of the pixel structure 11 in the current frame is less than the data signal after overdrive compensation in the previous frame, the second compensation unit 232 is used to perform overdrive compensation based on the second information of the previous frame and the initial signal of the pixel structure 11 in the current frame. The data signal after overdrive compensation is not greater than the initial data signal. The first recognition unit 221 and the first compensation unit 231, and the second recognition unit 222 and the second compensation unit 232 are respectively connected by different traces 27.

[0116] For the same pixel structure 11, when there is a significant difference between the data signal of the previous frame and the data signal of the next frame, and the gray level corresponding to the data signal of the previous frame is large, based on Figure 10 The liquid crystal display device shown performs overdrive display control on the pixel structure 11, which can effectively solve the image retention problem caused by the liquid crystal response time of the liquid crystal display panel.

[0117] refer to Figure 11 As shown, Figure 11Another timing diagram of the data signals when performing overdrive display control for pixel structures. For the same pixel structure 11, the previous frame F is set. i In the image, pixel junction 11 displays the image based on data signal V1, corresponding to the first display grayscale G1, in the previous frame F. i+1 In this context, the initial data signal corresponding to pixel structure 11 is V2. If pixel structure 11 displays an image based on the initial data signal V2, it corresponds to the second display grayscale G2. At this time, V2 is less than V1, and G2 is less than G1.

[0118] Optionally, the second gray level can be equal to the first overdrive reference gray level mentioned above. In this embodiment, the value of the second gray level can be set according to requirements, and is not limited to the first overdrive reference gray level. The second gray level may also not be equal to the first overdrive reference gray level mentioned above. This embodiment does not limit the specific value of the second gray level.

[0119] For the same pixel structure 11, when the control circuit 20 performs overdrive display control on the pixel structure 11 based on the second recognition unit 222 and the second compensation unit 232, the pixel structure 11 in the current frame F i+1 The initial data signal V2 is overdriven and compensated, thereby reducing the initial data signal V2 to V4, which enables the pixel structure 11 to be driven by the previous frame F. i The first display grayscale G1 switches to the current frame F i+1 When displaying the second grayscale G2, the switching delay time caused by the liquid crystal response time is shortened, thereby solving the image retention problem caused by the liquid crystal response time in the liquid crystal display panel.

[0120] Optionally, the circuit structures of the first memory unit 211 and the second memory unit 212 can be identical. Both the first memory unit 211 and the second memory unit 212 are storage circuits, and the storage circuits include multiple interconnected transistors. The transistors in the first memory unit 211 and the second memory unit 212 can be fabricated using the functional layers in the pixel transistor M0.

[0121] In this embodiment, if the data signal of pixel structure 11 after overdrive compensation in the previous frame is greater than the second gray level, and the initial data signal in the current frame is greater than the second overdrive reference gray level, the second compensation unit 232 is used to use the initial data signal of pixel structure 11 in the current frame as the data signal after overdrive compensation in the current frame. The second overdrive reference gray level is less than the second gray level. At this time, since the difference between the initial data signal of pixel structure 11 in the current frame and the data signal displayed in the previous frame is small, the difference between the gray level required to be displayed in the current frame and the gray level displayed in the previous frame is small. When switching between the two frames, the liquid crystal molecules do not need to undergo a significant state change, so the initial data signal of the current frame can be directly used as the data signal after overdrive compensation in the current frame.

[0122] It is optional; the second overdrive reference grayscale can be set to be equal to the first grayscale. The value of the second overdrive reference grayscale can be set according to requirements, and is not limited to being equal to the first grayscale. It can also be set that the second overdrive reference grayscale is not equal to the first grayscale. In this embodiment of the application, the specific value of the second overdrive reference grayscale is not limited.

[0123] If the data signal displayed by pixel structure 11 in the previous frame is greater than the second gray level, and the initial data signal of pixel structure 11 in the current frame is not greater than the second overdrive reference gray level, the second compensation unit 232 is used to perform overdrive compensation on the initial data signal based on the second gray level range where the initial data signal of the current frame is located. At this time, since the initial data signal of pixel structure 11 in the current frame is significantly different from the data signal displayed in the previous frame, the gray level to be displayed in the current frame is significantly different from the gray level displayed in the previous frame. When switching between the two frames, the liquid crystal molecules need to undergo a significant state change. At this time, overdrive compensation is required on the initial data signal of pixel structure 11 in the current frame.

[0124] The transition from grayscale 0 to the second overdrive reference grayscale is divided into at least two non-overlapping grayscale intervals, with different second grayscale intervals corresponding to different overcompensation values. In this case, the compensation value corresponding to the second grayscale interval is negative.

[0125] If pixel structure 11 corresponds to a gray level of 0 in the initial data signal of the current frame, it indicates that it is the minimum data signal, and the corresponding compensation value is 0, that is, 0 is used as the data signal after overdrive compensation. If the initial data signal of pixel structure in the current frame is greater than the second overdrive reference gray level, the corresponding compensation value is 0.

[0126] In this embodiment, different compensation values ​​can be set for each second grayscale interval. The second compensation unit 232 can calculate the data signal after driving compensation based on the initial data signal of the pixel structure 11 in the current frame and the corresponding compensation value. Optionally, the data signal after driving compensation is equal to the sum of the initial data signal and the compensation value.

[0127] The closer the second grayscale interval is to 0 grayscale, the smaller the corresponding compensation value should be. It is easy to see that when the initial data signal of pixel structure 11 in the current frame is located in the second grayscale interval close to 0 grayscale, the difference between it and the data signal displayed by pixel structure 11 in the previous frame is greater. When switching between two frames, the liquid crystal molecules need to rotate a larger amplitude. Using a smaller compensation value at this time allows the liquid crystal molecules to switch to the required state more quickly, which can better solve the image retention problem caused by the liquid crystal response time in the liquid crystal display panel.

[0128] Based on the liquid crystal display device provided in the above embodiments, another embodiment of this application also provides a display driving method for the liquid crystal display device described in any of the above embodiments, the display driving method being as follows: Figure 12 As shown.

[0129] refer to Figure 12 As shown, Figure 12 This is a flowchart illustrating a display driving method provided in an embodiment of this application. The display driving method includes:

[0130] Step S11: During the display driving process of the current frame, obtain the pixel structure identification information of the previous frame from the memory module.

[0131] Step S12: Based on the identification information and the initial data signal of the pixel structure in the current frame, perform overdrive compensation on the initial data signal.

[0132] Step S13: Based on the overdrive compensated data signal, control the pixel structure to display the image.

[0133] Among them, the pixel structure identification information in the previous frame can characterize the data signal of the pixel structure after overdrive compensation in the relevant frame.

[0134] The display driving method provided in this application embodiment can perform overdrive display control on the pixel structure based on the liquid crystal display device provided in the above embodiments. Furthermore, by placing the memory module storing identification information in the display area of ​​the liquid crystal display panel, the size of the IC can be reduced, thereby reducing the bezel width of the liquid crystal display panel. This also avoids excessively large internal RAM in the IC, eliminating the need for high-frequency communication between the IC and its internal RAM, thus reducing the impact on EMC characteristics.

[0135] Optionally, in step S11 above, after obtaining the identification information of the pixel structure in the previous frame from the memory module during the display driving process of the current frame, the method further includes: for two adjacent pixel structures in the column direction, during the scanning period of the previous pixel structure, writing the identification information of the current frame to the memory module corresponding to the previous pixel structure, and reading the identification information written by the memory module corresponding to the next pixel structure in the previous frame.

[0136] As described in the above embodiments, for memory modules in the same column, in the column direction, the memory modules can be set to alternately connect with the first signal line and the second signal line. The identification information of the current frame can be written into the memory module corresponding to the pixel structure of the previous row, and the identification information of the pixel structure in the previous frame stored in the memory module corresponding to the pixel structure of the next row can be read at the same time. The reading and writing processes of the identification information of two adjacent memory modules in the column direction can be staggered.

[0137] In the display driving method provided in this application embodiment, the identification information includes first information, and the memory module includes a first memory unit storing the first information; the first information characterizes whether the data signal of the pixel structure in the relevant frame is less than a first gray level. The method for calculating the data signal after driving compensation in the current frame is as follows: Figure 13 As shown,

[0138] refer to Figure 13 As shown, Figure 13 A flowchart of a method for calculating overdriven compensated data signals provided in this application embodiment is provided. The method includes:

[0139] Step S21: Obtain the first information of the pixel structure in the previous frame.

[0140] Step S22: When the initial data signal of the pixel structure in the current frame is greater than the data signal after overdrive compensation in the previous frame, overdrive compensation is performed based on the first information of the previous frame and the initial signal of the pixel structure in the current frame, and the compensated data signal is not less than the initial data signal.

[0141] For the same pixel structure, when there is a significant difference between the data signal of the previous frame and the data signal of the next frame, and the gray level corresponding to the data signal of the previous frame is small, based on Figure 13 The method shown performs overdrive display control on the pixel structure, which can effectively solve the image retention problem caused by the liquid crystal response time in the liquid crystal display panel.

[0142] Optional, in Figure 13 In the illustrated method, the method for calculating the over-driven compensated data signal in the current frame includes:

[0143] If the overdriven data signal of the previous frame is less than the first gray level, and the initial data signal of the current frame is less than the first overdriven reference gray level, the initial data signal of the pixel structure in the current frame is used as the overdriven data signal of the current frame; the first overdriven reference gray level is greater than the first gray level. At this time, since the difference between the initial data signal of the pixel structure in the current frame and the data signal displayed in the previous frame is small, the difference between the gray level to be displayed in the current frame and the gray level displayed in the previous frame is small. When switching between the two frames, the liquid crystal molecules do not need to undergo a large change in state. Therefore, the initial data signal of the current frame can be directly used as the overdriven data signal of the current frame.

[0144] If the data signal displayed by the pixel structure in the previous frame is lower than the first gray level, and the initial data signal of the pixel structure in the current frame is not lower than the first overdrive reference gray level, overdrive compensation is performed on the initial data signal based on the first gray level interval where the initial data signal of the current frame is located. At this time, because the initial data signal of the pixel structure in the current frame differs significantly from the data signal displayed in the previous frame, the gray level required to be displayed in the current frame differs significantly from the gray level displayed in the previous frame. When switching between the two frames, the liquid crystal molecules need to undergo a significant state change, thus requiring overdrive compensation on the initial data signal of the pixel structure in the current frame. Specifically, the first overdrive reference gray level to 255 is divided into at least two non-overlapping first gray level intervals, with different first gray level intervals corresponding to different overcompensation values.

[0145] Optionally, the identification information also includes second information, and the memory module includes a second memory unit storing the second information; the second information characterizes whether the data signal of the pixel structure in the relevant frame is greater than the second gray level; in this case, the method for calculating the data signal after drive compensation in the current frame can be as follows: Figure 14 As shown.

[0146] refer to Figure 14 As shown, Figure 14 A flowchart of a method for calculating overdriven compensated data signals provided in this application embodiment includes:

[0147] Step S31: Obtain the second information of the pixel structure in the previous frame.

[0148] Step S32: When the initial data signal of the pixel structure in the current frame is less than the data signal after overdrive compensation in the previous frame, overdrive compensation is performed based on the second information of the previous frame and the initial signal of the pixel structure in the current frame. The data signal after overdrive compensation is not greater than the initial data signal.

[0149] For the same pixel structure, when there is a significant difference between the data signal of the previous frame and the data signal of the next frame, and the gray level corresponding to the data signal of the previous frame is large, based on Figure 14 The method shown performs overdrive display control on the pixel structure 11, which can effectively solve the image retention problem caused by the liquid crystal response time in the liquid crystal display panel.

[0150] Optional, in Figure 14 In the illustrated method, the method for calculating the over-driven compensated data signal in the current frame includes:

[0151] If the data signal of the pixel structure after overdrive compensation in the previous frame is greater than the second gray level, and the initial data signal of the current frame is greater than the second overdrive reference gray level, the initial data signal of the pixel structure in the current frame is used as the data signal after overdrive compensation in the current frame; the second overdrive reference gray level is less than the second gray level. At this time, since the difference between the initial data signal of the pixel structure in the current frame and the data signal displayed in the previous frame is small, the difference between the gray level to be displayed in the current frame and the gray level displayed in the previous frame is small. When switching between the two frames, the liquid crystal molecules do not need to undergo a large change in state. Therefore, the initial data signal of the current frame can be directly used as the data signal after overdrive compensation in the current frame.

[0152] If the data signal displayed by the pixel structure in the previous frame is greater than the second gray level, and the initial data signal of the pixel structure in the current frame is not greater than the second overdrive reference gray level, overdrive compensation is performed on the initial data signal based on the second gray level interval where the initial data signal of the current frame is located. At this time, because the initial data signal of the pixel structure in the current frame differs significantly from the data signal displayed in the previous frame, the gray level required to be displayed in the current frame differs significantly from the gray level displayed in the previous frame. When switching between the two frames, the liquid crystal molecules need to undergo a significant state change, thus requiring overdrive compensation on the initial data signal of the pixel structure in the current frame. Specifically, the range from 0 to the second overdrive reference gray level is divided into at least two non-overlapping gray level intervals, with different second gray level intervals corresponding to different overcompensation values.

[0153] As described above, the technical solution of this application can perform overdrive display control on the pixel structure by comparing the data signals of two adjacent pins. The identification information of the previous frame can be stored in the memory module of the display area, and 8-bit data can be directly stored in the display area. During the display driving process of the next frame, the identification information stored in the display area is read, and overdrive compensation calculation is performed on the identification information corresponding to the required row of data signals.

[0154] The various embodiments in this specification are described in a progressive, parallel, or combined manner. Each embodiment focuses on the differences from other embodiments, and the same or similar parts between the embodiments can be referred to each other.

[0155] It should be noted that, in the description of this application, the accompanying drawings and embodiments are illustrative rather than restrictive. The same reference numerals throughout the embodiments identify the same structures. Additionally, for ease of understanding and description, the thicknesses of some layers, films, panels, regions, etc., may be exaggerated in the drawings. It is also understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, the element may be directly on the other element or there may be intermediate elements. Furthermore, "on" means positioning an element on or below another element, but does not inherently mean positioning it above another element according to the direction of gravity.

[0156] The terms "upper," "lower," "top," "bottom," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. When a component is considered to be "connected" to another component, it can be directly connected to the other component or there may be a component positioned centrally in the middle.

[0157] It should also be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that an article or apparatus comprising a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such an article or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the article or apparatus that includes the aforementioned element.

[0158] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A liquid crystal display device, characterized by comprising: The application relates to a liquid crystal display panel, comprising: a liquid crystal display panel, having a display area and a non-display area surrounding at least part of the display area; a plurality of pixel structures arranged in an array in the display area; a plurality of memory modules corresponding to the pixel structures one by one, the memory modules being arranged in the display area and used for storing identification information of the corresponding pixel structures; a control circuit arranged in the non-display area, during a display driving process of a current frame, the control circuit being used for obtaining the identification information of the pixel structures in a previous frame from the memory modules, performing overdrive compensation on initial data signals of the pixel structures in the current frame based on the identification information and the initial data signals, and controlling the pixel structures to display images based on the data signals after overdrive compensation; the identification information can represent the data signals of the pixel structures after overdrive compensation in the related frame; for any two pixel structures adjacent in a column direction, the control circuit is used for writing the identification information of the current frame into the memory module corresponding to a previous pixel structure in a scanning period of the previous pixel structure, and reading the identification information written into the memory module corresponding to a next pixel structure in a previous frame.

2. The liquid crystal display device according to claim 1, wherein the control circuit is connected with the memory modules through signal lines; the signal lines comprise first signal lines and second signal lines; for any two memory modules adjacent in the column direction, one memory module is connected with the first signal lines, and the other memory module is connected with the second signal lines.

3. The liquid crystal display device according to claim 1, wherein the memory modules in the same row are connected with the same clock signal line, and the memory modules in different rows are connected with different clock signal lines; the control circuit is connected with the memory modules through signal lines; the memory modules in the same column are connected with the same signal line, and the memory modules in different columns are connected with different signal lines; in the scanning period of the previous pixel structure, the clock signal line connected with the corresponding memory module is switched between high and low levels once, so that the control circuit can write the identification information of the current frame into the memory module corresponding to the previous pixel structure and read the identification information written into the memory module corresponding to the next pixel structure in the previous frame through the same signal line.

4. The liquid crystal display device according to claim 1, wherein the control circuit comprises: an identification module, which can read the identification information of the pixel structures in the previous frame from the memory modules and write the identification information of the pixel structures in the current frame into the memory modules; a compensation module, which can obtain the identification information of the pixel structures in the previous frame through the identification module, perform overdrive compensation on initial signals of the pixel structures in the current frame based on the identification information of the previous frame, and calculate the data signals of the pixel structures in the current frame after overdrive compensation.

5. The liquid crystal display device according to claim 4, wherein the identification information comprises first information, and the memory modules comprise first memory units used for storing the first information; the identification module comprises a first identification unit, which can read the first information of the pixel structures in the previous frame from the first memory units and write the first information of the pixel structures in the current frame into the first memory units; The first information represents whether the data signal of the pixel structure in a related frame is less than a first gray scale; The compensation module comprises a first compensation unit, the first compensation unit is capable of obtaining the first information of the pixel structure in a previous frame through the first identification unit, when the initial data signal of the pixel structure in a current frame is greater than the data signal after overdrive compensation of the previous frame, the first compensation unit is used for performing overdrive compensation based on the first information of the previous frame and the initial signal of the pixel structure in the current frame, and the data signal after overdrive compensation is not less than the initial data signal.

6. The liquid crystal display device according to claim 5, wherein If the data signal of the pixel structure in the previous frame after overdrive compensation is less than the first gray scale, and the initial data signal in the current frame is less than a first overdrive reference gray scale, the first compensation unit is used for taking the initial data signal of the pixel structure in the current frame as the data signal after overdrive compensation of the current frame; If the data signal displayed by the pixel structure in the previous frame is less than the first gray scale, and the initial data signal of the pixel structure in the current frame is not less than the first overdrive reference gray scale, the first compensation unit is used for performing overdrive compensation on the initial data signal based on the first gray scale interval in which the initial data signal of the current frame is located. The first overdrive reference gray scale is greater than the first gray scale; the first overdrive reference gray scale to 255 is divided into at least two non-overlapping first gray scale intervals, and different first gray scale intervals correspond to different overcompensation values.

7. The liquid crystal display device according to claim 4, wherein The identification information further comprises second information, and the memory module comprises a second memory unit for storing the second information; The identification module comprises a second identification unit, the second identification unit is capable of reading the second information of the pixel structure in the previous frame from the second memory unit, and is also capable of writing the second information of the pixel structure in the current frame into the second memory unit; The second information represents whether the data signal of the pixel structure in a related frame is greater than a second gray scale; The compensation module comprises a second compensation unit, the second compensation unit is capable of obtaining the second information of the pixel structure in a previous frame through the second identification unit, when the initial data signal of the pixel structure in a current frame is less than the data signal after overdrive compensation of the previous frame, the second compensation unit is used for performing overdrive compensation based on the second information of the previous frame and the initial signal of the pixel structure in the current frame, and the data signal after overdrive compensation is not greater than the initial data signal.

8. The liquid crystal display device according to claim 7, wherein If the data signal of the pixel structure in the previous frame after overdrive compensation is greater than the second gray scale, and the initial data signal in the current frame is greater than a second overdrive reference gray scale, the second compensation unit is used for taking the initial data signal of the pixel structure in the current frame as the data signal after overdrive compensation of the current frame; If the pixel structure in the previous frame of the data signal is greater than the second gray scale, and the initial data signal of the pixel structure in the current frame is not greater than the second overdrive reference gray scale, the second compensation unit is used to compensate the initial data signal based on the initial data signal of the second gray scale interval in the current frame. Wherein, the second overdrive reference gray scale is less than the second gray scale; 0 to the second overdrive reference gray scale is divided into at least two non-overlapping gray scale intervals, and different second gray scale intervals correspond to different over compensation values.

9. The liquid crystal display device according to claim 4, wherein The control circuit further comprises: a data buffer, the data buffer is used to obtain and store the initial data signal of the pixel structure in the current frame; a data latch, the data latch is used to obtain the overdrive compensation data signal from the compensation module; the identification module obtains the data signal after overdrive compensation in the current frame through the data latch to determine the identification information of the pixel structure in the current frame; an ADC module, the ADC module is used to obtain the data signal after overdrive compensation in the current frame from the data latch, and transmit the data signal after overdrive compensation to the pixel structure to control the pixel structure to display images.

10. The liquid crystal display device according to claim 9, wherein The same column of pixel structures are connected to the same ADC module, and different columns of pixel structures are connected to different ADC modules. The same column of pixel structures are connected to the same identification module, and different columns of pixel structures are connected to different identification modules. The same column of pixel structures are connected to the same compensation module, and different columns of pixel structures are connected to different compensation modules. The data latch has a plurality of data latch unit groups, and the same column of pixel structures are connected to the same data latch unit group, and different columns of pixel structures are connected to different data latch unit groups. The data buffer has a plurality of data buffer unit groups, and the same column of pixel structures are connected to the same data buffer unit group, and different columns of pixel structures are connected to different data buffer unit groups.

11. A display driving method of the liquid crystal display device according to any one of claims 1 to 10, characterized by, It comprises: In the display driving process of the current frame, the identification information of the pixel structure in the previous frame is obtained from the memory module; Based on the identification information and the initial data signal of the pixel structure in the current frame, the initial data signal is overdrive compensated; Based on the data signal after overdrive compensation, the pixel structure is controlled to display images; Wherein, the identification information of the pixel structure in the previous frame can represent the data signal after overdrive compensation of the pixel structure in the related frame; After obtaining the identification information of the pixel structure in the previous frame from the memory module in the display driving process of the current frame, it comprises: For two pixel structures adjacent in the column direction, in the scanning period of the previous pixel structure, the memory module corresponding to the previous pixel structure is written with the identification information of the current frame, and the memory module corresponding to the next pixel structure is read with the identification information written in the previous frame.

12. The display driving method according to claim 11, wherein The identification information includes first information, and the memory module includes a first memory unit for storing the first information; The first information represents whether the data signal of the pixel structure in a related frame is less than a first gray scale; The method for calculating the data signal after overdrive compensation in the current frame comprises: obtaining the first information of the pixel structure in the previous frame; when the initial data signal of the pixel structure in the current frame is greater than the data signal after overdrive compensation in the previous frame, performing overdrive compensation on the initial signal of the pixel structure in the current frame based on the first information of the previous frame, and the data signal after overdrive compensation is not less than the initial data signal.

13. The display driving method according to claim 12, wherein The method for calculating the data signal after overdrive compensation in the current frame comprises: if the data signal after overdrive compensation in the previous frame is less than the first gray scale, and the initial data signal of the current frame is less than a first overdrive reference gray scale, taking the initial data signal of the pixel structure in the current frame as the data signal after overdrive compensation in the current frame; if the data signal displayed by the pixel structure in the previous frame is greater than the second gray scale, and the initial data signal of the pixel structure in the current frame is not greater than a second overdrive reference gray scale, performing overdrive compensation on the initial data signal based on the second gray scale interval in which the initial data signal of the current frame is located. The first overdrive reference gray scale is greater than the first gray scale; the first overdrive reference gray scale to 255 is divided into at least two non-overlapping first gray scale intervals, and different first gray scale intervals correspond to different overdrive compensation values.

14. The display driving method according to claim 11, wherein The identification information further comprises second information, and the memory module comprises a second memory unit for storing the second information; The second information represents whether the data signal of the pixel structure in a related frame is greater than a second gray scale; The method for calculating the data signal after overdrive compensation in the current frame comprises: when the initial data signal of the pixel structure in the current frame is less than the data signal after overdrive compensation in the previous frame, obtaining the second information of the pixel structure in the previous frame; performing overdrive compensation on the initial signal of the pixel structure in the current frame based on the second information of the previous frame, and the data signal after overdrive compensation is not greater than the initial data signal.

15. The display driving method according to claim 14, wherein The method for calculating the data signal after overdrive compensation in the current frame comprises: if the data signal after overdrive compensation in the previous frame is greater than the second gray scale, and the initial data signal of the current frame is greater than a second overdrive reference gray scale, taking the initial data signal of the pixel structure in the current frame as the data signal after overdrive compensation in the current frame; if the data signal displayed by the pixel structure in the previous frame is greater than the second gray scale, and the initial data signal of the pixel structure in the current frame is not greater than the second overdrive reference gray scale, performing overdrive compensation on the initial data signal based on the second gray scale interval in which the initial data signal of the current frame is located. The second overdrive reference gray scale is less than the second gray scale; 0 to the second overdrive reference gray scale is divided into at least two non-overlapping gray scale intervals, and different second gray scale intervals correspond to different overdrive compensation values.

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