DMA data communication method and related equipment based on SPI interface

Abstract

The present invention relates to a DMA data communication method and related equipment based on an SPI interface, the method comprising: S11, a host generates a first request instruction and sends it to a corresponding slave, so that the slave receives the first request instruction while sending a first data packet, and completes the preparation of a second data packet according to the first request instruction; S12, the host generates a first flag instruction and sends it to the slave, and receives a second data packet sent by the slave while receiving the first flag instruction; S13, the host determines whether the first preset data segment in the received second data packet is a preset value, if so, executes step S14, otherwise executes step S11; S14, the host obtains the length of the target data according to the second preset data segment in the second data packet, and reads the third preset data segment in the second data packet according to the preset reading rule according to the length of the target data to obtain the final read data. The implementation of the present invention can reduce the risk of abnormal data transmission timing and ensure the overall data communication effect.

Description

Technical Field

[0001] The present invention relates to the field of communication technology, and more specifically, to a DMA data communication method based on an SPI interface and related equipment. Background Art

[0002] In some electronic devices, data communication is required between the main control such as MCU and the auxiliary module such as Bluetooth module. In the collaborative work of MCU and Bluetooth module, since the SPI bottom layer of MCU adopts single-byte transmission, while the SPI of Bluetooth module uses DMA transmission, this difference leads to timing mismatch when transmitting large amounts of data, which in turn causes timing confusion. Summary of the invention

[0003] The technical problem to be solved by the present invention is to provide a DMA data communication method based on an SPI interface and related equipment in view of the above-mentioned technical defects of the prior art.

[0004] The technical solution adopted by the present invention to solve the technical problem is: constructing a DMA data communication method based on an SPI interface, the method comprising:

[0005] S11, the host generates a first request instruction and sends it to the corresponding slave, so that the slave receives the first request instruction while sending a first data packet, and completes the preparation of a second data packet according to the first request instruction, wherein the second data packet contains target data;

[0006] S12, the host generates a first flag instruction and sends it to the slave, and receives the second data packet sent by the slave while receiving the first flag instruction;

[0007] S13, the host determines whether the first preset data segment in the received second data packet is a preset value, if so, executes step S14, otherwise executes step S11;

[0008] S14. The host obtains the length of the target data according to the second preset data segment in the second data packet, and reads the third preset data segment in the second data packet according to the length of the target data and a preset reading rule to obtain final read data.

[0009] Preferably, the data communication method of the present invention further includes:

[0010] S141. The host determines whether the value of the second preset data segment in the second data packet is valid. If so, execute step S11; otherwise, execute step S14.

[0011] Preferably, in the data communication method described in the present invention, the first preset data segment includes the second data segment of the second data packet, the second preset data segment includes the third data segment of the second data packet, and the third preset data segment includes all data segments after the third data segment of the second data packet.

[0012] Preferably, in the data communication method of the present invention, the first request instruction includes a first preset byte for indicating the slave and a second preset byte for providing a preset delay; and the second preset byte is after the first preset byte; the host generates a first request instruction and sends it to the corresponding slave, so that the slave completes the second data packet preparation according to the first request instruction, including:

[0013] The slave counts the clock signal while starting to receive the first preset byte, so as to confirm that the first request instruction is successfully received when the count reaches the target count value, so as to start generating the second data packet.

[0014] Preferably, the data communication method of the present invention further includes:

[0015] S121. The host determines whether the second data packet is received within a preset time period after issuing the first flag instruction. If so, execute step S13; otherwise, execute step S11.

[0016] The present invention also constructs a DMA data communication method based on an SPI interface, the method comprising:

[0017] S21, the host generates a second request instruction and sends it to the corresponding slave, so that the slave receives the second request instruction while sending the third data packet, enters a data receiving state when receiving the second request instruction, and generates a fourth data packet;

[0018] S22, the host generates a second flag instruction and sends it to the slave, and receives a fourth data packet sent by the slave while receiving the second flag instruction;

[0019] S23, the host determines whether the first preset data segment in the fourth data packet is a preset value, if so, executes step S24, otherwise executes step S21;

[0020] S24, the host sends the target data packet to the slave, so that the slave writes the target data packet according to a preset rule.

[0021] Preferably, the data communication method of the present invention further includes:

[0022] S221, the host determines whether the fourth data packet of the slave is received within a preset time period after sending the second flag instruction, if so, execute step S23, otherwise execute step S21.

[0023] Preferably, in the data communication method described in the present invention, the second request instruction includes a third preset byte for indicating the slave and a fourth preset byte for indicating a target length of the target data packet, and the fourth preset byte is after the third preset byte.

[0024] The present invention also constructs a DMA data communication method based on an SPI interface, the method comprising:

[0025] S31, the slave receives a first request instruction generated by the host while sending a first data packet, and generates a second data packet containing target data;

[0026] S32. The slave sends the second data packet to the host while receiving the first flag instruction generated by the host, so that when the host determines that the first preset data segment in the second data packet is a preset value, it obtains the length of the target data according to the second preset data segment in the second data packet, and reads the third preset data segment in the second data packet according to a preset rule to obtain the final read data.

[0027] Preferably, the first request instruction includes a first preset byte for indicating the slave and a second preset byte for providing a preset delay, wherein the second preset byte is after the first preset byte; when receiving the first request instruction generated by the host, the slave generates a second data packet containing target data, including:

[0028] The slave counts the clock signal while starting to receive the first preset byte, so as to confirm that the first request instruction is successfully received when the count reaches the target count value, and starts to generate the second data packet.

[0029] Preferably, in the data communication method of the present invention, the method further comprises:

[0030] When the slave receives the first request instruction generated by the host within a preset time period after sending the first data packet, step S31 is executed.

[0031] The present invention also constructs a DMA data communication method based on an SPI interface, the method comprising:

[0032] S41, the slave receives the second request instruction generated by the host while sending the third data packet and enters a data receiving state, and generates a fourth data packet;

[0033] S42, the slave receives the second request instruction generated by the host, and sends a fourth data packet to the host at the same time as the second request instruction, so that the host sends a target data packet to the slave according to the fourth data packet;

[0034] S43: The slave receives the target data packet while sending the fourth data packet, and obtains the target length of the target data packet according to the second request instruction, so as to complete the reception of the target data packet according to the target length.

[0035] Preferably, in the data communication method of the present invention, the second request instruction includes a third preset byte for indicating the slave and a fourth preset byte for indicating a target length of the target data packet;

[0036] The slave machine obtaining the target length of the target data packet according to the second request instruction includes: the slave machine obtaining the target length of the target data packet according to the fourth preset byte.

[0037] Preferably, in the data communication method of the present invention, the method further comprises:

[0038] When the slave receives the second request instruction generated by the host within a preset time period after sending the third data packet, step S41 is executed.

[0039] The present invention also constructs a communication system, including: a host and a slave that meet the SPI protocol, wherein:

[0040] The host is used to generate a first request instruction and send it to the corresponding slave, and the slave is used to receive the first request instruction while sending a first data packet, and complete the preparation of a second data packet according to the first request instruction, wherein the second data packet contains target data;

[0041] The host is further used to generate a first flag instruction and send it to the slave, and the slave is used to send the second data packet to the host while receiving the first flag instruction;

[0042] The host is also used to determine whether the first preset data segment in the received second data packet is a preset value, and when the judgment result is positive, obtain the length of the target data according to the second preset data segment in the second data packet, and read the third preset data segment in the second data packet according to the length of the target data according to the preset rule to obtain the final read data.

[0043] Preferably, in the communication system described in the present invention, the first preset data segment includes the second data segment of the second data packet, the second preset data segment includes the third data segment of the second data packet, and the third preset data segment includes all data segments after the third data segment of the second data packet.

[0044] The present invention also constructs a communication system, including: a host and a slave that meet the SPI protocol, wherein:

[0045] The host is used to generate a second request instruction and send it to the corresponding slave, and the slave is used to receive the second request instruction while sending the third data packet, and enter a data receiving state when receiving the second request instruction, and generate a fourth data packet;

[0046] The host is further used to generate a second flag instruction and send it to the slave, and the slave is used to send a fourth data packet while receiving the second flag instruction;

[0047] The host is further configured to determine whether the first preset data segment in the fourth data packet is a preset value, and when the determination result is positive, send the target data packet to the slave;

[0048] The slave is used to write the target data packet in sequence, obtain the actual length of the target data packet, and obtain the target length of the target data packet according to the second flag instruction.

[0049] The present invention also constructs an electronic device, comprising:

[0050] The processor is used to execute the computer program stored in the memory so that the electronic device executes the data communication method as described in any one of the above.

[0051] The DMA data communication method based on the SPI interface and the related equipment of the present invention have the following beneficial effects: the risk of abnormal data transmission timing can be reduced and the overall data communication effect can be ensured. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] The present invention will be further described below with reference to the accompanying drawings and embodiments, in which:

[0053] Figure 1 It is a program flow chart of an embodiment of a DMA data communication method based on an SPI interface of the present invention;

[0054] Figure 2 It is a program flow chart of another embodiment of the DMA data communication method based on the SPI interface of the present invention;

[0055] Figure 3It is a program flow chart of another embodiment of the DMA data communication method based on the SPI interface of the present invention;

[0056] Figure 4 It is a data schematic diagram of an embodiment of a DMA data communication method based on an SPI interface of the present invention;

[0057] Figure 5 It is a program flow chart of another embodiment of the DMA data communication method based on the SPI interface of the present invention;

[0058] Figure 6 It is a program flow chart of another embodiment of the DMA data communication method based on the SPI interface of the present invention;

[0059] Figure 7 It is a data schematic diagram of another embodiment of the DMA data communication method based on the SPI interface of the present invention;

[0060] Figure 8 It is a program flow chart of another embodiment of the DMA data communication method based on the SPI interface of the present invention;

[0061] Fig. 9 It is a program flow chart of another embodiment of the DMA data communication method based on the SPI interface of the present invention. DETAILED DESCRIPTION

[0062] In order to have a clearer understanding of the technical features, purposes and effects of the present invention, specific embodiments of the present invention are now described in detail with reference to the accompanying drawings.

[0063] like Figure 1 As shown, an embodiment of the DMA data communication method based on the SPI interface of the present invention is disclosed. Figure 1 In the embodiment of the DMA data communication method based on the SPI interface of the present invention shown, it is applied to a host, wherein the host may include an MCU module. The slave may be a Bluetooth module. The method is mainly used to implement the process of receiving data from the host. The method includes the following steps: S11, the host generates a first request instruction and sends it to the corresponding slave, so that the slave receives the first request instruction while sending the first data packet, and completes the preparation of the second data packet according to the first request instruction, wherein the second data packet contains the target data; S12, the host generates a first flag instruction and sends it to the slave, and receives the second data packet sent by the slave while receiving the first flag instruction; S13, the host determines whether the first preset data segment in the received second data packet is a preset value, if so, executes step S14, otherwise executes step S11; S14, the host obtains the length of the target data according to the second preset data segment in the second data packet, and reads the third preset data segment in the second data packet according to the preset reading rule according to the length of the target data to obtain the final read data.

[0064] Based on step S11, when the host needs to read the data of the slave, it generates a first request instruction and sends it to the slave. At this time, the slave also generates a first data packet and sends it to the host. Since the host cannot receive data when sending data, the slave can send and receive data at the same time. Therefore, the purpose of the slave sending the first data packet is to receive the data sent by the host while sending the first data packet, that is, the host uses the first request instruction to let the slave know that the host wants to read data. Therefore, a virtual bit without data is set in the first data packet generated by the slave so that when the slave receives the first request instruction of the host, the data sent does not need to be received by the host. Because the first request instruction has a certain length, the slave can complete the preparation of the second data packet during the process of the host sending the first request instruction. Specifically, the slave starts to prepare data when receiving the first request instruction, and completes the data preparation action when the host sends the first request instruction. The process of the slave preparing the second data packet can be understood as the process of the slave performing DMA data caching, that is, the slave can cache the second data packet to be sent to the host through the above process. The second data packet contains the target data required by the host. Among them, the slave generates an interrupt process when receiving the first request instruction to prepare data.

[0065] Based on step S12, step S13 and step S14, after the host sends the first request instruction, it will assume that the slave has cached the data packet to be sent to the host, that is, the second data packet, and then send the first flag instruction to the slave. After preparing the second data packet, the slave directly starts to send the second data packet to the host. It can be understood that the actions of the host sending the first request instruction and the first flag instruction can be triggered at the same time, and the first request instruction and the first flag instruction are sent in sequence. Since the slave will receive the first flag instruction sent by the host when sending the second data packet, and the host will not receive the data segment corresponding to the second data packet sent by the slave when sending the first identification instruction, therefore, the virtual bit without data is set in the second data packet generated by the slave so that when the slave receives the first flag instruction of the host, the data sent does not need to be received by the host.

[0066] After receiving the second data packet, the host reads the data of the first preset data segment received in the second data packet. When the data of the first preset data segment is the corresponding preset value, the second data packet is determined to be accurate. Then the host reads the data of the second preset data segment in the second data packet to obtain the length of the target data contained in the second data packet. According to the length of the target data, the third preset data segment of the second data packet is extracted to obtain the final read data, that is, the target data. Among them, when reading the data of the second data packet, the host can read based on a preset rule. For example, read sequentially, or read sequentially at preset intervals. Jump reading can also be performed at some times. After reading the data according to the set rule, the host fills the data bit as needed, and finally obtains the target data required by the host. To realize the data transmission process from the host to the slave. The data segment can be understood as containing one or more bytes or data bits.

[0067] Among them, when the host determines that the data of the first preset data segment in the second data packet is not the corresponding preset value, it can be determined that the slave has not completed the preparation of the second data packet. The host needs to resend the first request instruction and the first flag instruction to request data reading from the slave. The slave then sends an interrupt and re-sends the first data packet and prepares the second data packet according to the trigger. This is repeated until the host obtains the target data, and the host ends the data reading process after obtaining the target data. It can be understood that when the slave sends the second data packet to the host, when an interrupt occurs, the sending process of the second data packet will be terminated and directly adjusted to the sending process of the first data packet.

[0068] In one embodiment, if Figure 2As shown, based on the above process, the method of the present invention also includes: S141, the host determines whether the value of the second preset data segment in the second data packet is valid. If so, step S11 is executed, otherwise step S14 is executed. That is, after the host determines that the second data packet of the slave is ready, it is also necessary to judge the value of the second preset data segment to confirm whether the value of the second preset data segment is valid. Only when the value of the second preset data segment is valid, the length of the target data can be obtained through the value of the second preset data segment and the subsequent actions can be performed. When the value of the second preset data segment is invalid, it is determined that the second data packet of the slave is wrong to be prepared. At this time, the host needs to resend the first request instruction to request data reading from the slave, so that the slave sends the first data packet and prepares the second data packet according to the trigger. This is repeated until the host obtains the desired target data, and the data reading process ends after the target data is read. Among them, whether the value of the second preset data segment is valid can be determined in advance. The rule, in one embodiment, when the value of the second preset data segment is empty, the value of the second preset data segment is determined to be invalid. In one embodiment, when the value of the second preset data segment is too large or too small, that is, exceeds a certain range, the value of the second preset data segment can be determined to be invalid. In simple terms, if the data length value obtained based on the value of the second preset data segment obviously exceeds the normal data length range, the value of the second preset data segment can also be determined to be invalid.

[0069] In one embodiment, if Figure 3 As shown, based on the above process, the method of the present invention also includes: S121, the host determines whether the second data packet is received within the preset time length after issuing the first flag instruction. If so, execute step S13, otherwise, execute step S11. Usually, the host needs to receive the second data packet sent by the slave after issuing the first flag instruction. When the slave does not send the second data packet within the preset time length or the host does not receive the second data packet sent by the slave within the preset time length, it can be determined that the slave sends the second data packet abnormally, and the host needs to resend the first request instruction to request data reading from the slave, so that the slave sends the first data packet and prepares the second data packet according to the trigger. In one embodiment, the waiting time can be less than or equal to 8ms.

[0070] In one embodiment, the first request instruction includes a first preset byte for indicating the slave and a second preset byte for providing a preset delay, and the second preset byte is after the first preset byte; the host generates the first request instruction and sends it to the corresponding slave, so that the slave completes the preparation of the second data packet according to the first request instruction, including: the slave counts the clock signal while starting to receive the first preset byte, so as to confirm that the first request instruction is successfully received when the count is the target count value, so as to start generating the second data packet. Specifically, the host indicates to the corresponding slave through the first preset byte, and when the slave receives the first preset byte, the clock signal count starts, and when the count value is the target count value, it is determined that the first request instruction received by the host at this time is successful, and the second data packet is generated. It can be understood that the slave starts to prepare data after receiving the first preset byte, and the host generates the second preset byte at this time to provide time for the slave to prepare data through the length of the second preset byte. So that the slave completes the preparation of the entire second data packet before the host sends the second preset byte. The second preset byte can be understood as a set virtual byte, and its value is meaningless and is only used to realize the delay between useful data during data transmission. In one embodiment, the delay time achieved by the second preset byte is at the level of us. The preparation time corresponding to the second preset byte, that is, the preparation time given to the slave, is the second preset byte plus the slave response time. The target count value can be determined based on the number of clocks corresponding to one byte in the actual circuit. In one embodiment, the target count value is 8.

[0071] In one embodiment, the first preset data segment includes the second data segment of the second data packet, the second preset data segment includes the third data segment of the second data packet, and the third preset data segment includes all data segments after the third data segment of the second data packet. Figure 4As shown, when the host needs to read the data of the slave, it sends a first request instruction to the slave, wherein the first request instruction includes a first preset byte 0x82 and a second preset byte 0x00, the first preset byte 0x82 marks the MAC address of the slave that the host needs to read, and the second preset byte 0x00 is used for delay. While receiving the first preset byte 0x82 and the second preset byte 0x00, the slave will send the corresponding length of bytes 0X00 and 0X00, that is, the first data packet to the host. Because the host is sending data, it will not receive the first data packet. When the slave starts to receive 0x82, the clock count is performed, and the rising edge of the clock is counted through the clock interrupt of SPI. When the count is 8, the slave determines that the data has been received. According to the extracted 0x82 sent by the host, the slave DMA is interrupted, and the slave DMA prepares the data to be sent in advance. When the slave determines that 0x82 is obtained in the specified clock count, the data preparation can be completed within the time length corresponding to the second preset byte 0x00. That is, at this time, the slave has completed the data preparation from 0X00, 0XAA, 0X06 and thereafter, and the corresponding second data packet is generated. The host sends the first flag instruction 0xFE to the slave, and the slave DMA interrupt will also occur when the slave receives the first flag instruction, that is, the reception of the first flag instruction is completed within 8 clock counts. The slave determines whether it is the first flag instruction 0xFE. If not, the slave DMA task is interrupted, and the host resends the first request instruction. If the slave determines that the first flag instruction 0xFE has been received, it continues to send the second data packet. The host receives the second data packet at this time, which actually starts from the second data segment of the second data packet. The host determines whether the second data segment of the second data packet is 0xAA. If so, the value of the third data segment of the second data packet is obtained to obtain the length of the target data in the second data packet, and then the data is read in sequence, that is, the reading starts from the fourth data segment of the data packet, and the data of the corresponding length is read according to the length of the target data, and finally the data is read. In the process of counting the rising edge of the clock, when the count is less than 8 rising edges, the host will repeatedly send the first request instruction and receive the data again. If a timeout occurs, it will return to the rising edge of SPI_CLK and count again. In this way, the slave will be ready for data when the second preset byte 0x00 is sent.

[0072] like Figure 5 As shown, another embodiment of the DMA data communication method based on the SPI interface of the present invention is disclosed. Figure 5In the embodiment of the DMA data communication method based on the SPI interface of the present invention shown, it is applied to the host, wherein the host may include an MCU module. The slave may be a Bluetooth module. The method is mainly used to implement the process of the host writing data to the slave. The method includes the following steps: S21, the host generates a second request instruction and sends it to the corresponding slave, so that the slave receives the second request instruction while sending the third data packet, and enters the data receiving state when receiving the second request instruction, and generates a fourth data packet; S22, the host generates a second flag instruction and sends it to the slave, and receives the fourth data packet sent by the slave while receiving the second flag instruction; S23, the host determines whether the first preset data segment in the fourth data packet is a preset value, if so, execute step S24, otherwise execute step S21; S24, the host sends the target data packet to the slave, so that the slave writes the target data packet according to the preset rule. Wherein, the slave obtains the actual length of the target data packet during the data writing process, and obtains the target length of the target data packet according to the second request instruction to determine whether the target data packet is accurate, if not, execute step S21.

[0073] Based on step S21, when the host wants to write data to the slave, it first confirms the corresponding slave through the second request instruction. At this time, the slave is also sending the third data packet to the host. Since the host cannot receive data when sending data, the slave can send and receive data at the same time. Therefore, the purpose of the slave sending the third data packet is to receive the data sent by the host while sending the third data packet, that is, the host uses the second request instruction to the slave to let the slave know that the host wants to write data to the slave. Therefore, the virtual bit without data is set in the third data packet generated by the slave so that when the slave receives the second request instruction of the host, the data sent does not need to be received by the host. When the slave receives the second request instruction sent by the host, it enters the data receiving state, that is, it is in a state of preparing to receive the data sent by the host and write it. When the slave enters the data receiving state, it will prepare the fourth data packet, and the data receiving process will correspond to the fourth data packet.

[0074] Based on steps S22, S23 and S24, after sending the second request instruction to the slave, the host will then send the second flag instruction to the slave, and the slave will start sending the fourth data packet to the host after generating the fourth data packet. It can be understood that the actions of the host sending the second request instruction and the second flag instruction can be triggered at the same time, and the second request instruction and the second flag instruction are sent in sequence. Since the slave will receive the second flag instruction sent by the host at the same time when sending the fourth data packet, and the host will not receive the data segment corresponding to the fourth data packet sent by the slave when sending the second identification instruction, therefore, the virtual bit without data is set in the fourth data packet generated by the slave so that when the slave receives the second flag instruction of the host, the data sent does not need to be received by the host.

[0075] After receiving the fourth data packet from the slave, the host reads the data of the first preset data segment in the received fourth data packet. When the data of the first preset data segment is the corresponding preset value, it can be determined that the slave is ready to write data. At this time, the host can send the target data packet to the slave, and the slave writes the target data packet according to the preset rules while sending the fourth data packet. The process of writing by the slave can be carried out according to the preset rules, for example, it can be written in sequence, or it can be written in sequence according to the preset interval. The process of writing the target data packet by the slave can be that the slave caches or stores the data sent by the host. The slave can also obtain the target length of the target data packet to be transmitted by the host from the second request instruction, that is, the length of the data in the slave that the host intends to write. The final target data packet is obtained according to the length to complete the writing of the target data packet. In some cases, the slave counts the length of the written data while writing data to obtain the actual length of the target data packet. At the same time, the slave can compare the two lengths obtained to determine whether the data received by the slave is the target data packet, that is, to determine whether the obtained target data packet is accurate. That is, when the two lengths are the same, it can be determined that the obtained target data packet is accurate; otherwise, it is determined that the obtained target data packet is inaccurate. When the slave receives the data packet correctly, the host can end the data writing process of the slave. After the slave completes the data writing, the host reads and confirms the written data to finally confirm that the data written by the slave is correct.

[0076] In one embodiment, if Figure 6 As shown, based on Figure 5 Correspondingly, the method of the present invention also includes: S221, the host determines whether the fourth data packet of the slave is received within the preset time length after sending the second flag instruction. If so, step S23 is executed, otherwise step S21 is executed. Usually, the host needs to wait for the fourth data packet of the slave after sending the second flag instruction. If the slave does not send the fourth data packet within the preset time length or the host does not receive the fourth data packet of the slave within the preset time length, it can be determined that the slave is abnormal. At this time, the host needs to resend the second request instruction to request data writing to the slave, so that the slave sends the third data packet according to the trigger and prepares for data writing. In one embodiment, the waiting time can be less than or equal to 8ms.

[0077] Optionally, the second request instruction includes a third preset byte for indicating the slave and a fourth preset byte for indicating the target length of the target data packet, and the fourth preset byte is after the third preset byte. Figure 7As shown, when the host needs to write data to the slave, it sends a second request instruction to the slave, wherein the second request instruction includes a third preset byte, i.e., 0x02, marking the MAC address of the slave that the host needs to write, and a fourth preset byte, i.e., 0x06, marking the length of the data to be written. After sending the second request instruction, the host sends a second flag instruction, i.e., 0xFE, to the slave. When the fourth data packet generated by the slave is received within the specified time and 0xAA is obtained, the host starts to write data to the slave. When the slave receives the second flag instruction, a slave DMA interrupt will also occur, i.e., the reception of the second flag instruction is completed within 8 clock counts.

[0078] like Figure 8 As shown, another embodiment of the DMA data communication method based on the SPI interface of the present invention is disclosed. Figure 8 In the embodiment of the DMA data communication method based on the SPI interface of the present invention shown, it is applied to the slave, wherein the host may include an MCU module. The slave may be a Bluetooth module. The method is mainly used to implement the process of the host and the slave reading data. The method includes the following steps: S31, the slave receives the first request instruction generated by the host while sending the first data packet, and generates a second data packet containing the target data; S32, the slave sends the second data packet to the host while receiving the first flag instruction generated by the host, so that when the host determines that the first preset data segment in the second data packet is a preset value, according to the second preset data segment in the second data packet, the length of the target data is obtained, and the third preset data segment in the second data packet is read according to the preset rule to obtain the final read data. That is, when the host needs to read the data of the slave, by generating a first request instruction and sending it to the slave, at this time, the slave also generates a first data packet and sends it to the host. Since the host cannot receive data when sending data, the slave can send and receive data at the same time. Therefore, the purpose of the slave sending the first data packet is to receive the data sent by the host while sending the first data packet, that is, the host uses the first request instruction to let the slave know that the host wants to perform the operation of reading data. Because the first request instruction has a certain length, the slave can complete the preparation of the second data packet during the process of the host sending the first request instruction. Specifically, the slave starts to prepare data when receiving the first request instruction, and completes the data preparation action when the host sends the first request instruction. The process of the slave preparing the second data packet can be understood as the process of the slave performing DMA data caching, that is, the slave can cache the second data packet to be sent to the host through the above process. The second data packet contains the target data required by the host. When receiving the first request instruction, the slave will generate an interrupt process to prepare data.

[0079] After the host sends the first request instruction, it will assume that the slave has cached the data packet to be sent to the host, namely the second data packet, and then send the first flag instruction to the slave. After preparing the second data packet, the slave directly starts to send the second data packet to the host. It can be understood that the actions of the host sending the first request instruction and the first flag instruction can be triggered at the same time, and the first request instruction and the first flag instruction are sent in sequence. Since the slave will receive the first flag instruction sent by the host when sending the second data packet, and the host will not receive the data segment corresponding to the second data packet sent by the slave when sending the first identification instruction, therefore, the virtual bit without data is set in the second data packet generated by the slave so that when the slave receives the first flag instruction of the host, the data sent does not need to be received by the host.

[0080] After receiving the second data packet, the host reads the data of the first preset data segment received in the second data packet. When the data of the first preset data segment is the corresponding preset value, the second data packet is determined to be accurate. Then the host obtains the data of the second preset data segment read in the second data packet to obtain the length of the target data contained in the second data packet. According to the length of the target data, the third preset data segment of the second data packet is extracted to obtain the final read data, that is, the target data. Among them, when reading the data of the second data packet, the host can read based on a preset rule. For example, read sequentially, or read sequentially at preset intervals. Jump reading can also be performed at some times. After reading the data according to the set rule, the host fills the data bit as needed, and finally obtains the target data required by the host. To realize the data transmission process from the host to the slave. The data segment can be understood as containing one or more bytes or data bits.

[0081] Optionally, the first request instruction includes a first preset byte for indicating the slave and a second preset byte for providing a preset delay, wherein the second preset byte is after the first preset byte; the slave generates a second data packet containing target data when receiving the first request instruction generated by the host, including: the slave counts the clock signal while starting to receive the first preset byte, so as to confirm that the first request instruction is successfully received when the count is the target count value, and starts to generate the second data packet. The host indicates to the corresponding slave through the first preset byte, and starts counting the clock signal when the slave receives the first preset byte, and determines that the first request instruction of the host received at this time is successful when the count value is the target count value, and starts to generate the second data packet. It can be understood that the slave starts to prepare data after receiving the first preset byte, and the host generates the second preset byte at this time to provide time for the slave to prepare data through the length of the second preset byte. So that the slave completes the preparation of the entire second data packet before the host sends the second preset byte.

[0082] In one embodiment, the method of the present invention further includes: when the slave receives the first request instruction generated by the host within a preset time after sending the first data packet, step S31 is executed. That is, the slave keeps sending the first data packet, such as 0X00, 0X00, and waits for a preset time after sending the first data packet to confirm whether the first request instruction generated by the host is received. When the first request instruction is received, step S31 and subsequent actions are executed. In one embodiment, the preset time is less than or equal to 100ms.

[0083] like Fig. 9 As shown, another embodiment of the DMA data communication method based on the SPI interface of the present invention is disclosed. Fig. 9 In the embodiment of the DMA data communication method based on the SPI interface of the present invention shown, it is applied to a slave, wherein the host may include an MCU module. The slave may be a Bluetooth module. The method is mainly used to implement the process of the host writing data to the slave. The method includes the following steps: S41, the slave receives the second request instruction generated by the host while sending the third data packet and enters the data receiving state, and generates a fourth data packet; S42, the slave receives the second request instruction generated by the host, and sends the fourth data packet to the host at the same time as the second request instruction, so that the host sends the target data packet to the slave according to the fourth data packet; S43, the slave receives the target data packet while sending the fourth data packet, and obtains the target length of the target data packet according to the second request instruction, so as to complete the reception of the target data packet according to the target length.

[0084] Specifically, when the host wants to write data to the slave, it first confirms the corresponding slave through the second request instruction. At this time, the slave is also generating a third data packet and sending it to the host. Since the host cannot receive data when sending data, the slave can send and receive data at the same time. Therefore, the purpose of the slave sending the third data packet is to receive the data sent by the host while sending the third data packet, that is, the host instructs the slave through the second request instruction so that the slave knows that the host wants to write data to the slave. When the slave receives the second request instruction sent by the host, it enters the data receiving state, that is, it is in a state of preparing to receive the data sent by the host and write it. When the slave enters the data receiving state, it will prepare the fourth data packet, and the data receiving process corresponds to the fourth data packet.

[0085] After the host sends the second request instruction to the slave, it will then send the second flag instruction to the slave, and the slave will start sending the fourth data packet to the host after generating the fourth data packet. It can be understood that the actions of the host sending the second request instruction and the second flag instruction can be triggered at the same time, and the second request instruction and the second flag instruction are sent in sequence. Since the slave will receive the second flag instruction sent by the host at the same time when sending the fourth data packet, and the host will not receive the data segment corresponding to the fourth data packet sent by the slave when sending the second identification instruction, therefore, the virtual bit without data is set in the fourth data packet generated by the slave so that when the slave receives the second flag instruction of the host, the data sent does not need to be received by the host.

[0086] After receiving the fourth data packet from the slave, the host reads the data of the first preset data segment in the received fourth data packet. When the data of the first preset data segment is the corresponding preset value, it can be determined that the slave is ready to write data. At this time, the host can send the target data packet to the slave, and the slave writes the target data packet according to the preset rules while sending the fourth data packet. The process of writing by the slave can be carried out according to the preset rules, for example, it can be written in sequence, or it can be written in sequence according to the preset interval. The process of writing the target data packet by the slave can be that the slave caches or stores the data sent by the host. The slave can also obtain the target length of the target data packet to be transmitted by the host from the second request instruction, that is, the length of the data that the host will write into the slave. The final target data packet is obtained according to the length. In some cases, the slave counts the length of the written data while writing data to obtain the actual length of the target data packet. At the same time, the slave can compare the two lengths obtained to determine whether the data received by the slave is the target data packet, that is, to determine whether the obtained target data packet is accurate. That is, when the two lengths are the same, it can be determined that the obtained target data packet is accurate; otherwise, it is determined that the obtained target data packet is inaccurate. When the slave obtains the data packet accurately, the data writing process of the host to the slave can be ended. After the slave has completed writing data, the host reads and confirms the written data to finally confirm that the data written by the slave is accurate.

[0087] Optionally, the second request instruction includes a third preset byte for indicating the slave and a fourth preset byte for indicating the target length of the target data packet; the slave obtains the target length of the target data packet according to the second request instruction, including the slave obtaining the target length of the target data packet according to the third preset byte. Figure 7As shown, when the host needs to write data to the slave, it sends a second request instruction to the slave, wherein the second request instruction includes a third preset byte, i.e., 0x02, marking the MAC address of the slave that the host needs to write, and a fourth preset byte, i.e., 0x06, marking the length of the data to be written. When the slave receives the third preset byte 0x02 and the fourth preset byte 0x06, it will send bytes 0X00 and 0X00 of corresponding length, i.e., a third data packet, to the host. Since the host is sending data, it will not receive the third data packet. After sending the second request instruction, the host sends a second flag instruction, i.e., 0xFE, to the slave, and at the same time receives the fourth data packet generated by the slave and confirms that 0xAA is obtained, and then starts to write data to the slave. When the slave receives the second flag instruction, a slave DMA interrupt will also occur, i.e., the reception of the second flag instruction is completed within 8 clock counts.

[0088] In one embodiment, the method of the present invention further includes: when the slave receives the second request instruction generated by the host within a preset time after sending the third data packet, step S41 is executed. That is, the slave keeps sending the third data packet, such as 0X00, 0X00, and waits for a preset time after sending the third data packet to confirm whether the second request instruction generated by the host is received. When the second request instruction is received, step S41 and subsequent actions are executed. In one embodiment, the preset time is less than or equal to 100ms.

[0089] In addition, a communication system of the present invention includes: a host and a slave that meet the SPI protocol, wherein the host is used to generate a first request instruction and send it to the corresponding slave, and the slave is used to receive the first request instruction while sending the first data packet, and complete the preparation of the second data packet according to the first request instruction, wherein the second data packet contains target data; the host is also used to generate a first flag instruction and send it to the slave, and the slave is used to send the second data packet to the host while receiving the first flag instruction; the host is also used to determine whether the first preset data segment in the received second data packet is a preset value, and when the judgment result is a positive result, obtain the length of the target data according to the second preset data segment in the second data packet, and read the third preset data segment in the second data packet according to the preset rule according to the length of the target data to obtain the final read data.

[0090] When the host needs to read the data of the slave, it generates a first request instruction and sends it to the slave. At this time, the slave also generates a first data packet and sends it to the host. Since the host cannot receive data when sending data, the slave can send and receive data at the same time. Therefore, the purpose of the slave sending the first data packet is to receive the data sent by the host while sending the first data packet, that is, the host uses the first request instruction to let the slave know that the host wants to read data. Therefore, a virtual bit without data is set in the first data packet generated by the slave so that when the slave receives the first request instruction of the host, the data sent does not need to be received by the host. Because the first request instruction has a certain length, the slave can complete the preparation of the second data packet during the process of the host sending the first request instruction. Specifically, the slave starts to prepare data when receiving the first request instruction, and completes the data preparation action when the host sends the first request instruction. The process of the slave preparing the second data packet can be understood as the process of the slave performing DMA data caching, that is, the slave can cache the second data packet to be sent to the host through the above process. The second data packet contains the target data required by the host. Among them, the slave generates an interrupt process when receiving the first request instruction to prepare data.

[0091] After the host sends the first request instruction, it will assume that the slave has cached the data packet to be sent to the host, namely the second data packet, and then send the first flag instruction to the slave. After preparing the second data packet, the slave directly starts to send the second data packet to the host. It can be understood that the actions of the host sending the first request instruction and the first flag instruction can be triggered at the same time, and the first request instruction and the first flag instruction are sent in sequence. Since the slave will receive the first flag instruction sent by the host when sending the second data packet, and the host will not receive the data segment corresponding to the second data packet sent by the slave when sending the first identification instruction, therefore, the virtual bit without data is set in the second data packet generated by the slave so that when the slave receives the first flag instruction of the host, the data sent does not need to be received by the host.

[0092] After receiving the second data packet, the host reads the data of the first preset data segment received in the second data packet. When the data of the first preset data segment is the corresponding preset value, the second data packet is determined to be accurate. Then the host obtains the data of the second preset data segment read in the second data packet to obtain the length of the target data contained in the second data packet. According to the length of the target data, the third preset data segment of the second data packet is extracted to obtain the final read data, that is, the target data. Among them, when reading the data of the second data packet, the host can read based on a preset rule. For example, read sequentially, or read sequentially at preset intervals. Jump reading can also be performed at some times. After reading the data according to the set rule, the host fills the data bit as needed, and finally obtains the target data required by the host. To realize the data transmission process from the host to the slave. The data segment can be understood as containing one or more bytes or data bits.

[0093] Among them, when the host determines that the data of the first preset data segment in the second data packet is not the corresponding preset value, it can be determined that the slave has not completed the preparation of the second data packet. The host needs to resend the first request instruction and the first flag instruction to request data reading from the slave. The slave then sends an interrupt and re-sends the first data packet and prepares the second data packet according to the trigger. This is repeated until the host obtains the target data, and the host ends the data reading process after obtaining the target data. It can be understood that when the slave sends the second data packet to the host, when an interrupt occurs, the sending process of the second data packet will be terminated and directly adjusted to the sending process of the first data packet.

[0094] In one embodiment, the first preset data segment includes the second data segment of the second data packet, the second preset data segment includes the third data segment of the second data packet, and the third preset data segment includes all data segments after the third data segment of the second data packet. Figure 4As shown, when the host needs to read the data of the slave, it sends a first request instruction to the slave, wherein the first request instruction includes a first preset byte 0x82 and a second preset byte 0x00, the first preset byte 0x82 marks the MAC address of the slave that the host needs to read, and the second preset byte 0x00 is used for delay. While receiving the first preset byte 0x82 and the second preset byte 0x00, the slave will send the bytes 0X00 and 0X00 of the corresponding length, i.e., the first data packet, to the host. Because the host is sending data, it will not receive the first data packet. That is, when the slave starts to receive 0x82, the clock count is performed, and the rising edge of the clock is counted through the clock interrupt of the SPI. When the count is 8, the slave determines that the data has been received, and according to the extracted 0x82 sent by the host, the slave DMA is interrupted, and the slave DMA prepares the data to be sent in advance. When the slave determines that 0x82 is obtained in the specified clock count, the data preparation can be completed within the time length corresponding to the second preset byte 0x00. That is, at this time, the slave has completed the data preparation from 0X00, 0XAA, 0X06 and thereafter, and the corresponding second data packet is generated. The host sends the first flag instruction 0xFE to the slave, and the slave DMA interrupt will also occur when the slave receives the first flag instruction, that is, the reception of the first flag instruction is completed within 8 clock counts. The slave determines whether it is the first flag instruction 0xFE. If not, the slave DMA task is interrupted, and the host resends the first request instruction. If the slave determines that the first flag instruction 0xFE has been received, it continues to send the second data packet. The host receives the second data packet at this time, which actually starts from the second data segment of the second data packet. The host determines whether the second data segment of the second data packet is 0xAA. If so, the value of the third data segment of the second data packet is obtained to obtain the length of the target data in the second data packet, and then the data is read in sequence, that is, the reading starts from the fourth data segment of the data packet, and the data of the corresponding length is read according to the length of the target data, and finally the data is read.

[0095] In addition, a communication system of the present invention includes: a host and a slave that meet the SPI protocol, wherein the host is used to generate a second request instruction and send it to the corresponding slave, and the slave is used to receive the second request instruction while sending a third data packet, and enter a data receiving state when receiving the second request instruction, and generate a fourth data packet; the host is also used to generate a second flag instruction and send it to the slave, and the slave is used to send a fourth data packet while receiving the second flag instruction; the host is also used to determine whether the first preset data segment in the fourth data packet is a preset value, and when the determination result is a positive result, send a target data packet to the slave; the slave is used to write the target data packet in sequence, and obtain the actual length of the target data packet, and obtain the target length of the target data packet according to the second flag instruction.

[0096] When the host wants to write data to the slave, it first confirms the corresponding slave through the second request instruction. At this time, the slave is also sending the third data packet to the host. Since the host cannot receive data when sending data, the slave can send and receive data at the same time. Therefore, the purpose of the slave sending the third data packet is to receive the data sent by the host while sending the third data packet, that is, the host uses the second request instruction to let the slave know that the host wants to write data to the slave. Therefore, the virtual bit without data is set in the third data packet generated by the slave so that when the slave receives the second request instruction of the host, the data sent does not need to be received by the host. When the slave receives the second request instruction sent by the host, it enters the data receiving state, that is, it is in the state of preparing to receive the data sent by the host and write it. When the slave enters the data receiving state, it will prepare the fourth data packet, and the fourth data packet corresponds to the data receiving process.

[0097] After the host sends the second request instruction to the slave, it will then send the second flag instruction to the slave, and the slave will start sending the fourth data packet to the host after generating the fourth data packet. It can be understood that the actions of the host sending the second request instruction and the second flag instruction can be triggered at the same time, and the second request instruction and the second flag instruction are sent in sequence. Since the slave will receive the second flag instruction sent by the host at the same time when sending the fourth data packet, and the host will not receive the data segment corresponding to the fourth data packet sent by the slave when sending the second identification instruction, therefore, the virtual bit without data is set in the fourth data packet generated by the slave so that when the slave receives the second flag instruction of the host, the data sent does not need to be received by the host.

[0098] After receiving the fourth data packet from the slave, the host reads the data of the first preset data segment in the received fourth data packet. When the data of the first preset data segment is the corresponding preset value, it can be determined that the slave is ready to write data. At this time, the host can send the target data packet to the slave, and the slave writes the target data packet according to the preset rules while sending the fourth data packet. The process of writing by the slave can be carried out according to the preset rules, for example, it can be written in sequence, or it can be written in sequence according to the preset interval. The process of writing the target data packet by the slave can be that the slave caches or stores the data sent by the host. The slave can also obtain the target length of the target data packet to be transmitted by the host from the second request instruction, that is, the length of the data in the slave that the host intends to write. The final target data packet is obtained according to the length. In some cases, the slave counts the length of the written data while writing data to obtain the actual length of the target data packet. At the same time, the slave can compare the two lengths obtained to determine whether the data received by the slave is the target data packet, that is, to determine whether the obtained target data packet is accurate, that is, when the two lengths are the same, it can be determined that the obtained target data packet is accurate; otherwise, it is determined that the obtained target data packet is inaccurate. When the slave obtains the data packet accurately, the data writing process of the host to the slave can be ended. After the slave has completed writing data, the host reads and confirms the written data to finally confirm that the data written by the slave is accurate.

[0099] In addition, an electronic device of the present invention includes: a processor for executing a computer program stored in a memory so that the electronic device performs the DMA data communication method based on the SPI interface as described above, that is, in the electronic device, one or both of the host and the slave can be set to implement the corresponding method process above.

[0100] It can be understood that the above embodiments only express the preferred implementation modes of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the patent scope of the present invention. It should be pointed out that, for ordinary technicians in this field, the above technical features can be freely combined without departing from the concept of the present invention, and several deformations and improvements can be made, which all belong to the protection scope of the present invention. Therefore, all equivalent changes and modifications made to the scope of the claims of the present invention should belong to the coverage of the claims of the present invention.

Claims

1. A DMA data communication method based on SPI interface, characterized in that: The method comprises: S11, the host generates a first request instruction and sends it to the corresponding slave, so that the slave receives the first request instruction while sending a first data packet, and completes the preparation of a second data packet according to the first request instruction, wherein the second data packet contains target data; wherein the host cannot receive data when sending data, and the slave can send and receive data at the same time; the first data packet includes a virtual bit without data, so that when the slave receives the first request instruction, the host does not receive the first data packet; and the slave starts to prepare the second data packet when receiving the first request instruction, and ends the preparation of the second data packet when the host finishes sending the first request instruction; S12, the host generates a first flag instruction and sends it to the slave, and receives the second data packet sent by the slave while receiving the first flag instruction; S13, the host determines whether the first preset data segment in the received second data packet is a preset value, if so, executes step S14, otherwise executes step S11; S14, the host obtains the length of the target data according to the second preset data segment in the second data packet, and reads the third preset data segment in the second data packet according to the length of the target data and a preset reading rule to obtain final read data; The first request instruction includes a first preset byte for indicating the slave and a second preset byte for providing a preset delay; and the second preset byte is after the first preset byte; the host generates a first request instruction and sends it to the corresponding slave, so that the slave completes the second data packet preparation according to the first request instruction, including: The slave counts the clock signal while starting to receive the first preset byte, so as to confirm that the first request instruction is successfully received when the count reaches the target count value, so as to start generating the second data packet.

2. The data communication method according to claim 1, characterized in that: The method further comprises: S141. The host determines whether the value of the second preset data segment in the second data packet is valid. If so, execute step S11; otherwise, execute step S14.

3. The data communication method according to claim 1, characterized in that: The first preset data segment includes the second data segment of the second data packet, the second preset data segment includes the third data segment of the second data packet, and the third preset data segment includes all data segments after the third data segment of the second data packet.

4. The data communication method according to claim 1, characterized in that: The method further comprises: S121. The host determines whether the second data packet is received within a preset time period after issuing the first flag instruction. If so, execute step S13; otherwise, execute step S11.

5. A DMA data communication method based on SPI interface, characterized in that: The method comprises: S21, the host generates a second request instruction and sends it to the corresponding slave, so that the slave receives the second request instruction while sending the third data packet, enters the data receiving state when receiving the second request instruction, and generates a fourth data packet; wherein the host cannot receive data when sending data, and the slave can send and receive data at the same time; the third data packet includes a virtual bit without data, so that when the slave receives the second request instruction, the host does not receive the third data packet; S22, the host generates a second flag instruction and sends it to the slave, and receives a fourth data packet sent by the slave while receiving the second flag instruction; a virtual bit without data is set in the fourth data packet generated by the slave so that when the slave receives the second flag instruction of the host, the data sent does not need to be received by the host; S23, the host determines whether the first preset data segment in the fourth data packet is a preset value, if so, executes step S24, otherwise executes step S21; S24, the host sends the target data packet to the slave, so that the slave writes the target data packet according to a preset rule.

6. The data communication method according to claim 5, characterized in that: The method further comprises: S221, the host determines whether the fourth data packet of the slave is received within a preset time period after sending the second flag instruction, if so, execute step S23, otherwise execute step S21.

7. The data communication method according to claim 5, characterized in that: The second request instruction includes a third preset byte for indicating the slave and a fourth preset byte for indicating a target length of the target data packet, and the fourth preset byte is after the third preset byte.

8. A DMA data communication method based on SPI interface, characterized in that: The method comprises: S31, the slave receives a first request instruction generated by the host while sending a first data packet, and generates a second data packet containing target data; wherein the host cannot receive data when sending data, and the slave can send and receive data at the same time; the first data packet includes a virtual bit without data, so that when the slave receives the first request instruction, the host does not receive the first data packet; and the slave starts to prepare the second data packet when receiving the first request instruction, and ends the preparation of the second data packet when the host finishes sending the first request instruction; S32, the slave sends the second data packet to the host while receiving the first flag instruction generated by the host, so that when the host determines that the first preset data segment in the second data packet is a preset value, the host obtains the length of the target data according to the second preset data segment in the second data packet, and reads the third preset data segment in the second data packet according to a preset rule to obtain the final read data; The first request instruction includes a first preset byte for indicating the slave and a second preset byte for providing a preset delay, wherein the second preset byte is after the first preset byte; the slave generates a second data packet containing target data when receiving the first request instruction generated by the host, including: The slave counts the clock signal while starting to receive the first preset byte, so as to confirm that the first request instruction is successfully received when the count reaches the target count value, and starts to generate the second data packet.

9. The data communication method according to claim 8, characterized in that: The method further comprises: When the slave receives the first request instruction generated by the host within a preset time period after sending the first data packet, step S31 is executed.

10. A DMA data communication method based on SPI interface, characterized in that: The method comprises: S41, the slave receives the second request instruction generated by the host while sending the third data packet and enters the data receiving state, and generates a fourth data packet; wherein the host cannot receive data when sending data, and the slave can send and receive data at the same time; the third data packet includes a virtual bit without data, so that when the slave receives the second request instruction, the host does not receive the third data packet; S42, the slave receives the second request instruction generated by the host, and sends a fourth data packet to the host at the same time as the second request instruction, so that the host sends a target data packet to the slave according to the fourth data packet; S43: The slave receives the target data packet while sending the fourth data packet, and obtains the target length of the target data packet according to the second request instruction, so as to complete the reception of the target data packet according to the target length.

11. The data communication method according to claim 10, characterized in that: The second request instruction includes a third preset byte for indicating the slave and a fourth preset byte for indicating a target length of the target data packet; The slave machine obtaining the target length of the target data packet according to the second request instruction includes: the slave machine obtaining the target length of the target data packet according to the fourth preset byte; or The method further comprises: When the slave receives the second request instruction generated by the host within a preset time period after sending the third data packet, step S41 is executed.

12. A communication system, characterized in that: include: The master and slave devices that meet the SPI protocol, The host is used to generate a first request instruction and send it to the corresponding slave, the slave is used to receive the first request instruction while sending a first data packet, and complete the preparation of a second data packet according to the first request instruction, wherein the second data packet contains target data; wherein the host cannot receive data when sending data, and the slave can send and receive data at the same time; the first data packet includes a virtual bit without data, so that when the slave receives the first request instruction, the host does not receive the first data packet; and the slave starts to prepare the second data packet when receiving the first request instruction, and ends the preparation of the second data packet when the host finishes sending the first request instruction; The host is further used to generate a first flag instruction and send it to the slave, and the slave is used to send the second data packet to the host while receiving the first flag instruction; The host is further configured to determine whether the first preset data segment in the received second data packet is a preset value, and when the determination result is positive, obtain the length of the target data according to the second preset data segment in the second data packet, and read the third preset data segment in the second data packet according to a preset rule according to the length of the target data to obtain the final read data; The first request instruction includes a first preset byte for indicating the slave and a second preset byte for providing a preset delay; and the second preset byte is after the first preset byte; the host generates a first request instruction and sends it to the corresponding slave, so that the slave completes the second data packet preparation according to the first request instruction, including: The slave counts the clock signal while starting to receive the first preset byte, so as to confirm that the first request instruction is successfully received when the count reaches the target count value, so as to start generating the second data packet.

13. The communication system according to claim 12, characterized in that: The first preset data segment includes the second data segment of the second data packet, the second preset data segment includes the third data segment of the second data packet, and the third preset data segment includes all data segments after the third data segment of the second data packet.

14. A communication system, characterized in that: include: The master and slave devices that meet the SPI protocol, The host is used to generate a second request instruction and send it to the corresponding slave, the slave is used to receive the second request instruction while sending the third data packet, and enter the data receiving state when receiving the second request instruction, and generate a fourth data packet; wherein the host cannot receive data when sending data, and the slave can send and receive data at the same time; the third data packet includes a virtual bit without data, so that when the slave receives the second request instruction, the host does not receive the third data packet; The host is further configured to generate a second flag instruction and send it to the slave, and the slave is configured to send a fourth data packet while receiving the second flag instruction; wherein a virtual bit without data is set in the fourth data packet generated by the slave so that when the slave receives the second flag instruction of the host, the data sent does not need to be received by the host; The host is further configured to determine whether the first preset data segment in the fourth data packet is a preset value, and when the determination result is positive, send the target data packet to the slave; The slave is used to write the target data packet in sequence, obtain the actual length of the target data packet, and obtain the target length of the target data packet according to the second request instruction.

15. An electronic device, characterized in that: include: A processor, configured to execute a computer program stored in a memory so that the electronic device performs the method as claimed in any one of claims 1 to 7, or so that the electronic device performs the method as claimed in any one of claims 8 to 11.

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