11948results about "Electric digital data processing" patented technology

A pattern which does not appear at a flat portion in normal binarization processing is set as a code pattern, and a code formed from this pattern is attached. At this time, code attachment with little degradation in image quality is implemented by selecting an unnoticeable pattern.

The invention relates to the technical field of data processing, in particular to a storage and calculation integrated parallel processing system and method. The method comprises the following steps of obtaining original stored data and performing topological skeleton projection, generating a projection skeleton structure to realize characteristic hierarchical integration, determining a weight relation matrix based on multi-scale space fusion data, realizing matching of a memory and a calculation unit through gradient optimization adjustment, and obtaining a multi-scale space fusion matrix. And the mining storage and calculation unit activates the chain type interaction relationship of the mapping data and performs recursive self-calibration, generates self-calibration update data, predicts a heterogeneous access channel and reconstructs a data access link, and finally performs task recombination and pipeline scheduling and eliminates parallel conflicts, thereby obtaining an efficient parallel processing result. According to the method, high efficiency and intelligentization of storage and calculation are realized, and reliable support is provided for execution of complex calculation tasks.

The invention relates to the technical field of pollutant tracing, and discloses a method and a system for tracing new pollutants in various environmental media based on machine learning. The method comprises the following steps: collecting multivariate environment data to construct a pollutant fingerprint database; performing space-time correlation analysis on the fingerprint database and the environment data, and reconstructing a transmission path; converting the data, the fingerprint database and the path diagram into source node fusion to construct an analytical model, and forming a contribution rate matrix; and positioning the pollution source through the three-dimensional features based on the matrix. According to the method and the device, an intelligent decision-making system based on machine learning can be constructed by integrating multi-source heterogeneous data under a complex environment background, automatic, standardized and precise traceability of new pollutants is realized, and the traceability efficiency and accuracy are improved.

The invention belongs to the technical field of artificial intelligence chip acceleration, and provides an acceleration method for an expert hybrid model to execute an operation task and related equipment. The method comprises the steps that a to-be-processed operation task is acquired, a target expert network used for executing the to-be-processed operation task in an expert hybrid model is determined, and network parameters of all first expert networks in the expert hybrid model are stored in an on-chip memory of an accelerator chip, network parameters of each second expert network in the expert hybrid model are stored in an off-chip memory of the accelerator chip; calling a first network parameter of a first expert network in the target expert network from the on-chip memory, and calling a second network parameter of a second expert network in the target expert network from the off-chip memory; and executing the to-be-processed operation task through a target expert network in the expert hybrid model based on the first network parameter and the second network parameter. Through the technical scheme provided by the invention, the acceleration efficiency of executing the operation task by the expert hybrid model can be improved.

The invention discloses an automatic identification and expansion communication method based on an RS485 interface, and relates to the technical field of industrial automation communication. The problems that an existing RS485 interface is complex in configuration, poor in protocol compatibility and high in data transmission delay are solved. According to the scheme, the terminal matched resistance and the bias current are adjusted in real time by dynamically measuring the bus equivalent distributed capacitance value, and signal attenuation caused by the capacitance effect is inhibited; a silicon controlled rectifier trigger type charge discharge mechanism is adopted to force bus residual charge to return to zero quickly, and an idle state is accurately judged in combination with a hysteresis comparator; dynamically compensating signal edge distortion and calibrating a sampling window time sequence based on a pre-emphasis filtering and Kalman filtering algorithm; multi-node stable communication is realized through capacitance value driven conflict detection threshold adaptive adjustment and a Poisson back-off model; according to the invention, the real-time performance, the anti-interference capability and the multi-node expansion reliability of RS485 communication in a complex industrial scene are obviously improved, and the debugging and maintenance cost of the system is reduced at the same time.

An intelligent (self-learning) sensor-aware and / or context-aware subsystem comprising (i) a System-on-a-Chip (SoC), (ii) a radio transceiver, (iii) a microphone, (iv) a voice processing module, (v) a (bio-inspired) neuromorphic event camera or a hyperspectral camera, (vi) a first set of computer implemental instructions in artificial neural networks (ANN) (which may include a transformer model / diffusion model or Poisson flow generative model++ (PFGM++)), (vii) a second set of computer implementable instructions to analyze and interpret contextual data and (viii) an autonomous artificial intelligence (AI) agent is disclosed.

The utility model relates to an accelerator cluster super-node device and a computing acceleration device. The accelerator cluster super-node device comprises a southbound PCIe switch and at least one artificial intelligence server. Each artificial intelligence server comprises at least two acceleration card groups, and each acceleration card group comprises at least one acceleration card; the southbound PCIe switch is coupled to the acceleration cards in the at least two acceleration card groups in the at least one artificial intelligence server to form a southbound PCIe connection path across the acceleration card groups between the acceleration cards. According to the invention, southbound connection between acceleration cards in different acceleration card groups and different server nodes is realized, the waiting time is shorter than that of northbound data communication, the data receiving waiting time between different acceleration cards in different acceleration card groups during data interaction is reduced, direct interconnection communication of the acceleration cards is realized, and the communication efficiency is improved. The data receiving waiting time of the acceleration card can be shortened, and the calculation speed can be improved.

The invention relates to an intelligent self-adaptive gas sensor adjustment controller and a working method thereof, and belongs to the technical field of gas detection. The adjustment controller comprises a main control module, a gas detection module, an environmental parameter module, an adjustment execution module, a communication module and a power management module, the main control module compensates detection parameters obtained by the gas detection module according to environmental parameter information obtained by the environmental parameter module in combination with built-in standard parameters and a compensation algorithm, and the adjustment execution module performs adjustment according to the compensation parameters. And whether the calibration execution module is started to calibrate the gas detection module is determined by judging the output stability of the gas detection module. According to the control method of the adjustment controller, through intelligent and self-adaptive adjustment control, the measurement precision, stability and applicability of the gas sensor are remarkably improved, and a reliable solution is provided for gas detection in a complex environment.

Multipathing for session-based remote direct memory access (SRDMA) may be used for congestion management. A given SRDMA session group may be associated with multiple SRDMA sessions, each having its own unique 5-tuple. A queue pair (QP) associated with the SRDMA session group may provide a packet for transmission using the SRDMA session group. The SRDMA session group may enable the packet to be transmitted using any of the associated SRDMA sessions. Congestion levels for each of the SRDMA sessions may be monitored and weighted. Therefore, when a packet is received, an SRDMA session may be selected based, at least, on the weight to enable routing of packets to reduce latency and improve overall system efficiency.

The invention discloses a computing node, a computing system, a control method, a control device, equipment and a medium, and relates to the technical field of computers, a plurality of acceleration cards are interconnected through an Ethernet switching module, and low-order channels of serializer / deserializer interfaces of the acceleration cards are connected with the Ethernet switching module through retimers. A high-order channel of at least one serializer / deserializer interface of each accelerator card is connected with the Ethernet switching module through a retimer, and the working mode of the retimer is configured through a first controller on a computing node according to the signal rate of the accelerator cards, so that a framework that communication interfaces between the accelerator cards are fully interconnected is realized. Any two acceleration cards can be directly connected, the communication bandwidth between the acceleration cards is improved, meanwhile, the number of the acceleration cards can be flexibly expanded, longitudinal expansion and transverse expansion of a computing system can be conveniently achieved, the problem that a traditional acceleration card interconnection scheme is not easy to expand is solved, and the method can adapt to service requirements and flexibly adjust working loads.

The embodiment of the invention provides a hot plug method and equipment for storage equipment, and relates to the technical field of storage. The method comprises the steps that an insertion event is received, the insertion event is an event that a target device is hot-inserted into a computing device, the insertion event comprises first information, the first information comprises a unique identification number and capacity of the target device, and the target device is a computing fast connection CXL device or a memory connected to the CXL device; physical storage space management is carried out on the target equipment according to the capacity, management data of the target equipment is obtained, and the management data comprises offset and a physical space address; and sending the management data to the CXL equipment, so that the CXL equipment can perform read-write operation according to the management data. In this way, the CXL-based storage device can be subjected to hot insertion and hot unloading operation without powering off the computing device, and the maintenance, commissioning and testing cost is reduced.

The invention discloses a large model calculation acceleration chip architecture, and relates to the field of large models. Comprising a normalized network-on-chip, an interconnection transmission system, a storage control system and a calculation acceleration core, the storage control system is connected with the Memory video memory group and the external SSD memory based on different built-in storage controllers; the normalized network-on-chip reads on-chip model parameters of a target position based on the storage control system, sends the on-chip model parameters to the calculation acceleration core for calculation, restores on-chip model data, carries out off-chip interaction with an external management server based on the interconnection transmission system, receives an instruction task, reads and restores external model parameters, and sends the external model parameters to the calculation acceleration core for calculation. And performing inter-chip interaction with other computing acceleration chips based on an interconnection transmission system, and reading and restoring inter-chip model parameters. According to the scheme, the hybrid video memory computing chip architecture supports multi-parallel SSD direct connection access, the capacity is expanded at low cost under the condition of keeping the bandwidth, and high cost performance is kept for both large-scale parallel tasks and small-sized low-cost all-in-one machines.

The invention provides a regulation factor threshold effect evaluation method and device for vegetation response sudden drought characteristics, equipment and a storage medium. Relates to the technical field of drought risk prediction and influence evaluation. The method comprises the following steps: acquiring hydro meteorological data, vegetation productivity data, topographic feature data, soil characteristic data and biological variable data of a target area; constructing a drought suddenness index, extracting a drought suddenness event according to the drought suddenness index, and determining a drought suddenness feature of the drought suddenness event; extracting vegetation productivity abnormal data before and after the sudden drought event, and determining the response characteristic difference of the vegetation to sudden drought; the method comprises the following steps: determining influence factors of vegetation on sudden drought response characteristics, fusing XGBoost, a random forest regression model and an SHAP interpretability analysis method, analyzing regulatory factors of the vegetation response sudden drought characteristics, and determining a threshold effect of the regulatory factors. According to the method, the nonlinear cooperative regulation effect of multiple factors on vegetation response sudden drought characteristics can be disclosed more comprehensively.

The invention relates to an AI computing subsystem, end-side equipment and a control method of the end-side equipment, and the AI computing subsystem comprises at least one FLASH storage chip which is used for pre-storing weight parameters of at least one AI network model; the at least one DRAM storage chip is used for storing weight parameters and activation functions of the AI model; and the logic chip is connected with the FLASH storage chip and the DRAM storage chip, responds to an external instruction, reads data of the FLASH storage chip so as to write the data into the DRAM storage chip, and / or reads weight parameters and activation functions stored in the DRAM storage chip and executes a calculation task. The SoC system only needs to send parameters or start commands of the AI network, and the whole network runs in the AI computing subsystem; and the most complex part of the AI network part can be deployed in the AI computing subsystem, and the SoC system only needs to compute the simple operator of the part, so that the SoC system has larger space to complete other responsible tasks.

The present disclosure relates to systems and methods remote memory access between systems. In particular, some implementations relate to remote memory access using data processing units that can reduce loads on central processing units or other system components. Some implementations utilize scheduling algorithms to optimize memory transfers. Some implementations relate to data processing unit hardware that includes programmable logic, which can be configured for scheduling, data processing, and the like.

Protocol detection circuits for detecting the field device protocol of a field device attached to a channel having a data line are sequentially connected to the data line by a controller that communicates to the field device through the protocol detection circuits. The protocol detection circuits are disconnected from the field device after protocol detection is completed. The channel may be one of a number of channels; the controller may also connect and disconnect the protocol detection circuits from the one channel whereby the protocol detection circuits can be used with any channel. After the protocol of the field device is identified a protocol adapter can be inserted into the channel to enable data conversion between the field device protocol and an another protocol used by the channel for data transmission.

The invention discloses a data transmission method and device, equipment and a medium, and relates to the technical field of computers. By adopting a redundancy architecture of multiple direct memory access channels and combining a channel transmission mode based on a trigger condition and a target screening strategy, the data transmission efficiency is improved. The appropriate target direct memory access channel is selected from the multiple direct memory access channels to execute the data transmission task, so that when a certain direct memory access channel has an error, the system can be automatically switched to other direct memory access channels to continue to execute the data transmission task; overall interruption of the non-transparent bridge link caused by a single direct memory access channel fault is avoided, meanwhile, for the direct memory access fault, the fault channel can be accurately repaired by adopting a fault-level-based hierarchical repair strategy, the whole non-transparent bridge link and all devices do not need to be reinitialized, and the fault channel repair efficiency is improved. The fault processing time is greatly shortened, the fault recovery efficiency is effectively improved, and the continuity of cross-storage node data transmission is guaranteed.

A voltage mode driver circuit has a first driver slice has a pullup structure that includes a first transistor and a second transistor and a pulldown structure that includes a third transistor and a fourth transistor. The first transistor has a gate that receives a first version of a first data signal. The second transistor has a gate that receives a first version of a second data signal. The third transistor has a gate that receives a second, complementary version of the first data signal. The fourth transistor has a gate that receives a second, complementary version of the second data signal. The first data signal encodes data in a first mode and enables the pullup and pulldown structures in a second mode of operation. The second data signal encodes data in the second mode of operation and enables the pullup and pulldown structures in the first mode of operation.

Described herein are a computing systems comprising a photonic interposer having an optical network comprising a plurality of waveguides and a plurality of controllable optical switches; an electronic die having a surface bonded to the photonic interposer, an inner interface comprising a first plurality of ports electrically coupling the electronic die to the photonic interposer through the surface; and an outer interface comprising a second plurality of ports electrically coupling the electronic die to the photonic interposer through the surface, wherein the outer interface at least partially encloses the inner interface.

The invention discloses an SOC interconnection system, a method for the SOC interconnection system, electronic equipment and a storage medium. The SOC interconnection system includes: a plurality of computing devices configured as a plurality of computing device groups; wherein the plurality of computing device groups are groups of the plurality of computing devices based on mutual access frequencies among the plurality of computing devices, each computing device group in the plurality of computing device groups is provided with a corresponding routing device, and each computing device in each computing device group is coupled with the corresponding routing device. The plurality of routing devices corresponding to the plurality of computing device groups are mutually coupled. According to the SOC interconnection system, the wiring congestion risk can be reduced, and the realization of the physical architecture of the SOC is facilitated.

The invention discloses a macro server system, an application method, electronic equipment and a storage medium, and relates to the technical field of computers, physical devices (equipment components) of the macro server system are modularly designed to be combined into modules with different functions, and the physical devices support hot plugging, so that the physical devices can be conveniently and quickly combined into modules with different functions. Meanwhile, a plurality of physical devices are connected through a high-speed communication network to form a distributed module cluster, so that a large number of computing resources, management resources and network resources can be packaged into an independent server environment, and the limitation of a current server in the aspects of processor performance, bandwidth, physical structure, hardware quantity, firmware resources and the like is solved; according to the technical scheme, the macro server system capable of supporting large-scale data processing, high-concurrency access and complex operation is constructed, so that the technical problem of how to improve the performance and expandability of the server can be solved, and the technical effect of constructing the macro server system capable of supporting large-scale data processing, high-concurrency access and complex operation is achieved.

A neural network on-chip mapping method and apparatus based on a tabu search algorithm are provided. The method includes: constructing a tabu search table and using a heuristic-based iterative search process to select local computing cores of a network-on-chip as candidates, establishing an integer programming model and solving an optimal solution, continuously reducing an objective cost function of a mapping solution by loop iteration, and finally obtaining an approximately optimal deployment scheme.

The invention discloses an inter-core-particle communication control method, device, equipment, medium and product, the method is applied to a wafer-level chip, the wafer-level chip comprises a plurality of core particles, and the method comprises the following steps: determining transmission data and target transmission parameter information of a target receiving end core particle through a sending end core particle, performing transmission judgment on the transmission data, and determining a transmission judgment result; when the transmission judgment result is that transmission can be carried out, transmitting the transmission data to the target receiving end core particle based on the target transmission parameter information, and adjusting the target transmission parameter information; the method comprises the following steps: determining receiving end congestion information through a receiving end core grain according to received transmission data, generating a return message and feeding back the return message to a sending end core grain; and adjusting the to-be-adjusted transmission parameter information according to the return message through the sending end core grain to obtain the adjusted transmission parameter information. Flow control is actively carried out through the core particles at the sending end, the problem of transmission congestion of the core particles is avoided, and therefore the performance advantages of the wafer-level chip are brought into full play.

The invention discloses a data processing chip based on a heterogeneous computing architecture, and relates to the technical field. The data processing chip based on the heterogeneous computing architecture comprises a data processing unit for receiving and preprocessing data to be transmitted; the clustering compression engine is used for carrying out clustering compression processing on the preprocessed data to be transmitted; the modulation and coding control unit is used for carrying out modulation and coding processing on the data to be transmitted after clustering compression processing; the redundant coding unit is used for carrying out redundant coding processing on the modulated and coded data to be transmitted; and outputting the to-be-transmitted data subjected to redundant coding processing to a protocol stack and interface unit of external equipment according to a set communication protocol. Through collaborative design of a clustering compression engine in a chip and a modulation coding control unit, clustering compression aiming at data structure characteristics and modulation strategy matching in a dynamic channel state are realized; the problems of fixed compression and modulation modes and lack of cooperation in the prior art are solved.

A network adapter includes a port and circuitry. The port is to connect to a communication network. The circuitry is to send to a remote network adapter, via the communication network, a remote memory-set instruction that instructs the remote network adapter to fill one or more address ranges in a memory with multiple copies of one or more fill-data values.

The invention provides a clock signal generating circuit, a wired communication transceiver and electronic equipment, and the circuit outputs a first DC voltage comprising phase difference information and frequency difference information of a reference clock signal and a feedback clock signal through a phase frequency detection module. The pulse generator generates a narrow pulse signal based on the DC voltage and a reference clock signal, the oscillation frequency of each secondary ring oscillator in the cross-coupled ring oscillator is controlled by the first DC voltage, and the cross-coupled loop performs synchronous coupling and phase sequence adjustment processing on each secondary ring oscillator. One output node in the cross coupling ring oscillator receives the narrow pulse signal, frequency and phase locking is completed in an injection locking mode, and the frequency divider is used for conducting frequency division processing on any high-frequency clock signal and outputting a feedback clock signal. Therefore, a high-frequency multi-phase clock signal with low phase noise and high phase precision can be generated by using the low-frequency reference clock signal.

Disclosed are systems and methods for tool activation and display cabinet locking. In one aspect, a method for activating a product is performed at the product. The product includes a power supply, a controller, a persistent memory coupled to the controller, and a radio module. The product is configured to be operable in a plurality of states, and a state of the product is in an inactivated state. The method includes receiving via the radio module an activation message and an authorization token. The method includes attempting to validate the authorization token based on a preset authorization information and the state of the product. The method includes, (i) when the validation is not successful, rejecting the activation message without changing the state of the product; and (ii) when the validation is successful, changing the state of the product from the inactivated state to an activated state.

The invention relates to the technical field of integrated circuits, and provides a clock domain crossing synchronization circuit and method based on a multiphase clock, and the circuit comprises a selector, an asynchronous clock synchronization module and a digital signal processor. Wherein serial data to be transmitted and a low-frequency clock are input into the selector, and the selector is used for outputting corresponding RX parallel data to the asynchronous clock synchronization module according to the serial data and the low-frequency clock; the asynchronous clock synchronization module is used for outputting corresponding alignment data to the digital signal processor according to the input RX parallel data, the clock of the digital signal processor and the low-frequency clock; the asynchronous clock synchronization module is used for performing phase alignment on the RX parallel data and a clock of the digital signal processor; and the digital signal processor is used for carrying out data processing on the alignment data. According to the invention, stable transmission of low-delay cross-clock domain data can be realized.