Various embodiments for improved power devices as well as their methods of manufacture, packaging and circuitry incorporating the same for use in a wide variety of power electronic applications are disclosed. One aspect of the invention combines a number of charge balancing techniques and other techniques for reducing
parasitic capacitance to arrive at different embodiments for power devices with improved
voltage performance, higher switching speed, and lower on-resistance. Another aspect of the invention provides improved termination structures for low, medium and
high voltage devices. Improved methods of fabrication for power devices are provided according to other aspects of the invention. Improvements to specific
processing steps, such as formation of trenches, formation of
dielectric layers inside trenches, formation of mesa structures and processes for reducing substrate thickness, among others, are presented. According to another aspect of the invention, charge balanced power devices incorporate temperature and current sensing elements such as diodes on the same die. Other aspects of the invention improve
equivalent series resistance (ESR) for power devices, incorporate additional circuitry on the same
chip as the power device and provide improvements to the packaging of charge balanced power devices.