Amorphous Oxide And Thin Film Transistor

a thin film transistor and amorphous oxide technology, applied in non-linear optics, instruments, vacuum evaporation coatings, etc., can solve the problems of difficult to decrease the electrical conductivity, difficult to increase the on/off ratio of the transistor, and the inability to increase the electron mobility

Inactive Publication Date: 2007-08-23
JAPAN SCI & TECH CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0030] The elements M2, M3, and M4 having atomic numbers smaller than those of Zn, In, and Sn, respectively, have higher ionicity than Zn, In and Sn; thus, generation of oxygen defects is less frequent, and the electron carrier concentration can be decreased. Although Lu has a larger atomic number than Ga, the ion radius is small and the ionicity is high, thereby achieving the same functions as those of M3. M5, which is ionized at a valency of 5, strongly bonds to oxygen and rarely causes oxygen defects. Tungsten (W), which is ionized at a valency of 6, strongly bonds to oxygen and rarely causes oxygen defects.
[0036] Addition of the above-described elements will increase the stability of the amorphous film and expands the composition range that can give an amorphous film. In particular, addition of highly covalent B, Si, or Ge is effective for stabilization of the amorphous phase, and a compound oxide composed of ions with largely different ion radii can stabilize the amorphous phase. For example, in the In—Zn—O system, a stable amorphous film is rarely obtained at room temperature unless the range of In content is more than about 20 at %. However, by adding Mg in an equivalent amount to In, a stable amorphous film can be obtained at an In content of more than about 15 at %.
[0045] Use of an Al2O3 film can decrease the leak current. Use of an Y2O3 film can reduce the hysteresis. Use of a high dielectric constant HfO2 film can increase the field effect mobility. By using a film composed of a mixed crystal of these compounds, a TFT having small leak current and hysteresis and large field effect mobility can be produced. the process for forming the gate insulating film and the process for forming the channel layer can be conducted at room temperature; thus, a TFT of a staggered or inverted staggered structure can be formed. (Transistor)
[0048] The electron mobility of the oxide crystals increases as the overlap of the s orbits of the metal ion increases. The oxide crystals of Zn, In, and Sn having large atomic numbers exhibit high electron mobility of 0.1 to 200 cm2 / (V·sec). Since ionic bonds are formed between oxygen and metal ions in an oxide, electron mobility substantially comparable to that in a crystallized state can be exhibited in an amorphous state in which there is no directionality of chemical bonding, the structure is random, and the directions of the bonding are nonuniform. In contrast, by replacing Zn, In, and Sn each with an element having a smaller atomic number, the electron mobility can be decreased. Thus, by using the amorphous oxide described above, the electron mobility can be controlled within the range of about 0.01 cm2 / (V·sec) to 20 cm2 / (V·sec).
[0050] Once a voltage is applied to the gate terminal, electrons are injected into the amorphous oxide channel layer, and current flows between the source and drain terminals, thereby allowing the part between the source and drain terminals to enter an ON state. According to the amorphous oxide film of the present invention, since the electron mobility increases with the electron carrier concentration, the current that flows when the transistor is turned ON can be further increased. In other words, the saturation current and the on / off ratio can be further increased. When the amorphous oxide film having high electron mobility is used as the channel layer of a TFT, the saturation current can be increased and the switching rate of the TFT can be increased, thereby achieving high-speed operation.
[0086] As described above, by controlling the oxygen partial pressure, oxygen defects can be reduced, and therefore the electron carrier concentration can be reduced. Unlike in the polycrystalline state, in the amorphous state, there is essentially no grain interface; therefore, an amorphous thin film with high electron mobility can be obtained. Note that when a polyethylene terephthalate (PET) film having a thickness of 200 μm was used instead of the glass substrate, the resulting InGaO3(ZnO)4 amorphous oxide thin film exhibited similar characteristics. Example 4 Formation of In—Zn—Ga—Mg—O Amorphous Oxide Film by PLD Method

Problems solved by technology

However, known ZnO rarely forms a stable amorphous phase at room temperature and mostly exhibits polycrystalline phase; therefore, the electron mobility cannot be increased because of the diffusion at the interfaces of polycrystalline grains.
Moreover, ZnO tends to contain oxygen defects and a large number of carrier electrons, and it is thus difficult to decrease the electrical conductivity.
Therefore, it has been difficult to increase the on / off ratio of the transistors.
Although this is sufficient for regular transparent electrodes, the film cannot be easily applied to a channel layer of a TFT.
This is because it has been found that a TFT having a channel layer composed of this amorphous oxide film does not exhibit a sufficient on / off ratio and is thus unsuitable for TFT of a normally off type.

Method used

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  • Amorphous Oxide And Thin Film Transistor
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Examples

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Effect test

example 1

Preparation of Amorphous In—Ga—Zn—O Thin Film by PLD Method

[0053] A film was formed in a PLD device shown in FIG. 7. In the drawing, reference numeral 701 denotes a rotary pump (RP), 702 denotes a turbo molecular pump (TMP), 703 denotes a preparation chamber, 704 denotes en electron gun for RHEED, 705 denotes a substrate holder for rotating and vertically moving the substrate, 706 denotes a laser entrance window, 707 denotes a substrate, 708 denotes a target, 709 denotes a radical source, 710 denotes a gas inlet, 711 denotes a target holder for rotating and vertically moving the target, 712 denotes a by-pass line, 713 denotes a main line, 714 denotes a turbo molecular pump (TMP), 715 denotes a rotary pump (RP), 716 denotes a titanium getter pump, and 717 denotes a shutter. In the drawing, 718 denotes ionization gauge (IG), 719 denotes a Pirani gauge (PG), 720 denotes a Baratron gauge (BG), and 721 denotes a deposition chamber.

[0054] An In—Ga—Zn—C amorphous oxide semiconductor thin...

example 2

Formation of Amorphous InGaO3(ZnO) and InGaO3(ZnO)4 Oxide Films by PLD Method

[0070] In—Zn—Ga—O amorphous oxide films were deposited on glass substrates (#1737 produced by Corning) by using polycrystalline sinters represented by InGaO3(ZnO) and InGaO3(ZnO)4 as the targets by a PLD method using KrF excimer laser. The same PLD deposition device as shown in EXAMPLE 1 was used, and the deposition was conducted under the same conditions. The substrate temperature during the deposition was 25° C.

[0071] Each film obtained thereby was subjected to grazing incidence x-ray diffraction (thin film method, incident angle: 0.5°) for the film surface. No clear diffraction peak was detected. The In—Zn—Ga—O films prepared from the two targets were both amorphous.

[0072] The In—Zn—Ga—O amorphous oxide films on the glass substrates were each analyzed to determine the x-ray reflectance. Analysis of the pattern found that the root mean average roughness (Rrms) of the thin film was about 0.5 mm and that...

example 3

Formation of In—Zn—Ga—O Amorphous Oxide Film by SP Method

[0078] Formation of a film by a high-frequency SP method using argon gas as the atmosphere gas is described. The SP method was conducted using the device shown in FIG. 8. In the drawing, reference numeral 807 denotes a substrate for deposition, 808 denotes a target, 805 denotes a substrate holder equipped with a cooling mechanism, 814 denotes a turbo molecular pump, 815 denotes a rotary pump, 817 denotes a shutter, 818 denotes an ionization gauge, 819 denotes a Pirani gauge, 821 denotes a deposition chamber, and 830 denotes a gate valve. A SiO2 glass substrate (#1737 produced by Corning) was used as the substrate 807 for deposition. As the pre-deposition treatment, the substrate was degreased with ultrasonic waves in acetone, ethanol, and ultrapure water for 5 minutes each, and then dried in air at 100° C.

[0079] An InGaO3(ZnO)4 polycrystalline sinter (size: 20 mm in dia., 5 mm in thickness) was used as the target material. T...

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Abstract

The present invention relates to an amorphous oxide and a thin film transistor using the amorphous oxide. In particular, the present invention provides an amorphous oxide having an electron carrier concentration less than 1018 / cm3, and a thin film transistor using such an amorphous oxide. In a thin film transistor having a source electrode 6, a drain electrode 5, a gate electrode 4, a gate insulating film 3, and a channel layer 2, an amorphous oxide having an electron carrier concentration less than 1018 / cm3 is used in the channel layer 2.

Description

TECHNICAL FIELD [0001] The present invention relates to amorphous oxides and thin film transistors. BACKGROUND ART [0002] A thin film transistor (TFT) is a three-terminal element having a gate terminal, a source terminal, and a drain terminal. It is an active element in which a semiconductor thin film deposited on a substrate is used as a channel layer for transportation of electrons or holes and a voltage is applied to the gate terminal to control the current flowing in the channel layer and switch the current between the source terminal and the drain terminal. Currently, the most widely used TFTs are metal-insulator-semiconductor field effect transistors (MIS-FETs) in which the channel layer is composed of a polysilicon or amorphous silicon film. [0003] Recently, development of TFTs in which ZnO-based transparent conductive oxide polycrystalline thin films are used as the channel layers has been actively pursued (Patent Document 1). These thin films can be formed at low temperatur...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L27/12G02F1/1345G02F1/1368H01L21/363H01L21/77H01L21/84H01L29/786
CPCC23C14/0021C23C14/086C23C14/28C23C14/3414H01L21/02554H01L29/78696H01L21/02631H01L27/1225H01L29/7869H01L29/78693H01L21/02565H10K59/1213
Inventor HOSONO, HIDEOHIRANO, MASAHIROOTA, HIROMICHIKAMIYA, TOSHIONOMURA, KENJI
Owner JAPAN SCI & TECH CORP
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