6907results about How to "Total current drop" patented technology

The present invention relates to an amorphous oxide and a thin film transistor using the amorphous oxide. In particular, the present invention provides an amorphous oxide having an electron carrier concentration less than 1018 / cm3, and a thin film transistor using such an amorphous oxide. In a thin film transistor having a source electrode 6, a drain electrode 5, a gate electrode 4, a gate insulating film 3, and a channel layer 2, an amorphous oxide having an electron carrier concentration less than 1018 / cm3 is used in the channel layer 2.

Embodiments of the invention include a method of forming a nonvolatile memory device that contains a resistive switching memory element that has improved device switching performance and lifetime, due to the addition of a current limiting component disposed therein. The electrical properties of the current limiting component are configured to lower the current flow through the variable resistance layer during the logic state programming steps by adding a fixed series resistance in the resistive switching memory element of the nonvolatile memory device. In some embodiments, the current limiting component comprises a varistor that is a current limiting material disposed within a resistive switching memory element in a nonvolatile resistive switching memory device. Typically, resistive switching memory elements may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices, such as digital cameras, mobile telephones, handheld computers, and music players.

There is provided a method of manufacturing a semiconductor device, including the following steps: flowing a first precursor gas to the semiconductor substrate within a ALD chamber to form a first discrete monolayer on the semiconductor substrate; flowing an inert purge gas to the semiconductor substrate within the ALD chamber; flowing a second precursor gas to the ALD chamber to react with the first precursor gas which has formed the first monolayer, thereby forming a first discrete compound monolayer; and flowing an inert purge gas; forming a first dielectric layer to cover the discrete compound monolayer; forming a second third monolayer above first dielectric layer; and forming a second discrete compound monolayer; and forming a second dielectric layer to cover the second discrete compound monolayer above the first dielectric layer. There is also provided a semiconductor device formed by the ALD method.

A method and apparatus for treatment of hypertension with electrostimulation of peripheral nerves. Treatment is performed by periodically stimulating a nerve such as a median nerve. Apparatus for stimulation is permanently implanted in the body. The nerve is stimulated by electric current applied to electrodes that are placed near the target nerve or the muscle innervated by the target nerve.

A wireless charging device (35) for charging a battery of a mobile electronic device (1). The charging device (35) includes a wireless receiver (39) and a plurality of electrodes (44, 45) that are connected to a power source. The power source is controlled by a controller (40) that is coupled to the wireless receiver (39). Whilst the wireless receiver (39) receives a wireless signal that is associated with a compatible mobile device (1) the controller (40) instructs the power source to power the electrodes (44, 45). Alternatively, the wireless signal can be indicative of the need of the mobile device (1) to be charged and the controller (40) will only power the electrodes (44, 45) if a signal indicating that the mobile device (1) needs to be charged is received. A mobile battery operated device (1) that sends an indicating signal when the battery of the device needs to be charged.

An active rectifier and a wireless power reception apparatus using the same are disclosed herein. The active rectifier includes first and fourth switches, second and third switches, and a synchronization control unit. The first and fourth switches are turned on while the voltage of an alternating current (AC) input is negative, and apply the current of the AC input to a rectifying capacitor. The second and third switches are turned on while a voltage of the AC input is positive, and apply the current of the AC input to the rectifying capacitor. The synchronization control unit compensates for the delay time of the comparator for detecting zero-crossing of the AC input so as to switch the first to fourth switches.

A method of forming a semiconductor structure includes providing a composite substrate, which includes a bulk silicon substrate and a silicon germanium (SiGe) layer over and adjoining the bulk silicon substrate. A first condensation is performed to the SiGe layer to form a condensed SiGe layer, so that the condensed SiGe layer has a substantially uniform germanium concentration. The condensed SiGe layer and a top portion of the bulk silicon substrate are etched to form a composite fin including a silicon fin and a condensed SiGe fin over the silicon fine. The method further includes oxidizing a portion of the silicon fin; and performing a second condensation to the condensed SiGe fin.

A method and an apparatus for reducing coupled electrical energy resulting from an electromagnetic field. Embodiments of the present invention provide for an elongate body having a proximal end portion, a middle portion, and a distal end portion and at least one coil wound about at least one of the proximal end portion, the middle portion, and the distal end portion, the coil to provide for filtering of radio frequency (RF) signal-coupled electrical energy.

A particle (10) of ferromagnetic powder for use in preparation of soft magnetic core components has a core-shell structure. The particle includes a central core (12) and a shell (14) coated on the central core. The central core is made of magnetic material and is used for providing the necessary magnetic property for the magnetic core components made from the ferromagnetic powder. The shell has a higher electrical resistance than the central core so as to reduce an eddy current loss of the magnetic core component. The shell also functions to provide an excellent bonding strength between particles of the powder.

A light emitting semiconductor device die (10, 110, 210, 310) includes an electrically insulating substrate (12, 112). First and second spatially separated electrodes (60, 62, 260, 262, 360, 362) are disposed on the electrically insulating substrate. The first and second electrodes define an electrical current flow direction directed from the first electrode to the second electrode. A plurality of light emitting diode mesas (30, 130, 130′, 230, 330) are disposed on the substrate between the first and second spatially separated electrodes. Electrical series interconnections (50, 150, 250, 350) are disposed on the substrate between neighboring light emitting diode mesas. Each series interconnection carries electrical current flow between the neighboring mesas in the electrical current flow direction.

A memory cell for magnetic random access memory devices based on a magnetic tunnel junction (MTJ) memory element with a perpendicular orientation of magnetization in pinned and free magnetic layers, and a tunnel barrier layer sandwiched between the pinned and free layers. The memory cell can include the MTJ memory element, a magnetic flux guide in series with selection devices, such as a bit line, a word line, and a transistor. The magnetic flux guide can have two electrically conductive magnetic portions with the MTJ memory element positioned between the magnetic portions. The MTJ memory element is magnetically isolated from the magnetic flux guide by thin non-magnetic conductive spacers. The MTJ memory element is arranged in a vertical space between the intersecting bit and word lines at their intersection region. The memory cell also includes write and excitation lines. The write line is parallel to the bit line and the excitation line is parallel to the word line. The write and excitation lines also intersect each other and define a corner. The MTJ memory element is positioned in the corner of the intercepting write and excitation lines.