5217 results about "Comparator" patented technology

The invention discloses a phase change memory and electronic equipment, the phase change memory comprises a comparator, a second switch, a third switch, a memory circuit, a selected digital line, a first switch and an unselected digital line, the memory circuit, the selected digital line, the first switch and the unselected digital line are connected in sequence, and the reference voltage of the unselected digital line is set in a reading operation through the first switch and the third switch; the reference voltage is in positive correlation with the second negative voltage, the second negative voltage is smaller than the first negative voltage, and compared with the reference voltage which is in positive correlation with the first negative voltage, the lower reference voltage can be generated, so that the overshoot current flowing through the memory cell at the opening moment is reduced, and the reading interference suffered by the memory cell is reduced.

The invention discloses a dual-mode analog front end with a full-speed clock-free decision feedback equalizer (UC-DFE). The dual-mode analog front end comprises a terminating impedance matching network, a linear processing link, the UC-DFE and a signal output module, the terminating impedance matching network realizes broadband impedance matching and electrostatic protection; the linear processing link comprises a CTLE and a VGA and is used for compensating channel attenuation and expanding signal bandwidth; the UC-DFE comprises a summator, a static comparator, a delay unit and a feedback tap, and realizes high-speed signal processing and feedback equalization; and the signal output module converts the balanced signal into a target coding format and outputs the signal. According to the invention, the overall performance of the circuit is improved, the problems of time sequence tension, bandwidth limitation and the like of the traditional DFE architecture at a high speed are solved, and the circuit is suitable for 128Gbps high-speed PAM4 and NRZ signal transmission and shows better comprehensive performance.

Certain aspects of the present disclosure provide a digital-to-analog converter (DAC) circuit. The DAC circuit generally includes: a decoder coupled to an input of the DAC circuit and current-steering cells coupled to an output of the decoder. Outputs of the current-steering cells may be coupled to a positive output node and a negative output node of the DAC circuit. The DAC circuit may also include an offset detection circuit including: a comparator having a first input and a second input selectively coupled to the positive output node and the negative output node; and a digital controller having an input coupled to an output of the comparator and an output coupled to the decoder. In some aspects, the DAC circuit includes one or more calibration DACs coupled to the offset detection circuit.

The invention belongs to the technical field of plasma sources, and provides a high-power high-stability remote plasma source fuzzy hysteresis control method and a circuit, when a reaction cavity is successfully ignited, a plasma source system is controlled to work at constant-frequency variable-duty-ratio constant-power output, and the method comprises the following steps: according to a sampled current value, a duty ratio, a predicted current value and a predicted duty ratio, calculating a constant-frequency variable-duty-ratio constant-power output value; respectively obtaining error control variables e and ec; the error control variables e and ec serve as input values of a fuzzy controller, and the actual control quantity hr output by the fuzzy controller is obtained; obtaining compensation variables # imgabs0 # and # imgabs1 # of the current and the duty ratio based on the error control variables e and ec; and taking the actual control quantity hr as the ring width value of a hysteresis comparator, and respectively compensating the current # imgabs4 # and the duty ratio # imgabs5 # at the moment k by outputting compensation variables # imgabs2 # and # imgabs3 # according to a preset rule. According to the method provided by the invention, a power window in a relatively wide range can be ensured, so that the working stability of the remote plasma source is improved, and the uniformity of a semiconductor manufacturing process is improved.

The invention provides a system and a method for verifying bifurcation characteristics of PCIe Switch, and relates to the technical field of PCIe. The forking characteristic verification system of the PCIe Switch comprises a DUT module, a first EP verification agent component, a second EP verification agent component, a first RC verification agent component, a second RC verification agent component, a first PHY verification agent component, a second PHY verification agent component and a configuration module. A configuration module, a first protocol comparator and a second protocol comparator, wherein the configuration module is used for configuring the bifurcation form of the uplink port and the downlink port and the behavior of each verification agent component; the first protocol comparator is used for verifying the bifurcation characteristic of the uplink port, and the second protocol comparator is used for synchronously verifying the bifurcation characteristic of the downlink port. The method has the advantages that the verification convergence speed is increased, and the verification rate is increased.

The invention provides a cable defect detection device based on double-path coupling frequency domain reflection, and belongs to the technical field of power cable detection. Comprising a master control module, a double-path coupling signal generator, a first coupler, a second coupler, a first signal comparator and a second signal comparator, the master control module is electrically connected with the double-path coupling signal generator; the input end of the first coupler is connected with the double-path coupling signal generator, the coupling port of the first coupler is connected with a cable to be tested, the output end of the first coupler is connected with the input end of the first signal comparator, and the output end of the first signal comparator is connected with the input end of the second signal comparator; the input end of the second coupler is connected with the double-path coupling signal generator, and the output end of the second coupler is connected with the second signal comparator; the output end of the first signal comparator and the output end of the second signal comparator are both electrically connected with the master control module. According to the invention, the problem of phase ambiguity of single-path measurement is overcome by using a double-path signal comparison structure, and the accuracy and reliability of cable defect detection are remarkably improved.

Proposed is a device for receiving a four-level pulse amplitude modulation (PAM-4) signal, which includes a first comparator for comparing a received PAM-4 signal with a predetermined threshold voltage to output a most significant bit (MSB) signal; and a second comparator for comparing the differential signal difference between the positive signal and negative signal of the received PAM-4 signal with a reference voltage to output a least significant bit (LSB) signal.

The invention provides a display device and a driving chip of a display panel. The display device comprises the display panel and the driving chip. The driving chip comprises a first comparator and a second comparator; the driving chip is used for dividing the output channels corresponding to the at least two data lines into a first channel with positive polarity and a second channel with negative polarity; a first comparator for comparing the first voltage with a first reference voltage to output a first level; the second comparator is used for comparing the second voltage with a second reference voltage and outputting a second level; and the driving chip is also used for continuously monitoring the first level and the second level so as to detect whether a short circuit between the data lines occurs in the display panel or not. The data line is divided into the positive and negative polarity channels through the driving chip, the comparator is used for comparing the channel voltage with the reference voltage, the level change is monitored to detect the short circuit, an amplifier and a complex switch assembly do not need to be additionally arranged, the circuit structure is simplified, and the manufacturing cost is reduced.

A voltage mode weak-PUF circuit with rich challenge-response pairs comprises four decoders, two PUF arrays, a sequential control circuit and a voltage comparator. One-to-two PUF arrays are used to replace existing one-to-one PUF arrays to increase the number of challenge-response pairs by 2N times, from 2N realized by the one-to-one PUF arrays to 2N×2N, wherein N=a+b. Each PUF cell comprises m*n PUF cells and n transmission gates, and adopts a simple common-source amplifier structure formed by a first PMOS transistor, a first NMOS transistor and a second NMOS transistor, wherein any one PUF cell in one PUF array can be compared with any one PUF cell in the other PUF array to generate an output response. The number of output responses is 2N, so the proportion of the PUF cells for generating one challenge-response pair is 2N / 2N=1 / 2N, and the reuse rate of the same PUF cell is merely 1 / 2N.

A control system for an AC-DC converter includes a mixed-signal power controller and first and second gate drivers. The controller has a digital module and an analog module. The analog module has a current sensor generating a current sense voltage based on a sensed switch current. The digital module has a DC voltage sensor generating a DC sense voltage based on a DC bus voltage, and an AC voltage sensor generating an AC sense voltage and a binary polarity signal based on the AC voltage. The digital module induces the first gate driver to output first and second control signals for controlling a high-side switch and a low-side switch of a current shaping half-bridge based on first and second clock signals and the comparator voltage, such that an inductor current flowing through an inductor is proportional to a current command value.

The invention relates to a PCB over-temperature protection device, method and equipment, and relates to the technical field of servers, the device comprises at least one control circuit and a complex programmable logic device CPLD, and the control circuit comprises a thermistor and at least one voltage comparator; the thermistor is arranged in a monitoring area of a printed circuit board (PCB) and is used for converting the temperature of the monitoring area into a target voltage signal; the forward input end of the voltage comparator receives a target voltage signal, the reverse input end of the voltage comparator receives a reference voltage signal corresponding to the voltage comparator, and the voltage comparator is used for outputting a high level when the target voltage signal is higher than the reference voltage signal; the CPLD comprises a plurality of input pins respectively corresponding to the voltage comparators, each input pin is electrically connected with the output end of the corresponding voltage comparator, and the CPLD is used for triggering over-temperature protection operation corresponding to the input pin when the high level is received through the input pin, so that the timeliness of PCB over-temperature protection is improved.

The invention provides an ultrasonic fingerprint chip and an integral clock generation method and device of the ultrasonic fingerprint chip. Appropriate fingerprint pixel units can be selected from a plurality of fingerprint pixel units to serve as first-class pixel units and second-class pixel units, and the first-class pixel units and the second-class pixel units are respectively connected with a first-class detection circuit and a second-class detection circuit. Wherein a first integrator in the first type of detection circuit is sequentially connected with a first comparator, a time delay regulator, a clock dominant frequency duplicator and a frequency dividing circuit; the frequency dividing circuit is connected with the second type detection circuit; a second integrator in the second type detection circuit is connected with an amplification structure; the amplification structure is also connected with a second comparator; and the second comparator is connected with the time delay regulator in the first-class detection circuit. The circuit can automatically generate and obtain the integral clock signal which is matched with the ultrasonic fingerprint echo signal and is high in precision and good in effect, so that the received ultrasonic fingerprint echo signal is precisely processed, and a target signal with high quality is obtained.

In an example, a level shifter includes a low side having first and second inputs. The level shifter also includes a high side, where the high side has a latch having first and second terminals. The high side also includes a current comparator including first and second current mirrors. The high side includes isolation circuitry including first and second transistors, in which the first transistor has a first control terminal, the second transistor has a second control terminal, the first transistor is coupled between the first terminal and the first current mirror, the second transistor is coupled between the second terminal and the second current mirror, the first control terminal is coupled to the second current mirror, and the second control terminal is coupled to the first current mirror.

The invention relates to the technical field of hydrogen transportation monitoring, in particular to a real-time monitoring and positioning method and system for hydrogen leakage of a hydrogen transportation trailer, and the method comprises the steps: automatically generating a signal collection request according to a preset real-time monitoring period, and synchronously obtaining a plurality of original sensing signals in real time through a vehicle-mounted sensor array, the method comprises the following steps: respectively preprocessing a plurality of original sensing signals to obtain a plurality of target quantized data, carrying out feature extraction on the plurality of target quantized data to obtain a feature variable set, carrying out fusion decision on the feature variable set by adopting a preset target decision model to generate a fusion decision result, and performing confidence evaluation on the fusion decision result through a probability threshold comparator, generating an early warning signal when a comprehensive score exceeds a dynamic early warning threshold, sending the early warning signal and target sensing data to a remote monitoring platform, and displaying an early warning trigger position and state of the hydrogen transport trailer on the remote monitoring platform. And the hydrogen trailer transportation safety and the emergency treatment efficiency are improved.

The noise-shaping successive-approximation-register analog-to-digital converter includes a capacitive digital-to-analog-converter, a loop filter including a plurality of integration capacitors, and a multi-input comparator. During an integration phase, the capacitive digital-to-analog converter couples to the plurality of integration capacitors to develop an integration voltage. The integration capacitors are then arranged to passively apply a first gain to the integration voltage. The multi-input comparator also provides a second gain to the integration voltage.

The invention discloses a charge control method and a digital control system based on a dual-active bridge resonant converter, and belongs to the technical field of dual-active bridge resonant converter control. According to the method, a resettable integrating circuit is used for sampling resonance current and converting the resonance current into integrating voltage which is in a linear relation with charge injection quantity, and an integrating capacitor is discharged and reset before each time of injection; superposing the integral voltage and the ramp voltage; comparing the superposed signal with a threshold voltage output by a current loop through a comparator, and when the superposed signal reaches a threshold value, triggering to generate a PWM signal and switching the working mode of the converter; a switching tube is controlled to act according to a PWM signal, a switching time sequence is dynamically adjusted, effective control over transmission power is achieved, and a digital control system for achieving the method is established. According to the method, rapid dynamic response, efficient power transmission and stable operation of the dual-active bridge resonant converter are realized by controlling resonance current integration and a switching time sequence, and the energy conversion efficiency and the system reliability are effectively improved.

The disclosure relates to an electronic circuit to verify the integrity of a switch. The circuit comprises a voltage comparator and decoupling switch. The decoupling switch configured receive the driving signal having a first logic value to enable the monitoring of the comparison voltage and is configured to receive the monitoring enable signal having a first logic value to command the opening of the decoupling switch. The electronic circuit is configured to generate the output monitoring signal having a first logic value in an event that the switch is an open circuit and having a second logic value in an event that the switch is a short circuit.

The invention provides a system and a method for detecting and preventing early explosion of an electronic detonator chip. The method comprises the following steps: S1, detecting a current charging voltage; s2, selecting a reference voltage, comparing the reference voltage with the current charging voltage, and obtaining a comparison result based on a comparator; and S3, taking an early explosion prevention measure according to a comparison result. According to the invention, the multi-gear reference circuit and the comparator are used, high-precision detection of voltage change of the energy storage capacitor is realized, and the digital control logic circuit is matched to detect that the voltage of the energy storage capacitor drops abnormally and rapidly, so that an early explosion symptom is identified; by arranging the bypass switch, the energy storage capacitor is short-circuited to the ground when an early explosion symptom is recognized, so that energy of the energy storage capacitor is not released through the ignition element, early explosion is prevented, and good practicability is achieved.

The invention discloses an ALU, a processor, a chip, equipment and a texel index calculation method, and belongs to the technical field of chips. The ALU comprises a first comparator, a first divider, a first summator and a texel adjusting unit. A first comparator to determine a first value, the first value being determined based on a smaller value of the integer portion of the input texture coordinate and the maximum offset; the first divider is used for calculating a ratio between the input offset and the first divisor to obtain a first ratio; the first summator is used for calculating the quotient of the first ratio and the sum of the first numerical value and the second numerical value to obtain a first calculation result; and the texel adjusting unit is used for determining a target texel index corresponding to the input texture coordinate according to at least one of the first calculation result and the addressing mode. According to the method, the first calculation result can be determined based on the smaller value in the two, and the value of the integer part of the input texture coordinate can be reduced within a certain limit, so that the bit width of the calculation unit is reduced.

The invention provides a bidirectional level converter and electronic equipment, and relates to the technical field of analog integrated circuits, the bidirectional level converter comprises a first port, a second port and a conversion circuit arranged between the first port and the second port; the first port comprises a first input / output port and a first reference level port; the second port comprises a second input / output port and a second reference level port; the conversion circuit comprises a first Schmidt comparator, a clamping circuit, a pull-up module, a pull-down module and a second Schmidt compartment.The bidirectional level converter and the electronic equipment have the advantages that under the condition that an input signal is converted from a high signal to a low signal, driving of an input stage does not need extremely high driving capacity, input and output are in an isolated state, and the conversion efficiency is improved; and the load size of the output stage has no influence on the driving capability of the input stage, so that the integrity of signals can be maintained, the system design is more flexible, and meanwhile, the circuit can adapt to more application scenes.

The invention discloses an overcurrent protection control circuit of a low-dropout linear regulator and the low-dropout linear regulator, and relates to the field of voltage regulators. A first sampling module is connected with a drain electrode, a grid electrode and a source electrode of a power control tube in the low-dropout linear regulator and a first current comparator; the first current comparator is further connected with the grid electrode of the first protection switch and the input voltage end of the low dropout linear regulator, the source electrode of the first protection switch is connected with the grid electrode of the power control tube, the drain electrode of the first protection switch is grounded, and the source electrode of the power control tube is connected with the voltage output end of the low dropout linear regulator; the second sampling module is respectively connected with the drain electrode of the power control tube, the grid electrode of the power control tube and the clamping module, the clamping module is connected with the grid electrode of the second protection switch through the second current comparator and is also connected with the source electrode of the power control tube, the drain electrode of the second protection switch is grounded, and the source electrode of the second protection switch is connected with the grid electrode of the power control tube. The reliability of current limiting can be improved.

The present invention relates to a duobinary signal reception device and method in which: a variable gain amplifier (VGA) amplifies a duobinary signal; a duobinary-to-non return to zero (NRZ) converter restores an NRZ signal on the basis of a differential signal of the amplified duobinary signal and a predetermined reference voltage signal; a digital regulator voltage (DRV) circuit outputs the restored NRZ signal; and the duobinary-to-NRZ converter comprises an exclusive OR (XOR) gate to which the differential signal of the amplified duobinary signal is input, and a comparator to which an output of the XOR gate and the reference voltage signal are input.

A current comparator includes: a first capacitor having a first end coupled to a first input signal; a second capacitor having a first end coupled to a second input signal; a first transistor having a control electrode coupled to the second end of the first capacitor; and a third transistor having a control electrode coupled to the second end of the second capacitor. The first current electrodes of the first and second transistors are coupled, and the second current electrodes of the first and second transistors are coupled to the first and second circuit nodes, respectively. A single-ended cascode amplifier has an input coupled to the second circuit node via a third capacitor. A set of auto-zero switches selectively shorts the control electrode of the first transistor and the second current electrode in response to an auto-zero control signal, and selectively shorts the control electrode of the second transistor and the second current electrode.

The invention provides an IO port hot plug application circuit and device, and the circuit comprises a pull-down driving module which comprises an MOS tube Mn0, a capacitor C1 and a current source, and the capacitor C1 is connected in parallel between a grid electrode and a source electrode of the MOS tube Mn0; the current source is connected to the grid electrode of the MOS tube Mn0 and provides charging and discharging current for the capacitor C1; the drain electrode of the MOS tube Mn0 is connected with an SCL or SDA signal line, and the source electrode of the MOS tube Mn0 is grounded; the positive input end of the comparator CMP is connected with a reference level, and the negative input end of the comparator CMP is connected with an SDA or SCL signal line; the digital control system comprises a feedback loop of a main switch signal Hjen of a hot plug process and a real-time driving signal Hjctrl of an MOS (Metal Oxide Semiconductor) tube of an analog circuit; the output end of the pull-down driving module is connected with the IO interface, the output end of the comparator CMP is connected to the signal detection end of the digital control system, and the Hjctrl signal end of the digital control system is connected to the control end of the pull-down driving module.

The invention provides a self-adaptive threshold calibration zero-crossing detection circuit. The self-adaptive threshold calibration zero-crossing detection circuit comprises a zero-crossing comparator, a phase inverter, a trigger, a dynamic comparator, a counter and a decoder, the input end of the zero-crossing comparator is connected with GND, switch node voltage, an inversion signal of a lower power tube grid control signal and the output end of the decoder, and the output end of the zero-crossing comparator is connected with the input end of the phase inverter; the input end of the phase inverter is connected with the output end of the zero-crossing comparator, and the output end is connected with the input end of the trigger; the input end of the trigger is connected with the output end of the phase inverter and an inversion signal of an upper power tube grid control signal, and the output end of the trigger is connected with the input end of the dynamic comparator; the input end of the dynamic comparator is connected with GND, switch node voltage and the output end of the trigger, and the output end is connected with the input end of the counter; the input end of the counter is connected with the output end of the dynamic comparator, and the output end is connected with the input end of the decoder; the input end of the decoder is connected with the output end of the counter, and the output end is connected with the input end of the zero-crossing comparator. The flip threshold of the zero-cross detection circuit is changed, and when the inductive current zero-cross phenomenon occurs in a DCM type, the reverse inductive current when the lower power tube is turned off is reduced.

The invention relates to the field of digital power supplies, and particularly provides a method for identifying CCM and DCM modes in a high-power digital power supply, which comprises the following steps: acquiring an inductive current sampling voltage signal and a reference voltage signal, and detecting the level conversion states of the two through a comparator module; if the comparison result accords with a preset error range, recording a DCM mode identifier and calculating an average sampling current value; adjusting an interrupt priority order to match a time sequence characteristic of the capture event, and generating a current state parameter of a mode switching boundary; calculating a correction factor of the average sampling current by combining the overflow times of the counter and rising edge fluctuation frequency data; a duty ratio parameter is updated based on the corrected current value, and a new PWM control signal is generated and output; when the duty ratio deviation exceeds a switching threshold value, dynamically adjusting an interrupt priority parameter and updating a reference value of a counter; and generating a real-time tracking data set of the inductive current zero point according to the final adjustment parameter.

An image sensor includes a plurality of pixel circuits for event detection, wherein each pixel circuit includes at least one output transistor and at least one selection transistor electrically connected in series between at least one pixel output and a first supply potential. A column signal line electrically connects the pixel outputs of the plurality of pixel circuits. A comparator / latch circuit is configured to receive a signal derived from a pixel event signal transmitted on the column signal line at a first comparator input, and to output a latched active column event signal, when the signal at the first comparator input exceeds or falls below a threshold voltage applied to a second comparator input of the comparator / latch circuit.

An adaptive IGBT active drive circuit is divided into two parts: a gate drive circuit, and a feedback circuit. The gate drive circuit includes a totem pole unit, and multi-level resistance switching is achieved by using a totem pole parallel structure. The feedback circuit includes a comparison unit, and a logic unit. The comparison unit includes divided resistors, sampling resistors, and a comparator. Internal currents, after passing through the sampling resistor, are compared with current comparison thresholds of complementary transistors to output a digital signal to participate in control of the totem pole. The logic unit is responsible for logically combining a PWM signal and a signal output by the comparison unit to obtain a driving signal of the totem pole.

The invention provides an automatic frequency locking circuit based on a time-to-voltage converter and a phase-locked loop, and relates to the technical field of phase-locked loops, a first frequency-halving unit and a second frequency-halving unit respectively carry out frequency-halving processing on a reference signal and a frequency division signal of a current comparison period to obtain a first square wave signal and a second square wave signal; the first square wave signal and the second square wave signal are transmitted to the time-to-voltage converter; the time voltage converter comprises a phase generation unit, a first charge pump and a second charge pump, the phase generation unit generates an enable signal according to the first square wave signal and the second square wave signal, and the first charge pump and the second charge pump respond to control of the enable signal and collect single pulse signals from the first square wave signal and the second square wave signal respectively so as to supply power to the input end of the comparator; the comparator compares power supply voltages of the two input ends to achieve frequency comparison of the reference signal and the frequency division signal. And selection in a plurality of phase signals is not needed, and required digital circuit modules are reduced, so that the delay of the reference signal and the frequency division signal in the conversion process is reduced.

Light detection with reduced noise is disclosed. In one example, a comparator compares a signal with a reference signal and outputs a comparison result. The comparator includes a differential circuit that outputs a differential voltage between the signal and the reference signal, and an active load circuit electrically connected to the differential circuit, in which the active load circuit includes first and second transistors provided on a surface of a substrate, and the first and second transistors have channel regions extending in a direction substantially perpendicular to the surface of the substrate.