95 results about "Error amplifier" patented technology

Provided is a power source control device for a DC / DC converter including a high-side transistor, a low-side transistor, and an inductor, the power source control device including a first error amplifier configured to receive a first reference voltage and a feedback voltage based on an output voltage of the DC / DC converter, a second error amplifier configured to receive an output of the first error amplifier and a signal indicating information regarding a current flowing through the inductor, a first comparator configured to receive an output of the second error amplifier and a ramp voltage, a switching control unit configured to perform switching control of the high-side transistor and the low-side transistor according to an output of the first comparator, and a clamp circuit configured to clamp a second amplifier output voltage outputted from the second error amplifier, to a predetermined clamp voltage.

This invention discloses a power supply device, a thermal regulation method, and a power supply system. The power supply device includes a power switch for converting a first power signal into a second power signal according to a control signal; a first current source for providing a current signal to a first node; a control circuit for converting the current signal into the control signal; a temperature-controlled current extraction circuit including at least one temperature sensing element disposed at at least one position on the power switch for generating at least one voltage signal, the at least one voltage signal being respectively related to the temperature of the at least one position; an error amplifier for generating an adjustment signal based on the at least one voltage signal and a reference voltage; and an adjustment switch for extracting an adjustment current from the current signal at the first node according to the adjustment signal.

An isolated DC-DC converter has a transformer with primary, secondary and auxiliary windings, and a secondary-sensing regulation architecture. A primary-side controller has a PWM generator, a wake-up pulse detector, a supply voltage generator and control circuitry. A secondary-side controller has an error amplifier, a switching detector, a wake-up pulse generator, a supply voltage generator and control circuitry. The primary-side controller and the secondary-side controller produce respective supply voltages in such a way that, when the DC-DC converter enters an idle state, the controllers enter respective sleep states wherein the PWM generator and the error amplifier are not supplied, while retaining the ability of producing and detecting a wake-up pulse when necessary.

The application discloses a high-duty-cycle control system of a step-down DC-DC switching power supply, which is additionally provided with a high-duty-cycle control system on the basis of a basic structure of the switching power supply and comprises an LDO, a diode D2 for charging a capacitor C1 by the LDO, an error amplifier, a current comparator, an OR gate, a pulse generator, an RS latch and an under-voltage lockout circuit for detecting a voltage VBS between the capacitor C1. The under-voltage lockout circuit detects the voltage VBS between the capacitor C1, when the voltage is insufficient, temporarily turns off a charging switch tube M1, charges the capacitor C1 for providing a stable voltage power supply for a driving circuit during the turn-off of the M1, restores the power supply voltage of the driving circuit, and then reopens the M1, so as to realize the high-duty-cycle conduction of the NMOS type charging switch tube.

A shunt regulator is provided which can reduce a consumption current at the time of normal operation even if a circuit including a large current flowing at the time of operation is included. The shunt regulator includes a capacitor connected between an output terminal and a ground terminal, a voltage dividing circuit and an output transistor connected between the output terminal and the ground terminal, an error amplifier which controls the output transistor based on a voltage of an output terminal of the voltage dividing circuit and a reference voltage, a nonvolatile memory, a memory control circuit which outputs a read signal of data to the nonvolatile memory, and a voltage detection circuit which detects that the voltage of the output terminal reaches a prescribed voltage which allows a data read operation of the nonvolatile memory, outputs a detection signal to the memory control circuit, and an operation current of the nonvolatile memory is supplied from the capacitor.

A current mode controller for a switching converter is provided. The controller includes an error voltage generator for generating an error voltage dependent on an output voltage and a reference voltage; a current sensing module; an error amplifier; and a control signal generator. The current sensing module senses a current flowing through an energy storage element, receives the error voltage, and generates a slope compensated sensed current signal dependent on the sensed current and the error voltage. The error amplifier receives the error voltage, generates an amplified voltage error signal by applying a first amplification coefficient dependent on the error voltage to the error voltage. The control signal generator generates one or more control signals to control the switching operation of one or more power switches of the switching converter, each of the control signals being dependent on the slope compensated sensed current signal and the amplified voltage error signal.

An apparatus includes: a clock generator configured to generate a set signal fed to a set input of a latch; an error amplifier configured to generate a COMP signal; an offset generator configured to generate different offset voltages; and a comparator configured to generate a reset signal fed to a reset input of the latch, wherein the non-inverting input of the comparator is configured to receive a signal equal to the sum of a current sensing signal and a slope compensation signal, wherein the current sensing signal is equal to the current flowing through a power converter multiplied by an adjustable gain, and the inverting input of the comparator is configured to receive an error signal, wherein the error signal is equal to the COMP signal minus the offset voltage generated by the offset generator.

This invention belongs to the fields of AC / DC microgrid "interface converters", energy storage systems and new energy power generation, and active reactive power compensation, and particularly relates to a discrete indirect power control method and device for grid-connected inverters. The control method in this invention is implemented in the αβ stationary coordinate system, eliminating the need for synchronous rotational coordinate transformation calculations. In this invention, the reference value of the grid-connected inverter output current is obtained through calculations using active / reactive power reference values ​​and grid voltage. A current-type pulse train (PT) control method is used to make the output current follow its reference value, thereby achieving the indirect power control objective. Therefore, the control method provided by this invention does not require an error amplifier and its compensation network (proportional-integral controller), the controller parameter design and digital implementation are relatively simple, and it has the advantage of low software cost, possessing certain academic research and engineering application value.

This invention belongs to the field of analog integrated circuit design, and particularly relates to a low-dropout linear regulator with fast dynamic response and high stability. It includes: an error amplifier, a Class AB buffer stage circuit, an output power transistor, a positive feedback resistor compensation circuit, an undervoltage detection circuit, and a startup circuit. The Class AB buffer stage circuit is used to improve the transient characteristics of the low-dropout linear regulator, and the positive feedback resistor compensation circuit is used to improve the phase margin of the low-dropout linear regulator. This invention achieves fast dynamic response, essentially eliminates overshoot and undershoot phenomena, and significantly shortens the recovery time. It also maintains high stability while ensuring loop gain and includes undervoltage detection functionality to ensure smooth system startup.

The application discloses a low-power bandgap reference current source circuit and a control method, and the circuit comprises a current mode bandgap circuit, an error amplifier input stage circuit, a threshold modulation circuit and a current mirror circuit; the current mode bandgap circuit is internally provided with an error amplifier OPAMP and a proportional resistance network; the error amplifier input stage circuit is a PMOS pair tube input stage circuit; the threshold modulation circuit is a source-liner forward bias threshold modulation circuit, which is used for forward biasing the threshold voltage of all PMOS tubes in the low-power bandgap reference current source circuit and enabling the NMOS tube connected with the error amplifier OPAMP output stage to work in a saturation region; and the current mirror circuit is a series diode compensation method current mirror circuit structure. The application is compatible with a standard CMOS process, realizes sub-1V low voltage, micro-nano ampere level low power consumption, high-precision low-noise small area effect, solves various technical pain points of a traditional scheme, and has excellent application prospects in a wearable device power management system.

A high-voltage (HV) power supply device outputs an output voltage based on a control signal generated by dual analog / digital feedback loops. The control signal is determined at least in part by an error amplifier that receives a measurement signal attenuated proportionally to the output voltage and an output signal from a digital-to-analog converter (DAC). The ADC also receives the measurement signal and transmits it in digitized form to a digital processor. The digital processor calculates a digital DAC data signal based on the measurement signal and a digital setpoint input signal corresponding to a setpoint voltage value desired to be output from the high-voltage source. The DAC receives the DAC data signal and converts it into a DAC output signal that is transmitted to the error amplifier.

This application provides a motor load adaptive adjustment method based on analog circuits, relating to the field of motor control technology, including the following steps: converting the load current in the motor circuit into a first voltage signal, and generating a mode selection signal based on the amplitude and rate of change of the signal; wherein, when the amplitude of the first voltage signal exceeds a first threshold and its rate of change exceeds a second threshold, the mode selection signal indicates a dynamic response mode; otherwise, the mode selection signal indicates a steady-state adjustment mode; when the indication is a steady-state adjustment mode, the first voltage signal is introduced into a first path, which includes a first error amplifier with a first proportional coefficient; when the indication is a dynamic response mode, the first voltage signal is introduced into a second path, which includes a second error amplifier with a second proportional coefficient greater than the first proportional coefficient; generating and outputting a motor drive signal according to the adjustment signal output from the selected path.

The utility model provides a kind of secondary side feedback circuit and switching power supply, secondary side feedback circuit includes controller, error amplifier, photo-coupler, diode and capacitor;The positive input end of error amplifier is sampled by sampling resistance output current of switching power supply, and reference voltage is input in negative input end;The anode of diode is connected with switching power supply secondary side winding, and one end of capacitor is connected with the cathode of diode;The other end of capacitor is connected with secondary side ground;The connection node of diode and capacitor is connected with the power supply end of error amplifier;The diode anode of connecting photo-coupler is connected with the output end of error amplifier;The diode cathode of photo-coupler and the ground end of error amplifier are connected with secondary side ground;The triode of photo-coupler is connected with controller;Controller output control signal controls the output power of switching power supply.The utility model provides secondary side feedback circuit, provides stable power supply voltage for error amplifier, even when the output voltage of switching power supply is zero, error amplifier can also work stably, avoid the problem of loop out of control.

This invention discloses a fast load-response DC-DC boost converter and a power management system. The DC-DC boost converter includes a DC input voltage source V. IN Switches S1 through S5, inductor L, output capacitor C O Output current source I O and flying capacitor C F The invention includes a control subsystem, a drive subsystem, and the DC-DC boost converter. The control subsystem includes voltage divider resistors, a Type-II compensation network based on an error amplifier, a clock and ramp generation circuit, a comparator, an RS latch, dead time, and drive logic circuitry. The drive subsystem includes a switch driver. This invention features fast load response, a wide voltage conversion ratio, and high efficiency.

This invention relates to a high-voltage, capacitor-free, low-noise linear regulator. It comprises a high-voltage switching voltage follower, a self-zeroing error amplifier, and voltage divider resistors. The high-voltage switching voltage follower significantly enhances the system's transient response to load changes and improves power supply rejection in the mid-frequency range. The self-zeroing error amplifier, together with the high-voltage switching voltage follower, forms a global slow loop. The self-zeroing error amplifier employs a ping-pong self-zeroing method, effectively reducing low-frequency flicker noise and offset while ensuring continuous operation in the time domain. This invention introduces a settling phase between the self-zeroing and amplification phases of the ping-pong module, significantly reducing output glitches caused by amplifier settling time. This invention operates stably without an external output capacitor, supports a wide input and output voltage range, and possesses excellent characteristics such as low noise, high power supply rejection, and fast response, making it suitable for various demanding high-voltage power supply applications.

A reference buffer with wide output voltage and current range is provided. A reference buffer includes an error amplifier comprising a first input, a second input, and a first output, wherein the amplifier is configured to generate an output signal indicative of an error between an output reference signal and an internal reference signal. The reference buffer further includes a first voltage follower circuit configured to generate the output reference signal based, at least in part, on the output signal of the error amplifier, wherein the first voltage follower comprises a third input and a second output, and wherein the second output is coupled to the second input of the error amplifier.

A controller of a power converter is disclosed. The controller includes an error amplifier, a compensation circuit, a comparison circuit, an adjustment circuit and a control signal generation circuit. The error amplifier is coupled to the power converter and generates an error signal according to an output voltage. The compensation circuit is coupled to the error amplifier and generates a compensation signal according to the error signal. The compensation circuit includes a compensation resistor. The comparison circuit is coupled to the compensation circuit and generates a trigger signal according to the compensation signal. The adjustment circuit generates an adjustment signal according to a cross-voltage between two terminals of the compensation resistor. The control signal generation circuit is coupled to the comparison circuit and the adjustment circuit and generates a control signal according to the trigger signal and the adjustment signal.

This invention belongs to the field of integrated circuit technology, specifically relating to an LDO circuit that achieves precise zero-point control through Cascode compensation. The circuit includes a first-stage error amplifier, a second-stage buffer, a third-stage output power transistor, a feedback circuit, and a compensation module for precise zero-point control. By employing a unique controlled resistor combined with Cascode compensation technology, this invention achieves precise zero-point tracking of the output power transistor's load current changes during compensation. This solves the core problem of difficulty in controlling the Q-value of the conjugate pole under heavy loads in Cascode compensation, which leads to low bandwidth and slow output transient response.

The application relates to an output version configurable circuit based on a DC-DC converter, and belongs to the field of DC-DC converter circuit design; the circuit comprises a voltage scaling circuit, a decoder logic circuit, a trimming circuit, an error amplifier and a feedback network; wherein the decoder logic circuit comprises a first-stage logic circuit, a second-stage logic circuit, a first NMOS tube matrix and a second NMOS tube matrix; in an initial state, each NMOS tube in the first NMOS tube matrix and the second NMOS tube matrix is in an off state; the circuit can adjust the feedback network voltage dividing resistor proportion through a trimming signal according to actual requirements, thereby changing the proportion of a feedback voltage Vsense and an output voltage VOUT, so that the adjustment of different output versions is realized; meanwhile, the voltage selection signal of the decoding logic is adjusted through the trimming signal, thereby changing a reference signal Vref, and the different output versions and the output voltage precision configurable are realized.

This disclosure provides a low-dropout linear regulator (LDO), comprising: an error amplifier, a buffer, a power transistor, a voltage divider negative feedback unit, and a temperature detection unit. The error amplifier includes at least a first output load and a second output load, wherein the equivalent output impedance of the second output load is greater than the equivalent output impedance of the first output load. The temperature detection unit is used to detect the current operating ambient temperature. When the current operating ambient temperature is greater than or equal to a first temperature threshold, the temperature detection unit drives the error amplifier to use the second output load as the current output load. This disclosure performs real-time detection of the operating ambient temperature through the temperature detection unit. When the detected ambient temperature exceeds the temperature threshold, an enable signal is generated to drive the error amplifier to switch its output load, changing its current output load to an output load with a higher equivalent impedance. This improves the gain of the error amplifier, thereby increasing the loop gain and ultimately improving the accuracy of the LDO output voltage.

This invention discloses an analog-to-digital converter (ADC) for voltage-mode RRAM (Remote Digital RAM) memory circuits, belonging to the field of ADC technology, including a source line SL. i The system includes a sampling module, an error amplifier A, a first quantization circuit, a second quantization circuit, a buffer BU, and power supplies LDO- and LDO+; the source line SL... i The error amplifier A is connected to the sampling module; its inverting input is connected to the sampling module, and its non-inverting input is connected to a capacitor C. C The capacitor C C The lower plate is grounded; power supplies LDO- and LDO+ provide high and low initialization reference voltages V to the first and second quantization circuits, respectively. ref The quantization reference potentials are used to determine the positive or negative value of the quantization value. No external signal control is required. When expanding the quantization bit width, only the number of quantization potentials provided by the power supply needs to be changed, without exponentially increasing the number of comparators or setting up a DAC capacitor array, which greatly reduces the circuit area and power consumption.

This invention provides a radiation-hardened LDO with base current balancing and drive enhancement functions, comprising: a bandgap reference circuit, a base current balancing circuit, an error amplifier circuit, a bias circuit, a startup circuit, a power drive circuit, and a drive enhancement circuit. The base current balancing circuit balances the bandgap reference current, ensuring that the bandgap current remains equal before and after irradiation. The drive enhancement circuit dynamically enhances the load-carrying capacity of the power transistor, ensuring its load-carrying capacity even after irradiation reduces the power transistor's current gain, thus guaranteeing that the output current range is unaffected by irradiation. From a circuit design perspective, this invention utilizes a simple and efficient circuit structure to achieve radiation hardening of the LDO at a relatively low cost, making the LDO circuit insensitive to the degradation of current gain of bipolar devices after irradiation, maintaining a stable output voltage and output load-carrying capacity.

The application belongs to the technical field of electronic circuits, and provides a transient response improvement circuit and a DC-DC converter. The transient response improvement circuit comprises a transconductance amplification module, a current module and a coupling module, the transconductance amplification module is connected with the coupling module, the current module and the common end of a first feedback resistor and a second feedback resistor in the DC-DC converter respectively, the current module is connected with the output end of an error amplifier in the DC-DC converter, and the coupling module is connected with the common end of the first feedback resistor and an output capacitor in the DC-DC converter. The application can improve the transient response of the DC-DC converter without affecting the loop stability. When the load of the DC-DC converter jumps, the circuit outputs a current to the output end of the error amplifier, so that the error control signal changes rapidly, the inductance current peak value is changed rapidly, the change of the load is adapted, the fluctuation of the output voltage is reduced, and the time for stabilizing the output is shortened.

A linear regulator includes a pass element, an error amplifier, and a miller compensation circuit. The error amplifier is configured to provide an error signal to the control terminal of the pass element in response to a reference voltage and a feedback voltage. The error amplifier includes a current mirror stage and a first stage. The current mirror stage is configured to receive the input voltage. The first stage is configured to provide a first current signal to a first terminal of the current mirror stage in response to the reference voltage, and provide a second current signal to a second terminal of the current mirror stage in response to the feedback voltage. The miller compensation circuit is coupled between the second terminal of the pass element and the error amplifier. The miller compensation circuit is configured to control the first current signal.

A low-dropout regulator having an output voltage switching circuit is provided. In the low-dropout regulator, a low-dropout linear regulator circuit outputs a regulating signal according to a voltage difference between a second terminal of a transistor and a regulating threshold voltage signal or a reference voltage. In the low-dropout regulator, a switch error amplifier circuit outputs a pull-up control signal according to a voltage difference between the second terminal of the transistor and a voltage pull-up switching signal. When a voltage selector circuit of the low-dropout regulator selects the regulating signal, the transistor operates to regulate an output voltage of the low-dropout regulator according to the regulating signal. When the voltage selector circuit selects the pull-up control signal, a switch component is turned on by the pull-up control signal such that the output voltage of the low-dropout regulator is directly pulled up by an input voltage.

Circuits and methods for maintaining loop stability and good load regulation in low loop gain LDO regulator circuits. Embodiments encompass LDO regulator circuits that include an offset error correction circuit that generates an opposing voltage VOFFSET as a function of load current to substantially cancel out variations in VOUT that would otherwise occur due to load regulation limitations of the LDO regulator circuits. Embodiments use VOFFSET to imbalance currents in differential paths in a last-stage LDO error-amplifier so that an offset is propagated to a pair of inputs to the error-amplifier, thereby altering the output voltage VOUT to a corrected value. Benefits include improved LDO load regulation even when feedback loop gain is low, the available of both digital and analog implementations, high LDO accuracy and less variation of the output voltage VOUT, and suitability for implementation in integrated circuits for applications such as high precision power supplies.

A DC-DC converter, characterized in that: the converter includes a mode switching unit, a first current detection unit, a second current detection unit, a third current detection unit, and a logic module; wherein, the mode switching unit is used to compare a reference voltage with the output voltage Vea of ​​an error amplifier to obtain a first control signal OUT1; the first current detection unit is used to generate a second control signal OUT2, and the second and third current detection units are used to generate a third control signal OUT3; the logic unit realizes the switching between light-load and heavy-load operating states of the converter based on the first control signal OUT1, and realizes the control of the on and off states of the power transistors in the converter under the light-load operating state based on the second control signal OUT2 and the third control signal OUT3. This invention enables the DC-DC converter to enter a light-load operating mode at a reasonable fixed load current point.

The application relates to the technical field of mixed signal circuits, and provides a pipeline successive approximation type analog-to-digital converter and method for inter-stage gain error calibration. A background calibration scheme is designed by introducing a gain error detection circuit and a calibration circuit. For inter-stage gain error calibration of any two adjacent sub-SAR ADCs, the gain error detection circuit is used to judge the range of residual error, the inter-stage gain error is monitored, and finally the closed-loop gain of the residual error amplifier is calibrated according to the deviation result determined by the inter-stage gain error, so that the closed-loop gain gradually converges to the ideal gain. Compared with the prior art, the aforementioned background calibration scheme belongs to analog domain calibration and can track the change of the gain error with PVT. By directly correcting the actual analog gain in the circuit, the background real-time calibration of the inter-stage gain error is efficiently and accurately realized, and the precision and stability of the pipeline successive approximation type analog-to-digital converter are effectively improved.

This invention discloses an LDO circuit for improving loop stability, relating to electronic circuits, and proposes a solution to address the loop instability problem in existing technologies. An internal ESR compensation module is set up to generate a zero to compensate for the secondary pole of the power transistor's gate, and the output signal is input to the inverting input of the error amplifier through negative feedback. The buffer stage is configured with an adaptive load, which dynamically changes the gate impedance of the power transistor according to the load current. Its advantages include not requiring an external capacitor to provide a specific ESR value, and the output capacitor can be a low-cost, small-size low-ESR ceramic capacitor, reducing component specification limitations. Before the compensation zero appears, negative feedback ensures that the voltage across the added compensation resistor is equal, preventing current flow and thus avoiding DC offset, resulting in a more accurate output voltage. The power transistor gate impedance can be dynamically adjusted according to changes in load current, which is beneficial for achieving loop stability across the entire load range.