728 results about "Error amplifier" patented technology

The invention is suitable for the technical field of LED backlight driving, and provides a starting control circuit for LED backlight driving, a chip and a display device. The starting control circuit of the LED backlight drive comprises a detection selection module, an error amplification module, a first change-over switch module, a control module, a second change-over switch module, a logic drive module, a feedback module and a first switch module. When each first voltage is in a preset range, the first change-over switch module is used for conducting the first input end of the error amplification module and the output end of the error amplification module. And the second change-over switch module is used for transmitting the overcurrent protection signal to the logic driving module. When the detection voltage is larger than the first reference voltage, the first change-over switch module is used for conducting the first input end of the error amplifier and the detection selection module. And the second change-over switch module is used for conducting the control module and the logic driving module. Therefore, the Boost has more response time to respond to the rapid change of the LED.

The invention provides a three-loop on-chip integrated low-dropout linear voltage regulator, which comprises a three-port source follower type voltage follower, which comprises a first anti-phase end, a normal phase end, a second anti-phase end and a first output end; the error amplifier is used for comparing a reference voltage with an output voltage so as to provide a first control signal for the first anti-phase end; the self-feedback bias module is used for receiving an internal voltage signal of the three-port source follower type voltage follower so as to provide a second control signal for the second anti-phase end; the grid electrode of the power tube is connected with the output end, the source electrode is connected with the power supply voltage, and the drain electrode serves as a second output end and is used for receiving the adjusting signal output by the first output end; the output driving current of the power tube is adjusted based on the adjusting signal; and the bias module is used for providing bias voltage for the three-port source follower type voltage follower and the error amplifier. The transient response performance of the voltage stabilizer can be improved under the condition of no off-chip large capacitance.

A soft start circuit of a synchronous boost DC-DC converter is used for restraining current overshoot and voltage overshoot of the synchronous boost DC-DC converter in the starting process and comprises a first soft start module and a second soft start module. The first soft start module belongs to system open-loop work, and suppresses a channel length modulation effect through the same drain end voltage of a clamping matching tube and a power upper tube, so as to obtain a precisely controlled charging current. A second soft start module belongs to system closed-loop work, and the method comprises the following steps: in the first stage, VOUT partial voltage is synchronized; in the second stage, constant-current charging is carried out; and in the third stage, the error amplifier vref rises gently through preset voltage RC charging. According to the invention, current overshoot and voltage overshoot are effectively suppressed through two soft start stages, and the starting circuit has a wide application prospect in the field of starting circuits.

A half-bridge driver circuit periodically repeats switching cycles by closing a first FET via a first drive signal, detecting an instant when a current flowing through the first FET reaches a threshold and then opening the first FET and closing a second FET via a second drive signal. An error amplifier generates a control voltage by comparing a feedback signal with a reference signal, and a variable current generator generates a first current as a function of the control voltage. The error amplifier includes a proportional-integral controller, and a slope compensation circuit that generates a second current as a ramp signal. The threshold is generated by subtracting the second current from the first current. In response to detecting the instant, the second current is sampled and a signal indicative of the threshold is generated by subtracting the sampled second current from the first current.

The utility model discloses a digital auxiliary simulation LDO circuit without an off-chip capacitor. A simulation main loop of the circuit comprises an error amplifier, a buffer stage circuit, a simulation power stage circuit and a VG voltage detection circuit. The digital auxiliary loop includes a digital control logic circuit, a ring oscillator circuit, and a digital power stage circuit. By introducing the digital power adjusting tube, the parasitic capacitance of the grid electrode of the analog power tube is reduced, the pole of the grid electrode is located at high frequency, and on the basis, the super source follower is added to push the pole to higher frequency, so that the circuit has better loop stability. In a steady state, the digital auxiliary loop is forbidden, and the analog main loop can ensure strict adjustment, low quiescent current and no switching noise at the output end; when a load current suddenly changes, a ring oscillator in the digital auxiliary loop is called to generate a clock signal, and the number of conducted digital power tubes is changed, so that response time is not limited by a clock period, dependence on an external clock is avoided, meanwhile, voltage precision and rapid transient response are guaranteed, and static power consumption of the circuit is reduced.

The invention provides a voltage stability control method for a multi-output switching power supply, which comprises the following steps of: sampling a main output channel in real time to obtain a voltage signal; the voltage signal is processed through a wide bandwidth error amplifier, a main channel adjusting signal is generated, and the main channel adjusting signal is used for driving a main power switch device; receiving an input voltage fluctuation frequency band of an auxiliary channel, a load current transient change gradient and a frequency spectrum coupling characteristic of a main channel adjusting signal through a dynamic prediction model, and generating an auxiliary channel adjusting signal with a phase lead compensation characteristic; a cross coupling active offset mechanism is constructed, time domain-frequency domain characteristics of coupling interference are extracted through a high-precision differential detection circuit, amplitude-frequency adjustable reverse correction signals are generated in real time through an adaptive compensation algorithm and injected into control nodes of an auxiliary output channel, and dynamic decoupling and ripple suppression are carried out. According to the method, high-stability control of multi-channel voltage under all working conditions is realized, and the dynamic response speed and the anti-interference capability are improved.

A DC / DC converter includes a converter stage to receive an input voltage and to provide an output voltage from the input voltage in accordance with a modulated drive signal. The converter stage further provides a feedback voltage representing the output voltage. A controller circuit includes an error amplifier to receive the feedback voltage and a reference voltage and to provide an error signal based on the feedback voltage and the reference voltage. A PWM modulator receives a clock signal and the error signal and generates a modulated signal based on the clock signal and the error signal, and a logic circuit receives the modulated signal and generates the drive signal for the converter stage based on the modulated signal so that the drive signal has the same duty cycle as the modulated signal, when the duty cycle of the modulated signal is not smaller than a minimum duty cycle value.

The invention relates to the technical field of chip detection, and discloses a high-reliability power supply chip circuit fault detection system, which comprises a built-in self-test architecture integrated in a low dropout regulator chip, and the built-in self-test architecture is provided with a first test mode and a second test mode which are switched based on a mode switching control circuit. The detection module is used for detecting key performance parameters of an error amplifier sub-circuit in a low dropout linear regulator chip, the detection module is used for measuring the direct current loop gain, the offset voltage, the common mode rejection ratio and the power supply ripple rejection ratio of the amplifier in the first test mode, and the detection module is used for measuring the unity gain bandwidth of the amplifier in the second test mode. According to the invention, through the design of a built-in self-test architecture and two test modes, abnormal states such as differential circuit imbalance and feedback loop fault can be identified in a bare chip stage, chips with poor performance are rejected in advance, and the LDO chip is ensured to reach a ppb-magnitude high reliability standard.

The invention relates to the technical field of LDO circuits, and discloses a dynamic zero compensation circuit which comprises an error amplifier, a zero compensation module, a power tube module and a dynamic bias voltage generation module. The input end of the error amplifier receives a reference voltage Vref and a resistance feedback voltage FB, and the output end of the error amplifier provides a control voltage for the power tube module; the zero point compensation module is electrically connected with the output end of the error amplifier, the dynamic bias voltage generation module generates dynamic bias voltage through dynamic current of the mirror image power tube module and feeds back the dynamic bias voltage to the zero point compensation module to adjust a compensated zero point in real time, and the dynamic bias voltage generation module tracks the power tube current to compensate the zero point. The zero frequency of the zero compensation module is adjusted in real time, and a compensation zero point is dynamically matched with output pole drift, so that the phase margin of a loop in a wide load range is sufficient, the oscillation risk is effectively suppressed, and stable work of the LDO circuit is guaranteed.

An isolated DC-DC converter is provided, including a full-bridge switching stage, a resonant network, a transformer, an output stage, an output stage, an error amplifier, a feedforward controller, a charge sensor and a switch controller. The output stage generates an output signal, wherein the output signal is an output voltage or output current. The error amplifier generates an error signal based on the output signal and a reference signal, wherein the reference signal is a reference voltage or reference current. The feedforward controller senses an input voltage of the full bridge switching stage, and generates a feedforward control signal based on the sensed signal. The charge sensor generates at least one charge sensing signal. The switch controller generates and provides switch control signals to the plurality of active switches in charge control mode based on at least the error signal, the feedforward control signal and the charge sensing signal.

A low-dropout regulator having an output voltage switching circuit is provided. In the low-dropout regulator, a low-dropout linear regulator circuit outputs a regulating signal according to a voltage difference between a second terminal of a transistor and a regulating threshold voltage signal or a reference voltage. In the low-dropout regulator, a switch error amplifier circuit outputs a pull-up control signal according to a voltage difference between the second terminal of the transistor and a voltage pull-up switching signal. When a voltage selector circuit of the low-dropout regulator selects the regulating signal, the transistor operates to regulate an output voltage of the low-dropout regulator according to the regulating signal. When the voltage selector circuit selects the pull-up control signal, a switch component is turned on by the pull-up control signal such that the output voltage of the low-dropout regulator is directly pulled up by an input voltage.

The invention belongs to the technical field of electronic circuits, and provides a negative voltage charge pump circuit, a switching power supply converter and electronic equipment. A reference voltage generation module, a comparison module, a fourth driving module, a fifth power tube, a sixth power tube and a seventh power tube are additionally arranged on an existing charge pump. The reference voltage generation module is used for generating third reference voltage, namely threshold voltage when the negative-voltage charge pump circuit enters the light load, then the comparison module is used for comparing the third reference voltage with error voltage output by the error amplifier, and whether the negative-voltage charge pump circuit enters the light-load working condition or not is judged; when the negative-voltage charge pump circuit enters a light-load working condition, the large-size power tube and the driving module thereof are closed, and only the small-size power tube works, so that other performances of the negative-voltage charge pump circuit are ensured, the working current of the negative-voltage charge pump circuit in the light-load state is greatly reduced, and the working efficiency of the negative-voltage charge pump circuit is improved. Therefore, the conversion efficiency of the charge pump circuit in light load is improved.

An error amplifier includes a first transistor having a first error amplifier input and having first and second current terminals, a second transistor having a second error amplifier input and having third and fourth current terminals, a first resistor coupled between a supply voltage terminal and the first current terminal, and a second resistor coupled between the supply voltage terminal and the third current terminal. The error amplifier has a second stage circuit coupled to the first and second resistors. The second stage circuit has an error amplifier output. The second stage circuit is configured to cause less current to flow through the second stage circuit than a current that flows through either of the first or second resistors or the first or second transistors.

The invention discloses an LDO (Low Dropout Regulator) circuit based on a level conversion and pre-adjustment module. The LDO circuit comprises a reference source, an error amplifier, a pre-adjustment module, a level conversion module, a power switch tube P1, a power circuit tube N1 and resistance feedback networks R1 and R2. The pre-adjustment module carries out voltage reduction processing on an input high-voltage power supply, and the level conversion module generates bias voltage according to an enable signal and the high-voltage power supply, controls a power switch and a switch in the operational amplifier, and ensures that the circuit is resistant to high voltage and extremely low in drain. The error amplifier adjusts the grid voltage of the power circuit according to the feedback and reference voltage difference value, and controls the current to stably output the voltage. And the resistance feedback network realizes closed-loop regulation of the output voltage. Under the condition that the LDO is enabled to be closed, the power tube can be ensured to be completely closed no matter the LDO is under the working voltage of 3V or 5V, so that the electric leakage condition of the LDO is greatly improved, and the LDO has the characteristic of low electric leakage.

The invention provides an output negative voltage protection circuit applied to an N-type power device linear voltage regulator. The output negative voltage protection circuit comprises a voltage comparator, a current comparator, an error amplifier, a buffer driver, a power device MP, a resistor R1, a resistor R2, a resistor Rload and a capacitor Cout. The method comprises the following steps: acquiring a voltage difference between an S-pole output voltage Vout of a power device MP and a reference voltage Vos through a voltage comparator, converting the voltage difference into a current signal Ieg, and comparing the current signal Ieg with a reference current Ios through a current comparator to generate a current signal Ilim; adjusting the output of an error amplifier according to the current signal Ilim, and dynamically adjusting the G pole voltage Vgate of the power device MP; when the output voltage Vout is lower than the reference voltage Vos, the G pole voltage Vgate is pulled down to turn off the power device MP through the current signal Ilim, and protection of the power device MP is achieved.

The utility model discloses a constant-current and constant-voltage circuit without software control, which comprises a Buck power level circuit, a voltage sampling circuit, a current sampling circuit and an error amplifying circuit, and the error amplifying circuit is provided with a first error amplifier and a second error amplifier. The output end of the first error amplifier and the output end of the second error amplifier are electrically connected with the Buck power level circuit, the Buck power level circuit is electrically connected with the voltage sampling circuit and the current sampling circuit, the voltage sampling circuit is electrically connected with the first error amplifier, and the current sampling circuit is electrically connected with the second error amplifier. An FREQ pin of a Buck chip U4 is grounded, a 0.76 V voltage is obtained through voltage division by a resistor R27 and a resistor R29, so that the switching frequency of a Buck power level circuit is invalid, the voltage is controlled through a first error amplifier, the current is controlled through a second error amplifier, the first error amplifier and the second error amplifier carry out operation, and then a PWM comparator in the Buck chip U4 is controlled through a COMP pin of the Buck chip U4. Therefore, voltage and current are controlled.

The invention belongs to the technical field of integrated circuits, and particularly relates to a high-voltage LDO (Low Dropout Regulator) circuit with an off-chip capacitor, which comprises an error amplifier EA, a buffer circuit BUFFER, a power tube made of a first P-type DEMOS, an output voltage dividing sampling resistance circuit consisting of a first resistor R1 and a second resistor R2, a floating rail circuit, an enabling circuit and a load capacitor, the floating rail circuit comprises a Zener diode and a third resistor, and a floating low power rail VFLOAT having a stable difference value with the input voltage is provided for the EA and the BUFFER through the reverse bias breakdown voltage of the Zener diode; according to the characteristics of low output impedance and low input parasitic capacitance of the BUFFER circuit, a low-frequency secondary pole composed of an EA high output resistor and a power tube large grid parasitic capacitor is split into two high-frequency poles, and the loop stability of the high-voltage LDO is guaranteed.

The invention provides a transimpedance type flip voltage following driving linear voltage regulator, which comprises a control module and a transimpedance type flip voltage follower, namely a TIFVF module, and is characterized in that the control module comprises an error amplifier and a voltage-current converter which are connected in series; the output voltage Vout passes through a selectable divider resistor and then is fed back to an error amplifier to be compared with the reference voltage Vref to obtain an error signal, the error signal is amplified and conditioned by a compensation network to obtain a control voltage signal Vctrl, and the control voltage signal Vctrl passes through a voltage-current conversion circuit to obtain a current control signal Ictrl required by the TIFVF; the whole forms a negative feedback loop, and two links of error amplifier-voltage and current conversion provide enough loop gain.

The utility model provides an improved on-chip capacitor-free LDO circuit, which comprises an error amplifier EA, a buffer stage Buffer, a PMOS power tube Mp, a resistor R1 and a resistor R2, the buffer stage Buffer is realized by adopting an NMOS + PMOS combination, and an NMOS tube of the buffer stage Buffer is changed into a native NMOS tube from a common NMOS tube. According to the circuit, the problem that the LDO cannot work normally under the conditions of zero load and light load can be solved, and normal work under the conditions of heavy load and low power supply voltage can be ensured.

The invention provides a feedback compensation circuit for a switching power supply. The feedback compensation circuit comprises a reference voltage source, an error amplifier, a feedback capacitor, a sampling circuit, an optocoupler output circuit and a PWM control chip, output voltage is connected to the inverted input end of the error amplifier through the sampling circuit, the reference voltage source is connected to the in-phase input end of the error amplifier, and the output end of the error amplifier is connected to a feedback pin of the PWM control chip through the optocoupler output circuit. The sampling circuit comprises an upper sampling resistor, a lower sampling resistor, a second resistor and a second capacitor; the feedback capacitor is connected between the inverting input end and the output end of the error amplifier; by selecting feedback capacitors with different capacities, the low-frequency gain of a transfer function from output to control of the feedback compensation circuit is adjusted. According to the invention, the element parameter design process is greatly simplified, the controllability of low-frequency gain is enhanced, and the technical effects of easy parameter design and simple debugging are achieved.

The invention belongs to the field of integrated circuit power supply chip design, and particularly relates to an overshoot and undershoot suppression transient enhancement circuit applied to an LDO (Low Dropout Regulator), which consists of a band-gap reference circuit, an error amplifier, a power tube PMOS (P-channel Metal Oxide Semiconductor) tube MP1, a second-stage amplifier tube NMOS (N-channel Metal Oxide Semiconductor) tube MN1, a resistor R4, a load resistor RL and an on-chip load capacitor CL, the self-adaptive zero point module consists of a resistor R3, a capacitor C1 and an NMOS (N-channel Metal Oxide Semiconductor) tube MN2, the LDO feedback network consists of a resistor R1 and a resistor R2, and the module is used for inhibiting output voltage uprush and downrush. According to the invention, through the upshoot suppression circuit and the undershoot suppression circuit, effective suppression of upshoot and undershoot generated during load sudden change is realized, the recovery time of upshoot and undershoot voltage is shortened, and the upshoot suppression circuit only generates a small amount of quiescent current consumption; the undershoot suppression circuit does not generate extra static consumption under the whole LDO working state due to the effect of the capacitor.

The invention relates to the technical field of power management, in particular to a two-way switching LDO framework suitable for an MCU sleep mode. Comprising a main LDO, an auxiliary LDO and a current detection circuit. The main LDO comprises a second error amplifier and a second adjusting tube; the auxiliary LDO comprises a first error amplifier and a first adjusting tube; the main LDO and the auxiliary LDO share the same voltage feedback network, and the voltage reference and the feedback output of the voltage feedback network are connected with the input end of the first error amplifier and the input end of the second error amplifier at the same time. The outputs of the first adjusting tube and the second adjusting tube are short-circuited and then are output to the MCU, and are simultaneously input to the input end of the voltage feedback network; the input end of the current detection circuit is connected with the output end of the first error amplifier, and the output end is connected with the current switch of the second error amplifier. The architecture provided by the invention meets the requirements of low power consumption and quick response of the MCU, and the power consumption of the architecture is not influenced by the power consumption of the MCU.

The invention relates to the technical field of power supply circuits, in particular to a pulse constant-current power supply circuit for camera intermittent trigger LED constant-current control, a voltage-adjustable Boost power supply module of the pulse constant-current power supply circuit comprises an oscillator, a power supply management chip U1, a first path error amplifier and a second path error amplifier, and the first path error amplifier is used for adjusting the duty ratio of a PWM signal; the second path error amplifier is used for limiting the maximum current; the pulse constant current module supplies power through an internal BOOST boost power supply or an external constant voltage source; and a processor module. The oscillator is matched with the power management chip U1 to generate a sawtooth wave oscillation signal, the two error amplifiers are used for jointly controlling output, the two error amplifiers are responsible for voltage feedback and current limitation respectively to ensure the stability and safety of the system, the first error amplifier is adjusted through a voltage signal output by the MCU DAC, and the second error amplifier is used for adjusting the voltage signal output by the MCU DAC. And the second error amplifier is used for current detection to prevent an overcurrent condition.

In described examples, an integrated circuit (IC) includes an error amplifier, first and second resistors, first and second transistors, and a current source. A control terminal of the first transistor is coupled to an output of the error amplifier. A first terminal of the second transistor is coupled to a first terminal of the first transistor and a first terminal of the first resistor. A control terminal of the second transistor is coupled to a second terminal of the first resistor, a second terminal of the second resistor, and a first input of the error amplifier. A first terminal of the current source is coupled to a second terminal of the second transistor.

The invention provides an error amplifier for peak current mode control and a converter system. The error amplifier comprises a transconductance amplifier, a voltage clamping module, a voltage-current converter, a slope compensation module, a current clamping module and a mirror image tube, the negative end of the transconductance amplifier is used for loading feedback voltage, and the positive end is used for loading reference voltage; the output end of the transconductance amplifier, the output end of the voltage clamping module and the input end of the voltage-current converter are electrically connected; the voltage-current converter generates error current; the slope compensation module is used for performing slope compensation on the error current to generate a compensated current; the output end of the slope compensation module, the output end of the current clamping module and the positive end of the high-side comparator are electrically connected with a second reference node; and the mirror image tube is used for loading the comparison voltage to the positive end of the high-side comparator. The error amplifier provided by the invention can realize more stable mode switching and more accurate current limiting control.

A power converter having a current limit protection mechanism is provided. An error amplifier of the power converter multiples a difference between (a divided voltage of) an output voltage of the power converter and a reference voltage by a gain to output an error amplified signal. A comparator of the power converter compares the error amplified signal with a ramp signal to output an on-time signal. A current limiting circuit of the power converter detects data related to a high-side switch and a low-side switch of the power converter. The current limiting circuit of the power converter compares working periods and non-working periods of the on-time signal with blanking times to output a current limiting signal. A control circuit of the power converter, according to the current limiting signal, determines whether to control the high-side switch and the low-side switch according to the detected data.

The present invention discloses an LDO circuit with soft start and foldback current limiting protection functions, including a bandgap reference module, a soft start module, a voltage selection module, a current limiting protection module, a first error amplifier, an output power tube, a first voltage divider resistor, and a second voltage divider resistor; the present invention realizes that there is no overshoot when the LDO is powered on, and the power consumption of the chip after entering the foldback current limiting is greatly reduced, thereby ensuring the safety of the chip. By reusing the control signal of the soft start circuit, the problem of failure to start with a constant current load in the traditional foldback protection circuit is solved, and the ability to power on with a load is improved. At the same time, it can be easily adjusted by V SET The voltage can flexibly adjust the current limit value at power-on according to the load requirements, providing good protection for the chip while meeting the application requirements.

To provide a controller in which total harmonic distortion (THD) can be improved.SOLUTION: A controller (700) includes: a first external terminal receiving a first voltage (Vmult) with a full-wave rectified waveform; a second external terminal receiving a first detection voltage (Vis), as a negative voltage, generated by a current flowing through a sense resistor (Ris) connected to a ground potential application terminal; an error amplifier circuit (710) generating a second voltage (V2) by amplifying an error between a second detection voltage (Vs) corresponding to an output voltage (Vdc) and a reference voltage (Vref1); an arithmetic circuit (733) generating a third voltage (V4) by multiplying the first and second voltages; an inverting amplifier (734) generating a fourth voltage (V5) by inverting and amplifying the first detection voltage; and a comparator (735) comparing the third voltage and the fourth voltage.SELECTED DRAWING: Figure 11

The invention discloses a clamping circuit of an error amplifier, which belongs to the field of analog integrated circuits and comprises an error amplifier EA, a low-voltage clamping circuit and a high-voltage clamping circuit. The error amplifier EA comprises a first-stage operational amplifier, the non-inverting input end of the first-stage operational amplifier is connected with feedback voltage VFB, the inverting input end of the first-stage operational amplifier is connected with reference voltage VREF, and the first-stage operational amplifier outputs VC voltage; the error amplifier EA is used for amplifying the change of the feedback voltage VFB; when the VFB is reduced or increased, the corresponding low-voltage clamping circuit or the high-voltage clamping circuit works, the output VC of the first-stage operational amplifier is clamped to the low-voltage clamping limit VclampL or the high-voltage clamping limit VclampH, the VC is controlled to be within a certain range, then clamping of the output current IEA of the error amplifier EA is achieved, quick response and stable adjustment of a loop are achieved, and meanwhile the function of protecting the circuit is achieved.

The invention discloses an LDO (Low Dropout Regulator) with a load transient response enhancement circuit and electronic equipment, and belongs to the technical field of integrated circuits. The circuit comprises an error amplifier, a buffer, a power tube, a feedback circuit, a compensation circuit and an LTRE module. The output end EAO of the error amplifier is connected with the grid electrode of the power tube through the buffer, the error amplifier compares reference voltage with feedback voltage, an EAO signal adjusts the conduction degree of the power tube, and the output voltage of the LDO is kept stable; the compensation circuit comprises an NMOS tube and a capacitor. The grid of the NMOS tube is connected with the input end of the buffer, the drain is connected with one end of the capacitor, and the source is grounded; the other end of the capacitor is connected with the EAO; one end of a delay circuit in the LTRE module is connected with the input end of the buffer, and the other end of the delay circuit is connected with the grid electrode of the NMOS tube, so that the grid electrode voltage is delayed to rise when the buffer voltage rises. The circuit has the advantages of low working voltage, low voltage drop and low static power consumption, and the transient response can be enhanced when the load current is increased or decreased.