31 results about "Dynamic circuit" patented technology

The invention provides intelligent assistant software of a motor train unit and a fault diagnosis and disposal method thereof, and belongs to the technical field of railway transportation. Through cooperative work of the central control unit and multiple modules, intelligent closed-loop management of fault processing of the motor train unit is realized: the system can analyze HMI fault information in real time and automatically match an optimal maintenance scheme, and by combining three-dimensional space positioning, a dynamic circuit schematic diagram and a fault processing scheme, the fault positioning and processing efficiency is remarkably improved; through torque standard automatic pushing and visual guidance, the risk of manual operation errors is effectively reduced; the emergency response time is greatly shortened based on an automatic notification mechanism of a fault level and generation of a personalized disposal scheme; through intelligent linkage and data sharing among the modules, whole-process auxiliary decision support from fault discovery, diagnosis analysis to disposal implementation is formed, normalization and accuracy of maintenance operation are improved, and system performance is continuously optimized through historical data accumulation and adaptive learning.

This application relates to a method and system for automated intelligent transaction monitoring, circuit breaking, and rapid recovery. The scheme includes: a data acquisition module configured to collect transaction data in real time, the transaction data including various indicator data; an intelligent anomaly detection module configured to evaluate the health score of the order transaction system based on the collected indicator data and predefined rules; and a dynamic circuit breaking and recovery decision module configured to automatically trigger different levels of circuit breaking mechanisms based on the severity of detected anomalies and a circuit breaking strategy set according to the scenario, while also providing a corresponding gradual recovery mechanism.

This invention discloses a dynamic checksum extraction circuit construction method for neutral atom quantum computing, belonging to the field of quantum computing technology. It includes: a checksum extraction construction module library generation unit, used to traverse the parameterized checksum extraction circuit space, generate candidate circuits based on the evolution logic of the qubit detection region, and select effective circuits; an offline circuit characteristic characterization unit, used to perform structural screening and preliminary performance screening of effective circuits to obtain feasible circuits, and to characterize the atomic loss tolerance of feasible circuits, generating a loss tolerance distribution for each feasible circuit on the surface code plane; and an online dynamic circuit construction unit, used to calculate the fitness score of each feasible circuit based on the measured atomic loss position and the loss tolerance distribution, dynamically selecting the optimal circuit as the next round of checksum extraction circuit. This invention can dynamically match atomic loss patterns without increasing circuit overhead, effectively suppressing atomic loss errors and improving fault tolerance performance.

The invention relates to the field of comparators, in particular to a wiring terminal for a comparator and a multi-power-supply high-speed dynamic circuit comparator.The wiring terminal comprises a shell, a socket is formed in one side of the shell, pins are connected to the bottom end of the shell in an inserted mode, and a double-pressing-position locking mechanism is arranged in the shell; the circuit also comprises a pre-amplification circuit, a latch circuit and a power supply voltage boost circuit. According to the wiring terminal, the wire core and the insulating sheath part are pressed through the double pressing blocks respectively, wiring is more stable and reliable, the problem that connection is fragile and vulnerable due to the fact that an existing terminal for high-speed comparator power supply wiring only allows the wire core part to be clamped is effectively solved, the voltage of a latch circuit is increased through the power supply voltage booster circuit, capacitor discharge compensation is achieved, and the wiring quality is improved. Therefore, the positive feedback current is increased, the high positive feedback speed is achieved, high-speed operation is achieved, and meanwhile the low-power-consumption performance of the high-speed dynamic comparator is effectively achieved.

System (100) for improving energy efficiency and capacity in a massive multiple-input multiple-output (MMIMO) mobile network, wherein the system (100) comprises: a precoding module (102) configured to perform downlink transmission from a base station with a plurality of antennas and to reduce interference between users; a reduction module (104) configured to model and minimize static and dynamic circuit components of the base station; a selection module (108) configured to activate a subset of antennas that have higher transmission efficiency; where coordinated operation of the precoding module, the reduction module and the selection module improves the overall energy efficiency and network capacity of the MMIMO mobile network.

This invention discloses a method and terminal for overcurrent modeling of a power supply system. It establishes an equivalent circuit model of the DC bus transmission line during short-circuit transients using an R-C-L model to represent the DC network power transmission line. A fuse model is placed near the lithium-ion battery in the equivalent circuit model, and the fuse's melting process is divided into a pre-arc process and an arcing process. During the pre-arc process, the fuse's inductance is ignored, and it is equivalent to a variable resistor. Circuit equations for the pre-arc process are established, along with arcing conditions. During the arcing process, the arc initiation model is equivalent to a variable resistor in series with a voltage source. Dynamic circuit equations for the arcing process are established, along with fault judgment conditions and fuse melting conditions. Based on the equivalent circuit model and the fuse model, a system model of the power supply system is constructed. This invention establishes a more accurate system model, enabling more effective modeling and simulation.

The application discloses an experimental circuit and method based on a second-order dynamic circuit simulating a bomb defusing process, and relates to the technical field of teaching experimental circuits. The application comprises a second-order dynamic circuit, a logic judgment circuit, a timing display circuit and an external alarm circuit. The application uses a disconnecting switch to simulate the operation of cutting a wire in the bomb defusing process, uses a Laplace transform method to analyze the second-order dynamic circuit, converts the second-order dynamic circuit into a star connection through a star-delta conversion method, finally judges the wire breaking position, and uses an alarm lamp and a buzzer to simulate the bomb defusing effect. In the dynamic circuit, the breaking of three different wires will respectively cause the voltage of one node of the circuit to increase, remain unchanged or decrease. After the logic judgment circuit discriminates the voltage change, a logic control signal is generated to stop the countdown or trigger the external alarm device to alarm, so that the success or failure of the bomb defusing is simulated. The interesting experiment is used to guide students to analyze the second-order dynamic circuit by using the Laplace transform method.

One or more systems, devices, computer program products and / or computer- implemented methods of use provided herein relate to multi-dimensional empirically adapted dynamical decoupling for dynamic circuits. For example, a system can comprise a memory that can store computer executable components and a processor that can execute at least one of the computer executable components that can obtain a graph of a quantum processor that represents qubit connectivity and collisions in the quantum processor. The computer executable components can further determine a first dynamical decoupling strategy for collision qubits. The computer executable components can further determine, based on the graph of the quantum processor, a second dynamical decoupling strategy for non- collision qubits through empirical learning. The computer executable components can further apply the first dynamical decoupling strategy and the second dynamical decoupling strategy to a quantum circuit. The computer executable components can further perform the quantum circuit on the quantum processor.

The invention discloses a dynamic syndrome extraction circuit construction oriented to neutral atom quantum computing, which belongs to the technical field of quantum computing and comprises a syndrome extraction construction module library generation unit, a syndrome extraction circuit space traversal unit, a syndrome extraction circuit space traversal unit and a syndrome extraction circuit space traversal unit, candidate circuits are generated according to evolution logic of the quantum bit detection area, and effective circuits are screened out; the circuit characteristic offline characterization unit is used for carrying out structure screening and performance preliminary screening on the effective circuits to obtain feasible circuits, carrying out atom loss tolerance characterization on the feasible circuits, and generating loss tolerance distribution of the feasible circuits on the surface code plane; and the circuit online dynamic construction unit is used for calculating the fitness score of each feasible circuit according to the actually measured and fed back atom loss position and the loss tolerance distribution so as to dynamically select the optimal circuit as the next round of syndrome extraction circuit. According to the method, the atom loss mode can be dynamically matched without increasing the circuit overhead, the atom loss error is effectively inhibited, and the fault-tolerant performance is improved.

The application discloses a programmable non-glitch period delay control circuit based on TSPC and belongs to the technical field of integrated circuits. In order to solve the problems of dynamic node leakage, logic state loss of existing TSPC dynamic circuits under long waiting periods, and easy generation of glitches in high-frequency clock switching, the application adopts a two-stage programmable multi-mode frequency divider architecture, forcibly locks all TSPC dynamic nodes to a fixed low level through a low-level effective asynchronous reset end in a waiting period, and ensures the stable establishment of a gating signal in a clock low-level window through a half-cycle timing constraint design. The application supports independent programmable configuration of waiting periods and release periods, can realize non-glitch clock control under a super-high frequency of more than 5GHz in a full PVT working condition, has super-low standby power consumption and high reliability, and is suitable for clock path management, read-write phase calibration and low-power mode switching of a DDR memory interface and the like.

In some aspects, an electronic device may detect a start of a voltage ramp transition period associated with changing a voltage of an integrated circuit operation from a first voltage to a second voltage, wherein changing the voltage from the first voltage to the second voltage causes a change in one or more parameters that affect performance associated with the integrated circuit during the voltage ramp transition period. The electronic device may trigger a dynamic calibration mode in response to detecting the start of the voltage ramp transition period that compensates for changes in one or more parameters that affect performance associated with the integrated circuit during the voltage ramp transition period. The electronic device may exit the dynamic calibration mode in response to detecting an end of the voltage ramp transition period. Numerous other aspects are described.

The invention discloses a dynamic fusing and self-healing method for a task scheduling system, which comprises the following steps of: S1, performing task fusing and resource protection: S101, configuring monitoring parameters, and completing initialization work of a monitoring system; and S102, carrying out real-time state acquisition. Through the setting of the task fusing and resource protection mechanism, the abnormal task can be automatically intercepted based on the dual-threshold fusing algorithm of the task execution time length and the concurrent operation number of the same task, system crash caused by single-point fault diffusion is prevented, task-level fusing and system-level resource adjustment are integrated into a closed-loop self-healing system, and the system reliability is improved. According to the method, low-cost resource protection is achieved by suspending / recovering tasks, in addition, through setting of a dynamic capacity expansion and contraction mechanism, thread pool resources are elastically adjusted along with system loads, resource waste and contention are avoided, and the problems that resource distribution is rigid and the utilization rate is low are solved.

Reduce power consumption in semiconductor devices. The semiconductor device includes a latch circuit composed of dynamic circuitry. The latch circuit includes a first circuit with decoding functionality, multiple capacitors, multiple clock input terminals, a signal input terminal, a first output terminal, and a second output terminal. During a first clock signal of "H", the potential of the first capacitor is refreshed according to the decoding result of the first circuit. During a second clock signal of "H", the potential of the second capacitor is refreshed according to the potential of the first capacitor, and the first output terminal receives the potential of the second capacitor as a first output signal. During a third clock signal of "H", the potential of the third capacitor is refreshed according to the potential of the second capacitor, and the second output terminal receives the potential of the third capacitor as a second output signal.

The application relates to a battery pack (100) for a hand-held power tool (300), having at least one interface (180) for establishing an electrical connection of the battery pack with the hand-held power tool and / or a charger, • wherein the interface has contact elements (140) for electrically contacting corresponding counter contact elements (340) on the hand-held power tool and / or corresponding counter contact elements on the charger, • wherein at least one contact element is a signal contact element (143) which is electrically connected to at least one coding element (141) of the battery pack; • a battery pack electronics, wherein the battery pack electronics is designed to provide information about the battery pack via the at least one signal contact element, wherein the information about the battery pack is at least partially stored in the at least one coding element; • wherein the at least one coding element is connected in parallel to a dynamic circuit route in the battery pack electronics (800).

The invention discloses an AC-AC converter suitable for a cross-well electromagnetic emission system, and belongs to the technical field of cross-well electromagnetic detection. Comprising an FPGA control module, the FPGA control module is connected with a power supply module and a driving circuit module, the power supply module is connected with an inverter module and the driving circuit module, the inverter module and the driving circuit module are connected with a full-bridge AC-AC converter module, and the full-bridge AC-AC converter module is connected with a coil load. According to circuit characteristics of a full-bridge AC-AC converter module, a state space averaging model is established based on a state space averaging method; a transfer function between the duty ratio signal and the output voltage signal, a transfer function between the duty ratio signal and the inductive current signal and a transfer function between the inductive current signal and the output voltage signal are separated and obtained to obtain a dynamic circuit state; and a current loop QPR controller and a voltage loop PI controller are combined to control the cross-well electromagnetic emission system. According to the invention, the overall control performance of the cross-well electromagnetic emission system is greatly improved.

The invention discloses a self-rotation system based on a conductive liquid crystal elastomer and a control method.The self-rotation system comprises a flexible wire, a disc, a voltage source, a connecting wire, a wire protection plastic pipe and a conductive track, the flexible wire comprises the liquid crystal elastomer and a resistance wire, and the resistance wire is arranged in the liquid crystal elastomer; the voltage source is connected with the resistance wire through the connecting wire, one end of the flexible wire is connected with the left connecting wire, the other end of the flexible wire is connected with a conductive binding post on the disc, the binding post can slide in the conductive track in a contact mode, and the conductive track is suspended on one side of the disc. According to the invention, a continuous and periodic rotation process can be realized, a dynamic circuit system and a self-rotation engine system are constructed, and integration of a driver and a controller is realized.

The application provides a modular radio frequency receiving front end with fast power-on capability. The modular radio frequency receiving front end comprises a filtering limiting front end, a switch filtering amplification circuit, a power division circuit, a large dynamic SDLVA circuit and an SDLVA power supply circuit, and is connected with each functional module through an SMP joint to realize modular design, detects the performance of each circuit through multi-stage self-checking, increases the isolation degree between the SDLVA chip and the rear-stage operational amplifier circuit through an operational amplifier, and provides the power supply voltage of the ns level rising edge for the SDLVA detection module, so as to reduce the complexity of the radio frequency signal interconnection and the power supply control wiring of the multi-channel receiving front end, and has the characteristics of modular design, high sensitivity, high reliability, strong universality and the like.

A rack cabinet (1) for electronic devices comprises a compartment (2) defining a cavity (2b) delimited by heat-insulating walls (2a), a support (3) for electronic devices, housed in the compartment (2) and extending at least between two opposite side walls, and a refrigeration cycle cooling apparatus (4) housed in a chamber separate from the cavity (2b) and in fluid communication with it to cool a volume of air inside it. The cooling apparatus (4) and the compartment (2) are operatively associated with each other to define a closed and isolated fluid-dynamic circuit for cooling said volume of air. The rack cabinet (1) also comprises a first temperature detecting element (5) to detect a target temperature inside the cavity (2b) and generate a temperature signal, and a control unit (6) configured to act on the cooling apparatus (4) as a function of the generated signal to change the temperature of the air volume.

The application discloses a scene self-adaptive intelligent circuit breaker cascade control platform, and relates to the related field of emergency protection circuit devices, which comprises the following steps: searching and calling the service record of an intelligent circuit breaker, performing hierarchical clustering and logical fuzzification, and determining a control response logic; configuring a parallel microprocessor, combining a host coordinator, and building an intelligent control unit; monitoring and reading dynamic circuit data of the intelligent circuit breaker, performing data verification and compensation based on a confidence interval, determining effective circuit data, combining the intelligent control unit, performing microprocessor matching and decision-making, performing strategy defuzzification, and determining a pre-control strategy; and controlling and managing the intelligent circuit breaker, with the pre-control strategy responding to a cascade controller, wherein the cascade controller comprises a control outer ring and a control inner ring. The application solves the technical problem that the control strategy of the circuit breaker in the prior art is difficult to adapt to complex and changeable power environments and cannot match the requirements of modern power systems on safety, reliability and high efficiency.

This utility model relates to a resistance strain gauge type hollow tubular torque sensor for a mid-mounted motor, belonging to the technical field of electric-assisted bicycles. The utility model includes a Hall element board, a static circuit board, a dynamic circuit board, an outer cover, a magnetic ring, and a resistance strain gauge. The Hall element board is connected to the static circuit board and mates with the magnetic ring. The static circuit board mates with the dynamic circuit board, and the static circuit board is fixed inside the outer cover. Its structural features include: an elastic body and a one-way valve base. The elastic body is threadedly connected to the one-way valve base. The dynamic circuit board and the magnetic ring are both fixed to the elastic body. The resistance strain gauge is adhered to the elastic body. A bearing is installed between the elastic body and the outer cover. The elastic body and the outer cover are abutted and fixed by a retaining spring. The outer wall of the outer cover is provided with a cover locking protrusion to prevent rotation of the outer cover. The static circuit board is connected to a signal line for signal output.

The application relates to a low-power-consumption non-electricity heavy dynamic circuit with anti-jump, which comprises a tripping signal action circuit, a tripping signal reset circuit and an anti-jump circuit. The tripping signal action circuit comprises a voltage dividing resistor, a rectifier diode, a circuit breaker relay, an RC delay circuit, a triode, a tripping outlet relay and a tripping holding relay. The tripping signal reset circuit comprises a voltage dividing resistor, a rectifier diode, a circuit breaker relay, an RC delay circuit, a triode, a tripping outlet relay and a reset holding relay. The anti-jump circuit comprises a voltage dividing resistor, a rectifier diode and an anti-jump relay. The application avoids repeated action of the tripping outlet when the action signal and the reset signal exist simultaneously, and reduces the failure rate.

For systems subject to unbalanced faults, analytical model building for stability assessment is a challenging task. This application presents a straightforward modeling approach. A generalized dynamic circuit representation is achieved by use of the Laplace transform variables. The voltage and current relationship at the fault location is translated into the relationship of three subsystems. The final circuit model is an interconnected sequence network with impedances in the Laplace domain. This circuit can be directly converted from a steady-state sequence network.

The invention discloses a scene self-adaptive intelligent circuit breaker cascade control platform, which relates to the related field of emergency protection circuit devices, and comprises the steps of retrieving and calling service records of an intelligent circuit breaker, performing hierarchical clustering and logic fuzzification, and determining control response logic. A parallel microprocessor is configured and combined with an upper coordinator to construct an intelligent control unit. And monitoring and reading dynamic circuit data of the intelligent circuit breaker, performing data verification compensation based on a confidence interval, determining effective circuit data, performing microprocessor matching and decision making in combination with an intelligent control unit, performing strategy defuzzification, and determining a pre-control strategy. The intelligent circuit breaker is controlled and managed, the pre-control strategy responds to a cascade controller, and the cascade controller comprises a control outer ring and a control inner ring. The technical problems that a control strategy adopted by a circuit breaker in the prior art is difficult to adapt to a complex and changeable electric power environment and cannot meet the requirements of a modern electric power system for safety, reliability and high efficiency are solved.

The invention relates to a cascade utilization battery pack, and belongs to the technical field of batteries, the battery pack comprises a plurality of battery modules, a liquid cooling system, a thermal insulation material, a temperature sensor, a thermal runaway early warning system and a battery management system; the liquid cooling system is used for cooling each battery module through circulating cooling liquid; the thermal insulation materials are arranged among the battery modules, and the temperature sensors are arranged on the battery modules and connected with the thermal runaway early warning system; the thermal runaway early warning system is used for monitoring the temperature of each battery module according to sensing information of the temperature sensor; and the battery management system is used for disconnecting the connection circuit of the battery module with abnormal temperature when the temperature abnormal information sent by the thermal runaway early warning system is received. The thermal runaway risk of the battery module can be found in time, intervention is performed through the liquid cooling system, the thermal insulation material and the dynamic circuit partition, thermal runaway diffusion is prevented, and the safety performance of the battery pack is improved.

This invention discloses a method and terminal for simulating overcurrent in a power supply system. It establishes an equivalent circuit model of the DC bus transmission line during short-circuit transients using an R-C-L model to represent the DC network power transmission line. A fuse model is placed near the lithium-ion battery in the equivalent circuit model, and the fuse's melting process is divided into a pre-arc process and an arcing process. During the pre-arc process, the fuse's inductance is ignored, and it is equivalent to a variable resistor. Circuit equations for the pre-arc process are established, along with arcing conditions. During the arcing process, the arc-initiating model is equivalent to a variable resistor in series with a voltage source. Dynamic circuit equations for the arcing process are established, along with fault judgment conditions and fuse melting conditions. Based on the equivalent circuit model and the fuse model, a system model of the power supply system is constructed. This invention establishes a more accurate system model, enabling more effective modeling and simulation.

The application discloses an AC-AC converter suitable for an interwell electromagnetic emission system and belongs to the technical field of interwell electromagnetic detection. The AC-AC converter comprises an FPGA control module, wherein the FPGA control module is connected with a power module and a driving circuit module; the power module is connected with an inverter module and the driving circuit module; the inverter module and the driving circuit module are connected with a full-bridge AC-AC converter module; and the full-bridge AC-AC converter module is connected with a coil load. According to the circuit characteristics of the full-bridge AC-AC converter module, a state space average model is established based on a state space average method, and the transfer function between a duty cycle signal and an output voltage signal, the transfer function between the duty cycle signal and an inductance current signal and the transfer function between the inductance current signal and the output voltage signal are separated and acquired to obtain a dynamic circuit state. The interwell electromagnetic emission system is controlled in combination with a current loop QPR controller and a voltage loop PI controller. The application greatly improves the overall control performance of the interwell electromagnetic emission system.

This invention belongs to the field of integrated circuit technology, specifically relating to an open-loop residual amplifier circuit for pipelined successive approximation ADCs; it includes: a differential input circuit, a tail current circuit, a third PMOS transistor Mp3, a fourth PMOS transistor Mp4, a third NMOS transistor Mn3, and a fourth NMOS transistor Mn4; the third PMOS transistor Mp3, the fourth PMOS transistor Mp4, the third NMOS transistor Mn3, and the fourth NMOS transistor Mn4 are all connected to the differential input circuit; the tail current circuit is connected to the third NMOS transistor Mn3 and the fourth NMOS transistor Mn4; it does not require a very high open-loop gain, nor does it require a complex common-mode voltage detection circuit, resulting in a simple circuit structure and reduced circuit design difficulty; moreover, this invention is a dynamic circuit, which greatly reduces circuit power consumption and is suitable for low-power ADC design; this invention uses a push-pull input method, which greatly improves the input transconductance and has a large bandwidth, making it suitable for high-speed ADC design.

The application discloses a programmable non-glitch period delay control circuit based on TSPC and belongs to the technical field of integrated circuits. In order to solve the problems of dynamic node leakage, logic state loss of existing TSPC dynamic circuits under long waiting periods, and easy generation of glitches in high-frequency clock switching, the application adopts a two-stage programmable multi-mode frequency divider architecture, forcibly locks all TSPC dynamic nodes to a fixed low level through a low-level effective asynchronous reset end in a waiting period, and ensures the stable establishment of a gating signal in a clock low-level window through a half-cycle timing constraint design. The application supports independent programmable configuration of waiting periods and release periods, can realize non-glitch clock control under a super-high frequency of more than 5GHz in a full PVT working condition, has super-low standby power consumption and high reliability, and is suitable for clock path management, read-write phase calibration and low-power mode switching of a DDR memory interface and the like.

The application relates to the technical field of integrated circuits and provides a differential digital-to-analog converter. The differential digital-to-analog converter comprises two groups of N-bit resistance arrays and a three-state switch array with the same resistance array structure. The differential digital-to-analog converter provides a three-level segmented structure including three different reference voltages, reduces the area overhead of switches, improves on-resistance matching, avoids introducing additional dynamic circuits, helps to reduce static power consumption, and is beneficial to static circuit application and high-precision resistance-type digital-to-analog converter related application.

The invention discloses an outpatient queue AI decision bus method and system based on dynamic fusing and self-healing. The outpatient queue AI decision bus method comprises the following steps: S1, data acquisition and preprocessing: acquiring state, sorting, priority, load and sign-in rule data from a patient table and an association table; according to the method, automatic degradation and service continuity in an abnormal scene are realized through health degree monitoring and a fuse state machine, self-adaptive coordination of a multi-source rule is achieved by relying on a unified health degree evaluation and weight scheduling mechanism, factors such as fairness punishment and priority crowds are quantified by means of an AI multi-factor scoring model so as to balance fairness and efficiency, and the safety of the system is improved. According to the method, strategy recovery compliance and controllability are ensured through shadow parallel evaluation and full-process log auditing, meanwhile, an existing system data table and an SQL are reused, an existing interface is compatible, and on the basis that system robustness is enhanced, decision scientificity is improved, service fairness is guaranteed and supervision compliance is met, hospital deployment cost is reduced.