8 results about "Dynamic circuit" patented technology

This invention discloses a dynamic checksum extraction circuit construction method for neutral atom quantum computing, belonging to the field of quantum computing technology. It includes: a checksum extraction construction module library generation unit, used to traverse the parameterized checksum extraction circuit space, generate candidate circuits based on the evolution logic of the qubit detection region, and select effective circuits; an offline circuit characteristic characterization unit, used to perform structural screening and preliminary performance screening of effective circuits to obtain feasible circuits, and to characterize the atomic loss tolerance of feasible circuits, generating a loss tolerance distribution for each feasible circuit on the surface code plane; and an online dynamic circuit construction unit, used to calculate the fitness score of each feasible circuit based on the measured atomic loss position and the loss tolerance distribution, dynamically selecting the optimal circuit as the next round of checksum extraction circuit. This invention can dynamically match atomic loss patterns without increasing circuit overhead, effectively suppressing atomic loss errors and improving fault tolerance performance.

System (100) for improving energy efficiency and capacity in a massive multiple-input multiple-output (MMIMO) mobile network, wherein the system (100) comprises: a precoding module (102) configured to perform downlink transmission from a base station with a plurality of antennas and to reduce interference between users; a reduction module (104) configured to model and minimize static and dynamic circuit components of the base station; a selection module (108) configured to activate a subset of antennas that have higher transmission efficiency; where coordinated operation of the precoding module, the reduction module and the selection module improves the overall energy efficiency and network capacity of the MMIMO mobile network.

The application discloses a programmable non-glitch period delay control circuit based on TSPC and belongs to the technical field of integrated circuits. In order to solve the problems of dynamic node leakage, logic state loss of existing TSPC dynamic circuits under long waiting periods, and easy generation of glitches in high-frequency clock switching, the application adopts a two-stage programmable multi-mode frequency divider architecture, forcibly locks all TSPC dynamic nodes to a fixed low level through a low-level effective asynchronous reset end in a waiting period, and ensures the stable establishment of a gating signal in a clock low-level window through a half-cycle timing constraint design. The application supports independent programmable configuration of waiting periods and release periods, can realize non-glitch clock control under a super-high frequency of more than 5GHz in a full PVT working condition, has super-low standby power consumption and high reliability, and is suitable for clock path management, read-write phase calibration and low-power mode switching of a DDR memory interface and the like.

The application provides a modular radio frequency receiving front end with fast power-on capability. The modular radio frequency receiving front end comprises a filtering limiting front end, a switch filtering amplification circuit, a power division circuit, a large dynamic SDLVA circuit and an SDLVA power supply circuit, and is connected with each functional module through an SMP joint to realize modular design, detects the performance of each circuit through multi-stage self-checking, increases the isolation degree between the SDLVA chip and the rear-stage operational amplifier circuit through an operational amplifier, and provides the power supply voltage of the ns level rising edge for the SDLVA detection module, so as to reduce the complexity of the radio frequency signal interconnection and the power supply control wiring of the multi-channel receiving front end, and has the characteristics of modular design, high sensitivity, high reliability, strong universality and the like.

A rack cabinet (1) for electronic devices comprises a compartment (2) defining a cavity (2b) delimited by heat-insulating walls (2a), a support (3) for electronic devices, housed in the compartment (2) and extending at least between two opposite side walls, and a refrigeration cycle cooling apparatus (4) housed in a chamber separate from the cavity (2b) and in fluid communication with it to cool a volume of air inside it. The cooling apparatus (4) and the compartment (2) are operatively associated with each other to define a closed and isolated fluid-dynamic circuit for cooling said volume of air. The rack cabinet (1) also comprises a first temperature detecting element (5) to detect a target temperature inside the cavity (2b) and generate a temperature signal, and a control unit (6) configured to act on the cooling apparatus (4) as a function of the generated signal to change the temperature of the air volume.

This utility model relates to a resistance strain gauge type hollow tubular torque sensor for a mid-mounted motor, belonging to the technical field of electric-assisted bicycles. The utility model includes a Hall element board, a static circuit board, a dynamic circuit board, an outer cover, a magnetic ring, and a resistance strain gauge. The Hall element board is connected to the static circuit board and mates with the magnetic ring. The static circuit board mates with the dynamic circuit board, and the static circuit board is fixed inside the outer cover. Its structural features include: an elastic body and a one-way valve base. The elastic body is threadedly connected to the one-way valve base. The dynamic circuit board and the magnetic ring are both fixed to the elastic body. The resistance strain gauge is adhered to the elastic body. A bearing is installed between the elastic body and the outer cover. The elastic body and the outer cover are abutted and fixed by a retaining spring. The outer wall of the outer cover is provided with a cover locking protrusion to prevent rotation of the outer cover. The static circuit board is connected to a signal line for signal output.

The application discloses a programmable non-glitch period delay control circuit based on TSPC and belongs to the technical field of integrated circuits. In order to solve the problems of dynamic node leakage, logic state loss of existing TSPC dynamic circuits under long waiting periods, and easy generation of glitches in high-frequency clock switching, the application adopts a two-stage programmable multi-mode frequency divider architecture, forcibly locks all TSPC dynamic nodes to a fixed low level through a low-level effective asynchronous reset end in a waiting period, and ensures the stable establishment of a gating signal in a clock low-level window through a half-cycle timing constraint design. The application supports independent programmable configuration of waiting periods and release periods, can realize non-glitch clock control under a super-high frequency of more than 5GHz in a full PVT working condition, has super-low standby power consumption and high reliability, and is suitable for clock path management, read-write phase calibration and low-power mode switching of a DDR memory interface and the like.

This invention provides a method for measuring and analyzing electromagnetic parameters in electromagnetic systems, comprising: Step S1, establishing a physical model of the electromagnetic system in a pneumatic directional valve; Step S2, generating a dynamic circuit model through magnetic circuit analysis; Step S3, obtaining the magnetic induction intensity distribution and magnetic field intensity distribution of the armature in the released and engaged states through finite element simulation analysis as simulation results; Step S4, verifying the satisfaction of working conditions by performing magnetic performance analysis on the armature to generate magnetic performance analysis results; Step S5, collecting current waveform data of the coil in the electromagnetic system during energization and de-energization; Step S6, extracting dynamic characteristic parameters from the current waveform data, and combining the magnetic performance analysis results and simulation results as the electromagnetic parameter measurement and analysis results. The beneficial effect is that this invention can achieve a systematic and refined electromagnetic parameter measurement and analysis of electromagnetic systems, integrating the entire chain from theoretical modeling, simulation analysis, magnetic performance verification to dynamic measurement.