6131results about "Logic circuits" patented technology

A sense amplifier-based flip-flop includes a first latch, a second latch, a floating reduction unit, an input signal applying unit, a ground switch and a delay reduction unit. The first latch outputs a signal to a first output terminal pair, and outputs an evaluation signal pair corresponding to an input single pair to the first output terminal pair. The second latch latches the evaluation signal pair and outputs the evaluation signal pair to a second output terminal pair. The floating reduction unit is controlled by signals of the first output terminal pair and is operationally connected between current passing nodes of the first latch to prevent the first output terminal pair from floating. The input signal applying unit is disposed between the current passing nodes and a ground terminal, and receives the input signal pair. The ground switch is disposed between the input signal applying unit and the ground terminal, and is controlled by the clock signal. The delay reduction unit is disposed between the input signal applying unit and the ground switch, and reduces a signal delay from when the clock signal to when the evaluation signal pair is output from the second output terminal pair.

Threshold voltage shifts of transistors which are constituents of a bidirectional shift register are reduced to prevent a malfunction in the shift register. A bidirectional unit shift register includes first and second pull-down circuits (41, 42) connected to the gate of a first transistor (Q1) that supplies a first clock signal (CLK) to an output terminal (OUT). The first pull-down circuit (41) includes a first inverter that uses the gate of the first transistor (Q1) as the input node and that is activated by the first clock signal (CLK), and a second transistor (Q5A) that discharges the gate of the first transistor (Q1) according to the output of the first inverter. The second pull-down circuit (42) includes a second inverter that uses the gate of the first transistor (Q1) as the input node and that is activated by a second clock signal ( / CLK) having a different phase from the first clock signal (CLK), and a third transistor (Q5A) that discharges the gate of the first transistor according to the output of the second inverter.

Transaction scoring is performed in a distributed manner across a client-server computing system. A computing system for processing a transaction includes a server system and a client system. The server system is arranged to process information associated with the transaction, while the client system communicates with the server system and includes a key engine which is arranged to generate keys. The client system and the server system are arranged to cooperate to make probabilistic determinations associated with the transaction. The client is arranged to send the keys generated by the key engine as a transaction to the server system.

The present invention relates to methods, systems and apparatus for capturing, integrating, organizing, navigating and querying large-scale data from high-throughput biological and chemical assay platforms. It provides a highly efficient meta-analysis infrastructure for performing research queries across a large number of studies and experiments from different biological and chemical assays, data types and organisms, as well as systems to build and add to such an infrastructure. According to various embodiments, methods, systems and interfaces for associating experimental data, features and groups of data related by structure and / or function with chemical, medical and / or biological terms in an ontology or taxonomy are provided. According to various embodiments, methods, systems and interfaces for filtering data by data source information are provided, allowing dynamic navigation through large amounts of data to find the most relevant results for a particular query.

In one embodiment to the invention, a semiconductor circuit includes a substrate and a first well formed in the substrate. A first group of field effect transistors is formed in the first well and has a first body. The circuit includes a first body voltage to the first body to forward body bias the first group of field effect transistors. The circuit includes a first isolation structure to contain the first body voltage in the first well. In another embodiment, the circuit further includes a second group of field effect transistors having a non-forward body bias and the first isolation structure prevents the first body voltage from influencing a voltage of a body of the second group of field effect transistors. In yet another embodiment, a second isolation structure adjacent to the second well contain a second body voltage in a second well holding the second group of field effect transistors.

In general, in one embodiment, a computing system that evaluates a fraud probability score for an identity event relevant to a user first queries a data store to identify the identity event. A fraud probability score is then computed for the identity event using a behavioral module that models multiple categories of suspected fraud.

A gate array cell adapted for standard cell design methodology or programmable gate array that incorporates a dual gate FET device to offer a range of performance options within the same unit cell area. The conductivity and drive strength of the dual gate device may be selectively tuned through independent processing of manufacturing parameters to provide an asymmetric circuit response for the device or a symmetric response as dictated by the circuit application.

A method for predicting risk and designing safety management systems of complex production and process systems which has been applied to an FPSO System operating in deep waters. The methods for the design were derived from the inclusion of a weight index in a fuzzy class belief variable in the risk model to assign the relative numerical value or importance a safety device or system has contain a risk hazards within the barrier. The weights index distributes the relative importance of risk events in series or parallel in several interactive risk and safety device systems. The fault tree, the FMECA and the Bow Tie now contains weights in fizzy belief class for implementing safety management programs critical to the process systems. The techniques uses the results of neural networks derived from fuzzy belief systems of weight index to implement the safety design systems thereby limiting use of experienced procedures and benchmarks. The weight index incorporate Safety Factors sets SFri {0, 0.1, 0.2 . . . 1}, and Markov Chain Network to allow the possibility of evaluating the impact of different risks or reliability of multifunctional systems in transient state process. The application of this technique and results of simulation to typical FPSO / Riser systems has been discussed in this invention.

A navigation device and computer implemented method for predicting the destination of a trip, the method being executed by a navigation device, the method comprising the steps of: determining starting parameters, the starting parameters comprising at least the starting point, starting time and date of the trip, executing a destination prediction algorithm, the destination prediction algorithm taking the starting parameters as input and predicting a destination, wherein the destination prediction algorithm is generated by using information of a trip history; determining, upon arrival at the predicted or another destination, the actual destination.

Several inventions are disclosed. A cell architecture using hexagonal shaped cells is disclosed. The architecture is not limited to hexagonal shaped cells. Cells may be defined by clusters of two or more hexagons, by triangles, by parallelograms, and by other polygons enabling a variety of cell shapes to be accommodated. Polydirectional non-orthogonal three layer metal routing is disclosed. The architecture may be combined with the tri-directional routing for a particularly advantageous design. In the tri-directional routing arraingement, electrical conductors for interconnecting terminals of microelectronic cells of an integrated circuit preferrably extend in three directions that are angularly displaced from each other by 60°. The conductors that extend in the three directions are preferrably formed in three different layers. A method of minimizing wire length in a semiconductor device is disclosed. A method of minimizing intermetal capacitance in a semiconductor device is disclosed. A novel device called a "tri-ister" is disclosed. Triangular devices are disclosed, including triangular NAND gates, triangular AND gates, and triangular OR gates. A triangular op amp and triode are disclosed. A triangular sense amplifier is disclosed. A DRAM memory array and an SRAM memory array, based upon triangular or parallelogram shaped cells, are disclosed, including a method of interconnecting such arrays. A programmable variable drive transistor is disclosed. CAD algorithms and methods are disclosed for designing and making semiconductor devices, which are particularly applicable to the disclosed architecture and tri-directional three metal layer routing.

A system for personal medical care, intelligent analysis and diagnosis may include: at least one source of medical information; at least one source of personal medical data for at least one patient; and one or more servers, where the medical information and the personal medical data are accessible to the server(s). The server(s) may include: an artificial intelligence (AI) component for analyzing the personal medical data with the medical information and identifying at least one issue requiring follow-up by the patient or by at least one external authorized entity; and at least one real-time communication link for bi-directional communication with at least one external authorized entity.

An object of the invention is to provide a circuit technique which enables reduction in power consumption and high definition of a display device. A switch controlled by a start signal is provided to a gate electrode of a transistor, which is connected to a gate electrode of a bootstrap transistor. When the start signal is input, a potential is supplied to the gate electrode of the transistor through the switch, and the transistor is turned off. The transistor is turned off, so that leakage of a charge from the gate electrode of the bootstrap transistor can be prevented. Accordingly, time for storing a charge in the gate electrode of the bootstrap transistor can be shortened, and high-speed operation can be performed.

An inductive power transfer system (1) comprises a primary unit (10) operable to generate an electromagnetic field and at least one secondary device (30), separable from the primary unit, and adapted to couple with the field when the secondary device is in proximity to the primary unit so that power can be received inductively by the secondary device from the primary unit without direct electrical conductive contacts therebetween. The system detects if there is a substantial difference between, on the one hand, a power drawn from the primary unit and, on the other hand, a power required by the secondary device or, if there is more than one secondary device, a combined power required by the secondary devices. Following such detection, the system restricts or stops the inductive power supply from the primary unit. Such a system can detect the presence of unwanted parasitic loads in the vicinity of the primary unit reliably.

A primary device for inductive power transfer to a secondary device is disclosed. The primary device includes a primary coil, the primary device being configured to (i) operate in a first mode during which the primary coil transfers power through inductive coupling to the secondary device, and (ii) operate in a second mode during which a foreign object is detected. The primary device further includes a primary controller configured to operate the primary coil (i) using a first frequency during the first mode, and (ii) using a second frequency during the second mode. A method to detect a foreign object which is in proximity of an inductively coupled environment of a primary device is also disclosed.

An integrated circuit system includes a first set of integrated circuit dice each member of the set having a different configuration of input / output circuits disposed thereon and a second set of integrated circuit dice each having different logical function circuits disposed thereon. Each member of the first and second sets of integrated circuit dice include an array of face-to-face bonding pads disposed thereon that mate with the array of face-to-face bonding pads of each member of the other set.

An integrated circuit system includes a first integrated circuit die and a family of second integrated circuit dice. The first integrated circuit die have input / output circuits disposed thereon and further have a first array of face-to-face bonding structures disposed on a first face thereof. Each member of the family of second integrated circuit dice have logical function circuits disposed thereon and further have a second array of face-to-face bonding structures disposed on a first face thereof. The second array of face-to-face bonding structures of each member of the family mates with a different portion of the first array of face-to-face bonding structures.

A method for predictive analytics for a process includes receiving at least one trace of the process, building a probabilistic graph modeling the at least one trace, determining content at each node of the probabilistic graph, wherein a node represents an activity of the process and at least one node is a decision node, modeling each decision node as a respective decision tree, and predicting, for an execution of the process, a path in the probabilistic graph from any decision node to a prediction target node of a plurality of prediction target nodes given the content.

Methods are disclosed for estimating parameters of a probability model that models user behavior of shared devices offering different classes of service for carrying out jobs. In operation, usage job data of observed users and devices carrying out the jobs is recorded. A probability model is defined with an observed user variable, an observed device variable, a latent job cluster variable, and a latent job service class variable. A range of job service classes associated with the shared devices is determined, and an initial number of job clusters is selected. Parameters of the probability model are learned using the recorded job usage data, the determined range of service classes, and the selected initial number of job clusters. The learned parameters of the probability model are applied to evaluate one or more of: configuration of the shared devices, use of the shared devices, and job redirection between the shared devices.

A usage based pattern authenticator for monitoring and reporting on user usage patterns in an operating system using a set of security rules and user usage patterns. This computer system security tool authenticates users at the operating system level in multi-user operating systems. It supports system administrators in limiting the ability of unauthorized users to disrupt system operations using a neural network and set of rules to track usage patterns and flag suspicious activity on the system. The data collection mode collects and stores usage patterns of authenticated users. The training mode trains an artificial neural network and sets the interconnection weights of the network. The production mode monitors and reports on usage patterns, and optionally performs automatic responses when confronted with non-authenticated users.

This invention provides a process and system for a comprehensive surgical assist system, called a Therapy Imaging and Model Management System (TIMMS), which combines and integrates all of the necessary information and communication technology; workflow analysis, data processing and data synthesis; interactive interfaces between surgeon and mechatronic devices; and, cognitive agents; to provide comprehensive assistance and guidance throughout complex medical and surgical therapies, such as image guided surgery. The components of this invention, which are modular, scalable and may be distributed in location, act synergistically to provide functionality and utility that exceeds the sum of its individual parts.A method of performing surgery on a patient comprising the step of comparing a chosen patient's data to statistical data in a repository of patient data to develop a patient specific model, wherein the data comprises information from two or more sub databases selected from the group consisting of workflow data, electronic medical records, diagnostic data, biological data, measurement data, anatomical data, physiological data, genetic data, molecular data, imaging data, chemical data, clinical laboratory data, simulated data, coordinate data and surgical result and wherein the patient specific model aids in the preoperative, operative or post operative phase of surgery performed in real time on the patient.

Systems and methods for performing module-based diagnostics are described. In an exemplary embodiment, sensor values from an actual engine plant are input to an engine component quality estimator which generates performance estimates of major rotating components. Estimated performance differences are generating by comparing the generated performance estimates to a nominal quality engine. The estimated performance differences, which are indicative of component quality, are continuously updated and input to a real-time model of the engine. The model receives operating conditional data and the quality estimates are used to adjust the nominal values in the model to more closely match the model values to the actual plant. Outputs from the engine model are virtual parameters, such as stall margins, specific fuel consumption, and fan / compressor / turbine efficiencies. The virtual parameters are combined with the sensor values from the actual engine plant in a fault detection and isolation classifier to identify abnormal conditions and / or specific fault classes, and output a diagnosis.

A method for predicting a survival rate among individuals, where the survival rate depends in part on a responsiveness of emergency personnel, and the responsiveness of the emergency personnel depends in part on an amount of time taken to route an emergency call to a primary emergency response center, includes determining, by a computer system, a number of emergency calls initially routed to a primary emergency response center. The computer system determines a number of emergency calls initially routed to a secondary emergency response center that, in turn, routes the emergency calls to the primary emergency response center. The computer system calculates a survival rate amount individuals according to a function of the determined number of the number of emergency calls initially routed to a primary emergency response center and the number of emergency calls initially routed to a secondary emergency response center. The calculated survival rate is displayed on a terminal.

A ridesharing system and method involving selected negotiated participation of riders and ride providers. The ridesharing system in a specific implementation involves a computer-implemented capability for computational matching of potential participants in a ridesharing arrangement, wherein such system is adapted for prioritized ranking of target ridesharing attributes by such potential participants, involving allocation by potential participants of quantitative weight within a quantitative total budget of allocatable value to predetermined selection criteria, with such system having an input capability for inputting the allocations of potential participants, and the system being constructed and arranged for effecting the computational matching based on the allocations, with communication capability for outputting results of the computational matching to the potential participants.

It is an object of the present invention to provide a method, an apparatus and a program having high optimization precision and capable of obtaining an answer required by a designer in a short time by combining optimization between individual transistors and optimization as the entire circuit, or by appropriately combining judgment of an operation region, an analysis of the operation region and a SWEEP sensitivity analysis when the optimization is carried out. An optimizing designing apparatus of an integrated circuit for designing a circuit, comprises operation region judging means for adjusting an operation region (linear region, saturation region) of the circuit, operation region analysis means for displaying liner characteristics (Ids-Vgs characteristics) of the circuit and saturation characteristics (Ids-Vds characteristics) of the circuit, and SWEEP sensitivity analysis means for displaying variation in output characteristics of the circuit.