A drive circuit of a display device, which comprise only single conductive TFTs and in which amplitude of an output signal is normal, is provided. A pulse is inputted to TFTs 101 and 104 so that the TFTs would turn ON and then potential of a node á rises. When the potential of the node á reaches (VDD-VthN), the node á became in a floating state. Accordingly, a TFT 105 then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the TFT 105 further rises due to an operation of capacitance 107 as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the TFT 105. An output at the subsequent stage is then inputted to TFTs 102 and 103 to turn the TFTs 102 and 103 ON, while the potential of the node á drops down to turn the TFT 105 OFF. A TFT 106 turns ON at the same time so that the potential of the output node would reach the level L.