6505 results about "Start signal" patented technology

A robot cleaner capable of returning to an external recharging device. The robot cleaner includes a driving portion for driving a plurality of wheels, at least one camera installed on a body of the robot cleaner, the camera for photographing external surroundings, and a controller for photographing an image through a camera for recognition of a connection position where the external recharging device is connected with the robot cleaner and stores the photographed image, and controls the driving portion so that the robot cleaner can move from the external recharging device to a destination when an operation start signal is received in the robot cleaner connected to the external recharging device, and for tracing a path to the connection position of the external recharging device and the robot cleaner during a robot cleaner's return to the external recharging device while comparing a current image currently taken by the camera with a stored image of the connection position of the robot cleaner and the external recharging device. Returning of the robot cleaner is carried out when the robot cleaner, separated from the external recharging device, completes its job or needs a recharging, by using the previously stored image and an image currently taken by the camera. Accordingly, an error in the location process, mainly caused due to external interference signals, is decreased, and errors in tracing a path and connecting to the external recharging device can also be decreased.

An object of the invention is to provide a circuit technique which enables reduction in power consumption and high definition of a display device. A switch controlled by a start signal is provided to a gate electrode of a transistor, which is connected to a gate electrode of a bootstrap transistor. When the start signal is input, a potential is supplied to the gate electrode of the transistor through the switch, and the transistor is turned off. The transistor is turned off, so that leakage of a charge from the gate electrode of the bootstrap transistor can be prevented. Accordingly, time for storing a charge in the gate electrode of the bootstrap transistor can be shortened, and high-speed operation can be performed.

An apparatus, system and method for synchronizing the playback of data transmitted over an asynchronous network. An initialization module may initialize at least two receivers to receive playback data from a transmission module. The transmission module may then transmit to the receivers the playback data, and, in some embodiments, synchronization data. Synchronization data may include a playback indicator by which the receivers may determine an appropriate playback data consumption rate. A buffer module may buffer a predetermined amount of playback data which may be played in response to a start signal individually addressed to the receivers.

The method of reducing contamination of electrical signals recorded in the presence of repeated interference contamination comprises obtaining an electrical signal recorded in the presence of a contaminating signal, and detecting a timing signal that occurs at a fixed time point during the electrical signal relative to the onset of the contaminating signal. The electrical signal is digitized, wherein the digitizing begins with the timing signal. A plurality of digitized electrical signals is analyzed, wherein the electrical signals are synchronized with respect to the timing signal, to obtain an estimated contaminating signal that is subtracted from the digitized electrical signal. This method can be used with electrophysiological signals, such as EEG, ECG, EMG and galvanic skin response, and for elimination of noise associated with concurrently used methods such as MRI. The method of noise reduction is applicable to recordings of other electrical signals, including audio recordings.

A method of supplying information from a central source (1) to a plurality of remote user interfaces (9) relating to an interactive application. The method comprises:i) transmitting application data associated with the interactive application to the user interfaces (9); and,ii) thereafter, transmitting a real time start signal to the user interfaces (9) to enable the interactive application to begin substantially simultaneously at each user interface.

The present invention relates to an energy saving outlet, which comprises: a housing, having at least one first opening and a second opening thereon, for disposing the following elements at least one outlet, disposed in the housing and exposed the first opening, for providing an electrical equipment being plugged into; a sensor, disposed in the housing and exposed the second opening, for sensing a starting signal of the electrical equipment; a control unit, disposed in the housing and coupled to the sensor, for outputting a control signal when it receives the starting signal; a relay, one end being coupled to a power input terminal, and another end being coupled to the control unit, for being changed to an on or off state through the control signal; thereby the energy saving outlet can turn OFF its power when the electrical equipment has entered a stand-by state, so as to achieve the goal of energy saving. Furthermore, the present invention also provides an energy saving method by using an outlet.

A shift register includes a plurality of stages connected to one another, wherein each of the plurality of stages receives a first driving voltage as an input and transmits the first driving voltage using an output signal of a previous stage according to a first scan start signal or a first driving order to control an output of a clock signal or an inverted clock signal, and wherein the first driving voltage is at a high state for a partial time of one frame and at a low state for the remaining time of the frame at the first driving order. By using the method, a partial driving can be performed, and accordingly power consumption of the shift register can be reduced.

A source driver outputs a data signal and a reset (black) signal alternately to a source line. Four-hundred and eighty gate lines are divided into three groups each comprising 160 lines, and connected to gate drivers. A display control section outputs a discriminant signal, a scan start signal and a clock signal to the gate drivers, where the nth gate line is selected with the data signal outputted by the source driver, and where the (n+160)th gate line is selected with the reset signal outputted. Further, n is shifted sequentially. By writing the reset signal during the latter ⅓ of one frame like this, light leakage of pixels that are changed over from white display to black display is eliminated. Also, blurs of edge portions of a motion picture are reduced. Thus, display grade for motion pictures is enhanced with a minimum improvement.

An improved roulette type game in which an electronic Start signal triggers a Launch signal, but only after an electronically generated random time delay.

A shift register and a display device having the shift register are provided. The shift register has a plurality of stages which sequentially generate output signals in synchronization with a plurality of clock signals. Each of the stages includes an input unit for receiving a scan start signal or an output signal from a previous stage and outputting the scan start signal or the output signal as a first voltage, a first unit for passing at least two clock signals, a second unit for outputting at least one of the at least two clock signals or a second voltage in response to an output signal from a next stage, and an output unit for generating an output signal synchronized with at least one of the at least two clock signals in response to the outputs of the input unit and the second unit.

The invention discloses a shifting register unit, a gate drive circuit and a display device to simplify the gate drive circuit and thus to reduce the size of the frame of the display device, and relates to the technical field of displaying. The shifting register unit comprises a latching module and at least two stages of output control modules which are connected with the latching module, the input end of the latching module is connected with a starting signal and a clock signal, the output end of the latching module is connected with the input ends of the at least two stages of output control modules, the latching module is used for latching the starting signal according to the input clock signal, the input end of each output control module is connected with the clock signal, the output control modules output grid line drive signals according to the clock signal, and the clock signal is input to the latching module and each stage of output control module according to a timing sequence.

A method of providing an image, the method including receiving an image capture start signal from a remote controller of the camera, successively capturing images after the image capture start signal is received, receiving an image capture end signal from the remote controller, and selecting an image captured at a time which is a predetermined period of time prior to a time at which the image capture end signal is received.

A method, apparatus and system for synchronizing the video output of personal video recorders in two or more locations. A broadcast program is received and recorded on a personal video recorder on a first personal video recorder. Thus, at least one program will be stored in memory in the first personal video recorder. A second personal video recorder having a common program residing in its memory is selected. A signal is then transmitted to or from the first personal video recorder to simultaneously initiate a start sequence in each of the first and second personal video recorders. The start signal may be transmitted over the Internet or by other communication means such as telephone lines.

A programmable compensated delay for a double data rate (DDR) synchronous dynamic random access memory (SDRAM) interface is provided. A programmable compensated delay apparatus includes a reference delay calibration circuit for providing a measured number of delay elements in one cycle. A programmable delay register provides a desired delay value. A conversion logic is coupled to the reference delay calibration circuit and the programmable delay register for receiving both the measured number of delay elements in one cycle and the desired delay value. The conversion logic provides a number of required delay elements. A delay circuit is coupled to the conversion logic for receiving the number of required delay elements and providing the desired delay. A SDRAM control logic provides a refresh start signal to the reference delay calibration circuit for updating the delay circuit during each DRAM refresh. The DQS clock strobe on the DDR SDRAM is applied to the delay circuit and is delayed by the desired delay.

A gates-line driving circuit of a display device includes a plurality of stages that are serially connected to each other, where each stage includes a plurality of transistors and a plurality of capacitors and receives a scanning start signal, a plurality of clock signals, and first and second gate-off voltages Voff1 and Voff2 of different magnitudes, where some of the transistors are turned off with the first gate-off voltage, and others of the transistors are turned off with the second gate-off voltage.

A light emitting display including a selection signal unit, an emission control signal unit and a plurality of pixels. The selection signal unit receives a first start signal, generates a first shift signal, generates a selection signal using the first shift signal, and outputs the selection signal. The emission control signal unit receives a clock signal and a second start signal, generates a second shift signal, generates first and second emission control signals using the first and second shift signals, and outputs the emission control signals. At least one of the pixels includes first and second light emitting elements. The first light emitting element is emitted by the first emission control signal in the first field, and the second light emitting element is emitted by the second emission control signal in the second field.

A remote operation apparatus (300) includes: an operating-side first communication section (301) that is capable of transmitting a signal to an operation target apparatus (200); an operating-side second communication section (302) that is capable of transmitting/receiving the signal to/from the operation target apparatus (200); a connection start section (11) which transmits a connection start signal, which notifies a start of the transmission/reception of the signal via the operating-side second communication section (302), to the operation target apparatus (200) via the operating-side first communication section (301); and an operating-side communication control section (12) which transmits/receives the signal to/from the operation target apparatus (200) via the operating-side second communication section (302). With this arrangement, it is possible to easily specify a communication partner to/from which a signal is transmitted/received via the operating-side second communication section (302). Moreover, an amount of data transmitted by the operating-side first communication section (301) can be suppressed to a bare minimum. That is, it is possible to easily specify a communication partner and to suppress an amount of data transmitted by communication means for specifying the communication partner to a bare minimum.

A stereo synchronizing signal generator for liquid crystal shutter glasses is provided. The stereo synchronizing signal generator includes a signal generating unit to generate preliminary shuttering signals according to an image vertical synchronizing signals and a start signal. A signal delaying unit is provided to delay the preliminary shuttering signals according to a value, which can be changed by users. Then an output unit is provided to transmit the delayed shuttering signals to the liquid crystal shutter glasses. Due to that the signal generating unit generates a predetermined shuttering signal, such as right eye shuttering signal, at the rise edge of the start signal, the shuttering signals can always match up to the right image. Furthermore, the signal delaying unit can adjust the timing of the shuttering signal according to the value of the register, therefore the shuttering signals can always be synchronized with the image.

An active matrix display device includes: a display panel having gate lines and data lines defining pixels; a gate driver in the display panel to supply output signals to gate lines of the display panel; and a data driver to supply image signals to data lines of the display panel, wherein the gate driver includes a plurality of shift registers to output signals that are sequentially shifted, each of the shift registers including: a first control part for controlling a first node in response to a first clock signal among a plurality of clock signals; a second control part for controlling second and third nodes in response to the start signal and a second clock signal; and an output part to selectively output one of a third clock signal and a first supply voltage in response to voltages of the first, second, and third nodes, whereby second and third supply voltages, which are different from each other, are switched for application at the second and third nodes.

A drive circuit of a display unit has a control circuit and a plurality of source drivers that are cascade-connected to each other. A start pulse signal is inputted into the source driver at the first stage and digital image data signals and clock signals are inputted into the source drivers at the respective stages from the control circuit. Clock signals are generated by a clock control circuit of the control circuit. For the clock signals, a reading period and a transferring period appear alternately, and the frequency of the low frequency clock pulse signal in the transferring period is lower than that of the high frequency clock pulse signal in the reading period. A shift register of the source driver transfer the start pulse signal to said source driver at the next source driver within one transferring period, and the start pulse signal is thus transferred in order from the source driver at the first stage up to the source driver at the final stage. Then, the source driver inputted the start pulse signal reads the digital image data signals in the reading period.

The invention relates to hand function rehabilitation training equipment based on a spontaneous movement imagery electroencephalograph. Hardware of the instrument consists of an electroencephalograph signal acquisition and processing module, a hand force signal real-time detection sensor array, a control module based on multisource information fusion and a rehabilitation manipulator module, and software for supporting the active rehabilitation training of hand functions is arranged in a computer. The rehabilitation training equipment provides external compensation assistance or resistance hierarchically by taking movement imagery electroencephalographs of patients who suffer from cerebral injury as a starting signal and the muscle force of hands as a feedback signal in a self-adaptive mode according to the myasthenia state of the patients to assist patients who suffer from dyskinesia in performing passive, assisted and active rehabilitation training, displays the state information of the hand movement functions and the provided external power information for doctors and the patients and provides an objective and quantitative assessment method and an index for clinical rehabilitation diagnosis and treatment. The instrument is easy to use, has a friendly interface and is accepted by the doctors and the patients easily. A user can operate a system of the instrument without programming experiences, and the operating environment is not complex.