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12439 results about "Processor register" patented technology

In computer architecture, a processor register is a quickly accessible location available to a computer's central processing unit (CPU). Registers usually consist of a small amount of fast storage, although some registers have specific hardware functions, and may be read-only or write-only. Registers are typically addressed by mechanisms other than main memory, but may in some cases be assigned a memory address e.g. DEC PDP-10, ICT 1900.

Implantable monitor

An implantable medical device (IMD) capable of monitoring physiologic data, distinguishing relatively noisy and noise free physiologic data, and recording noisy and relatively noise free segments of physiologic data in separate memory registers of a limited memory for retrieval and analysis at a later time. Preferably the physiologic data comprises the sampled EGM of the heart detected from sense electrode pairs that are implanted in the patient at sites where extraneous electrical noise, e.g., electromyographic signals, are also capable of being detected. The sense electrode pairs can constitute one or both sense electrodes located on or adjacent to the atrial and / or ventricular heart chambers and coupled to the IMD by a lead body or sense electrode pairs that are located remotely from the heart, e.g. at a subcutaneous implantation site of the IMD. A plurality of noisy EGM episode data registers store a corresponding plurality of noisy EGM episode data sets on a FIFO basis and another plurality of noise free EGM episode data registers to store a corresponding plurality of relatively noise free EGM episode data sets on a FIFO basis. Any form of discrimination of noisy data from relatively noise free data can be employed at the time of recording, but because the stored EGM episode data sets are subsequently viewed and analyzed by a physician, discrimination with absolute certainty is not required, and the physician can alter the detection criteria to fine tune it.

Automatically Balancing Register for HVAC Systems

Distributed nodes, such as intelligent register controllers, of a heating, ventilating and / or air conditioning (HVAC) system wirelessly communicate with each other on a peer-to-peer basis, forming a network, and collectively control the HVAC system, without a central controller. The intelligent register controllers collectively control the amount of conditioned air introduced into each region. Each node may base its operation at least in part on information about one or more (ideally all) of the other nodes. Each intelligent register controller automatically determines how much conditioned air to allow into its region, or how much return air to allow to be withdrawn from its region, based on information collected by the register controller, such as: current temperature of the region; desired temperature of the region; calculated amount of conditioned air required to change the region's temperature to the desired temperature; temperature of conditioned air begin supplied by a duct to the register; current time, day of week, vacation or other schedule data; temperatures of other regions and their respective desired temperatures; calculated amounts of air required to be supplied or withdrawn by the other controlled registers to change their respective regions' temperatures to their desired temperatures; or combinations thereof. Each register controller automatically determines when and to what extent to operate its respective controllable damper.

FPGA with register-intensive architecture

Field programmable gate arrays (FPGA's) may be structured in accordance with the disclosure to have a register-intensive architecture that provides, for each of plural function-spawning LookUp Tables (e.g. a 4-input, base LUT's) within a logic block, a plurality of in-block accessible registers. A register-feeding multiplexer means may be provided for allowing each of the plural registers to equivalently capture and store a result signal output by the corresponding, base LUT of the plural registers. Registerable, primary and secondary feedthroughs may be provided for each base LUT so that locally-acquired input signals of the LUT may be fed-through to the corresponding, in-block registers for register-recovery purposes without fully consuming (wasting) the lookup resources of the associated, base LUT. A multi-stage, input switch matrix (ISM) may be further provided for acquiring and routing input signals from adjacent, block-interconnect lines (AIL's) and/or block-intra-connect lines (e.g., FB's) to the base LUT's and/or their respective, registerable feedthroughs. Techniques are disclosed for utilizing the many in-block registers and/or the registerable feedthroughs and/or the multi-stage ISM's for efficiently implementing various circuit designs by appropriately configuring such register-intensive FPGA's.

Wireless telecommunications system and method of operation providing users' carrier selection in overlapping hetergenous networks

An improved wireless telecommunication system enables a user to obtain communication services in overlapping wireless heterogeneous or homogeneous cellular networks at the most economical cost and bandwidth. A plurality of overlapping cellular networks includes a common command channel, a Central Selection Agency (CSA), a home location register, a visitor location register, and a user device positional location mechanism. In one embodiment the user device is equipped with a Global Positioning System (GPS) to determine its location. In placing a call, the user device broadcasts its ID, location and connection capability requirements on the common command channel. When a base station for the command channel bears the request, the CSA and the home location register for the user are informed. The CSA capability/requirements determine which network and base station selections are potential carriers for the call. Based on user preferences established by a profile stored in an accessible database, the CSA assigns a network and base station to handle the connection. The user device is informed and tunes to the appropriate network and protocols. For incoming calls, the calling party checks the home location register to determine the last known location. The user device is informed that a called is waiting. The user device selects the network and base station to receive the call in a fashion similar to that of placing the call. A call may be transferred from one network to a different network, the networks using different protocol. The user device may be programmed to change networks at random times to provide enhanced security for a call.
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