1233 results about "External storage" patented technology

A parallel processing unit comprises a plurality of processors each being coupled to a memory access hardware circuitry. Each memory access hardware circuitry is configured to receive, from the coupled processor, a memory access request specifying a coordinate of a multidimensional data structure, wherein the memory access hardware circuit is one of a plurality of memory access circuitry each coupled to a respective one of the processors; and, in response to the memory access request, translate the coordinate of the multidimensional data structure into plural memory addresses for the multidimensional data structure and using the plural memory addresses, asynchronously transfer at least a portion of the multidimensional data structure for processing by at least the coupled processor. The memory locations may be in the shared memory of the coupled processor and / or an external memory.

Systems and methods are described for reducing execution time of a query that references external data systems. The system can determine an external data system is capable of processing one or more map or reduce phases of a map-reduce operation. When it is determined that the external data system can process a map or reduce phase, associated operations may be reassigned from the system to the external data system reducing the processing resources used by the system to response to the query and, in some cases, speeding up performance of the query.

The invention relates to a recovery method for BIOS firmware, and belongs to the field of computer systems. According to the method, backup operation is carried out on the content of the FVMAINCOMPACT, an original FVMAINCOMPACTMAIN on a PcdBackFvBase address is normally started and executed, when the original is damaged, a backup FVMAINCOMPACTBACKUP on the PcdFvBase Address address is executed, the content is transmitted to the DXE from the PEI stage in the form of establishing Hob, and updating of the original by the backup is completed in the DXE; during compiling, an SHA256 hash value of an original is calculated and stored in Flash, and when firmware is started and runs, whether a starting file changes or not is judged by comparing the hash value. According to the method, the problems that the mainboard has no external storage equipment condition, and the firmware startup fault needs to be recovered by Recovery are solved; the SHA256 hash value is calculated through a tool during compiling, and the Sha256 hash value is dynamically calculated through an OpenslLib standard library during starting, so that the basis for judging the damage of the firmware file is enhanced.

The invention provides a flexible convolution operation accelerator based on a systolic array. The flexible convolution operation accelerator is used for solving the technical problem that the hardware scale of an existing convolution operation accelerator is difficult to flexibly adjust according to different hardware platforms. The system comprises an input cache module, a pulsation matrix, an accumulation logic unit and an output cache module which are connected in sequence, the input cache module comprises a weight cache module and an image cache module, and the weight cache module and the image cache module are both connected with the pulsation matrix. The weight cache module, the image cache module, the pulsation matrix, the accumulation logic unit and the output cache module are all connected with the controller, and the controller and the output cache module are both connected with an external memory through a BUS. The systolic array and the flexible cache module are utilized, the functions of data storage and data format conversion can be achieved at the same time, hardware logic overhead is reduced, high memory access efficiency is achieved, and configuration of the accelerator scale and various convolution parameters is supported.

A storage device includes a non-volatile memory and a storage controller, wherein the storage controller includes a cache memory storing some of data stored in the non-volatile memory, an interface circuit receiving, from a first external host, a first request including a source address related to the external storage device, a destination address related to the storage device, and cache update information indicating an update method of the cache memory, provide a second request including the source address to the external storage device, and receive, from the external storage device in response to the second request, a response including first data corresponding to the source address, an address translation circuit generating a physical address of a first type based on the destination address, and a cache controller updating a cache area indicated by the physical address of the first type based on the cache update information.

A memory device is provided. The memory device includes: a buffer memory; a nonvolatile backup memory; and a memory controller configured to: store map data corresponding to an external storage device in the buffer memory; provide, in response to a request from the external storage device, an address pair corresponding to the request, from among address pairs of the map data, to the external storage device; and back up, in response to a sudden power-off event, the map data to the nonvolatile backup memory.

The invention provides a dual-storage system starting method and device. An architecture in which a master control chip SOC works cooperatively with an external memory DDR, a nonvolatile memory SPI NOR and an SD card is adopted. After the SOC is powered on, a BootROM guide code is executed, a system is initialized, ID Blocks containing a DDR initialization program and an SPL secondary loading program are sequentially obtained and verified from multiple storage media, the DDR initialization program is loaded, DDR is initialized, and the SPL secondary loading program is loaded to the DDR to run. The method comprises the following steps of: firstly, loading an SD (Secure Digital) card, then loading U-Boot firmware, completing initialization of residual hardware and security mirror verification, then detecting and verifying a kernel mirror format and Header information in the SD card, then loading a Linux kernel, an equipment tree and a ramdisk, mounting rootfs to an RAM (Random Access Memory) space, and mounting the SD card as a user data storage space. According to the method, high reliability of system guiding is ensured through the SPI NOR, large-capacity storage and flexible upgrading are achieved through the SD card, and the comprehensive performance of the embedded system in the aspects of reliability, storage expansibility and cost effectiveness is remarkably improved.

The invention provides a fault recording data storage method and device of an energy storage system and a storage medium, and relates to the technical field of energy storage, and the method comprises the steps: sequentially caching a plurality of data packets sequentially sent by a battery management system in the energy storage system for each energy storage device in a plurality of energy storage devices into a first internal storage medium; taking the data packet from the first internal storage medium by adopting an analysis task, and analyzing the taken current data packet to obtain equipment information and analysis data corresponding to the current data packet; according to the equipment information, storing the analysis data into a target storage block of the target equipment corresponding to the equipment information in a second internal storage medium; and according to the alarm triggering time of the equipment alarm information, writing multiple pieces of data in a preset time period before and after the alarm triggering time in the storage block of the target equipment in the second internal storage medium into the external storage medium. According to the invention, the integrity and reliability of the fault data of the energy storage system are ensured.

The invention relates to the technical field of storage, and discloses a data storage method, system and device and a medium. The method comprises the steps of determining whether a network path corresponding to a read-write request is in a fault state based on a response message corresponding to the read-write request; in response to the fact that the corresponding network path is in a fault state, obtaining target data based on the read-write request; packaging the target data, and caching the packaged target data to an external preset storage device; monitoring whether the corresponding network path recovers a healthy state or not; and in response to the corresponding network path recovery health state, storing the memory data corresponding to the read-write request to a target storage device based on a preset storage device. Through the scheme of the invention, the problem that the external storage cannot be normally written when the SAN network or the SAN storage equipment breaks down is avoided, and the data reliability and integrity of the SAN storage equipment in a fault scene are enhanced.

The invention relates to a video acquisition and transmission method and device for converting a 10-gigabit network into a PCIe (Peripheral Component Interconnect Express) interface. The method comprises the following steps: receiving a video stream through a double 10-gigabit network optical module, carrying out protocol analysis and preprocessing through an FPGA (Field Programmable Gate Array), realizing multi-path alternate reading and writing by utilizing DDR3 ping-pong cache, dynamically distributing the video stream to multiple devices through a three-path PCIe 3.0 * 4 interface and an XDMA (Extensible Direct Memory Access), and optimizing the transmission priority in combination with a load state. The device comprises two paths of SFP + optical modules, a Xilinx Virtex7 series FPGA chip (integrated with a 10-gigabit network MAC, a PCIe XDMA IP core and a DDR3 controller), three paths of PCIe 3.0 * 4 interfaces and an external DDR3 memory. The system has the advantages that the double 10-gigabit network input and multi-PCIe channel collaborative architecture breaks through the single-channel bandwidth bottleneck; the intelligent ping-pong cache and the AXI arbitration strategy reduce the data conflict risk; and dynamic bandwidth allocation optimizes real-time performance.

The invention discloses a method and a system for automatically generating a business APP of a fusion terminal, which are applied to the technical field of smart power grids, and the method comprises the following steps: accessing an external storage device to a target fusion terminal; the management APP of the target fusion terminal obtains basic information of a service APP needing to be generated, and sends the basic information to the packaging APP and the guarding APP; the packaging APP selects a corresponding adaptive template from a template library according to the adaptive data, and performs parameter configuration on the selected adaptive template to form a service APP needing to be generated; the management APP is locally deployed and operated in the target fusion terminal; and the guarding APP maintains the running service APP according to the configuration data. According to the method, code development is not needed, and the service APP is automatically configured and generated; meanwhile, automatic operation and maintenance of the generated service APPs are achieved, the service APPs which are not needed temporarily are directly deleted from the fusion terminal, and storage resources of the fusion terminal are effectively saved.

The invention discloses a safe storage method for flight data of an unmanned aerial vehicle. The safe storage method comprises the following steps of 1, performing data collection and primary processing; 2, selecting storage equipment, wherein the storage equipment comprises an internal storage, an external storage and a cloud storage; 3, data storage and backup are carried out, the data after primary processing are stored in a selected storage device, and backup is carried out according to requirements; 4, implementing data security measures, and performing data security protection; and 5, performing data management and maintenance, including data classification, data updating and classification and storage equipment maintenance. According to the invention, the integrity, accuracy and safety of the data can be ensured, the management efficiency of the data is improved, the storage cost is reduced, and powerful support is provided for flight data management and application of the unmanned aerial vehicle.

The invention relates to the technical field of parallel computing chips, in particular to a multiprocessor management method and device based on a parallel computing chip and a medium. The method comprises the steps that a plurality of stream processors are organized according to a hierarchical arrangement mode, a hierarchical SM cluster is formed, and each stage of SM core only keeps cache consistency with a lower stage of SM core directly controlled by the SM core; data of an external storage module enters a scheduling core through an L2 cache, and the scheduling core splits the data into thread bundles and dynamically allocates the thread bundles to a target SM core; when the thread processing demand of the target SM core exceeds the current capacity, starting a lower-level SM core according to a preset hierarchy rule, and expanding the processing capacity step by step; and skipping an unprocessed thread bundle over the current SM core through a thread bundle scheduler, splitting the unprocessed thread bundle, transmitting the split unprocessed thread bundle to a lower-level SM core, and merging calculation results of the lower-level SM core step by step through a shared memory. According to the invention, extra resources allocated by the system can be reduced, and the whole system is more efficient and ordered on the basis of ensuring consistency.

The invention discloses a high-real-time security measurement method for a secure and trusted controller. The method comprises the following steps: S1, determining key firmware in the controller; s2, carrying out integrity verification on the key firmware through the security chip; s3, verifying the integrity of the firmware in the external memory by using the security chip; s4, if the integrity verification of the key firmware is passed, generating an integrity report; if not, corresponding safety measures are taken; s5, for non-key firmware, a soft measurement strategy is adopted for verification; s6, when the firmware is updated, the security chip is used for recalculating the verification information; and S7, if the key firmware is updated, the system is restarted and the step S3 is executed again, and if the non-key firmware is updated, the non-key firmware is restarted. The safety of the system is improved, the starting performance is optimized, and the maintenance and updating process is simplified.

Technology for a hybrid memory system that allows host access both non-volatile storage and volatile memory (e.g., RAM). The hybrid memory system may send a command to the host requesting that the host select a mode of access that may include a first mode in which the host has access to only the volatile memory and a second mode in which the host has access to at least the non-volatile storage. While in a mode in which the host has access to the volatile memory, the hybrid memory system may analyze data packets received from the host to determine whether a data packet is a request to access the volatile memory or the non-volatile storage. Responsive to a determination that the host is seeking access to the volatile memory the hybrid memory system converts the packet from the host to a packet suitable to access the volatile memory.

The invention discloses a distributed caching method and system and an acceleration method for large model reasoning service. The system comprises a confidential virtual machine cluster, a zero-trust distributed caching system and a FUSE client. The zero-trust distributed cache system comprises a data strategy service, a data engine plug-in, a distributed file system and a trusted access service. And the FUSE client is deployed at the confidential container end, and establishes secure connection with the trusted access service based on the remote proof and the identity legality confirmation proof of the corresponding confidential container so as to provide a plaintext data access service for the corresponding confidential container. According to the scheme, a distributed cache implementation scheme is provided for the confidential computing container cluster, and the problem of performance loss caused by repeatedly reading, encrypting and decrypting the same data from an external storage system is avoided while the data security is guaranteed by using the large-scale confidential container cluster; and the storage access efficiency in scenes such as model training and reasoning is improved.

The invention relates to the technical field of data processing, in particular to a mobile terminal data intelligent backup method and device, a mobile terminal and a storage medium. The mobile terminal data intelligent backup method comprises the steps that when a preset triggering condition is monitored, such as an NFC label approaching event and / or at least one additional triggering condition, safety verification is executed, and a backup task is triggered if verification is passed. Wherein the NFC label is only used for waking up the backup application program of the mobile terminal. And after a backup task triggering instruction is received, writing the to-be-backed-up data into the external storage device successfully connected with the mobile terminal according to the intelligent backup strategy. According to the data backup method and device, intelligent triggering is achieved through the NFC near field sensing characteristic, the expansion requirement of the external storage device is considered, backup can be conducted according to the intelligent backup strategy, the personalized backup requirement under the complex scene is met, and the convenience and applicability of data backup are improved.

The invention discloses a large model KV cache rapid storage and import acceleration architecture, and relates to the field of FPGA. The architecture comprises a CPU, an accelerator, an FPGA, a memory, an external memory and a memory. In the query stage, the CPU determines a data query task according to the input lexical elements and controls the FPGA to start the data query task; the FPGA queries and imports model cache data into the memory according to the external memory; in the reasoning stage, the accelerator conducts reasoning and outputs a reasoning result based on the model cache data; and the FPGA reads the updated model cache data from the memory according to a control instruction of the CPU, and exports the updated model cache data to an external memory. According to the scheme, the KV Cache technology is used for reducing the number of times of reasoning repetition of a large model, the hash calculation, table lookup and query access technologies are used for enabling data to be more rapidly imported and exported, and the result output speed is further increased. Not only is the application scene widened, but also data backup and transfer are facilitated.

The invention discloses a method and a system for reckoning a complex traveling operation process of a station, belongs to the technical field of traveling scheduling, and solves the problem that an existing method is only suitable for reckoning a single traveling operation process and does not have a function of reckoning a plurality of traveling operation processes in parallel. The system comprises a behavior mode unit, an event control unit, a state statistics unit, an inference engine clock and an external storage unit. The station complex traveling operation process calculation system provided by the invention can calculate and simulate a plurality of complex traveling operation processes in parallel, and also has a normative verification mechanism for the traveling operation processes, so that the calculated traveling operation processes conform to a set operation processing standard process, thereby ensuring safe, efficient and orderly operation of railway transportation, and improving the working efficiency. The problem that an existing method is only suitable for calculation of a single travelling crane operation process and does not have the function of parallel calculation of multiple travelling crane operation processes is solved.

A reproducible random number generation method can be executed in a calculator system with a security area, and comprises the following steps of: generating security data required for performing security operation in a security isolation area or a security chip from the inside or importing the security data from the outside; the security isolation area or the security chip sets encryption / decryption configuration and derivative function configuration according to the security operation, and encrypts the security data through a reproducible random number encryptor to obtain an encrypted data packet; exporting the encrypted data packet to the external storage of the security isolation region or the security chip; and when the security operation needs to be carried out, the corresponding encrypted data packet is imported into the security isolation region or the security chip, the security data is decrypted by a reproducible random number decryptor to obtain the security data, and then the security operation is carried out.

The invention provides an instruction cache and a prefetching method thereof. The instruction cache comprises a hit detection module, an instruction prefetching module and an operation module. The hit detection module checks whether a current instruction fetching request of a current thread bundle is hit. The instruction prefetching module dynamically determines an instruction prefetching range corresponding to the current instruction fetching request according to the execution progress of the current thread bundle. The operation module accesses the external storage to prefetch the instruction data corresponding to the instruction prefetch range. And in response to the fact that the hit detection module judges that the current instruction fetching request is hit, the operation module feeds back instruction data corresponding to the current instruction fetching request to the current thread bundle. And in response to the fact that the hit detection module judges that the current instruction fetching request is missed, the operation module accesses external storage so as to feed back instruction data corresponding to the current instruction fetching request to the current thread bundle.

The invention discloses a production scheduling optimization method and system based on multi-objective mixing, and the method comprises the steps: designing a first objective function for minimizing the late shift subsidy and a second objective function for minimizing the energy consumption cost, and determining a constraint condition; initializing a particle swarm, and calculating fitness values of each particle in the particle swarm corresponding to the first objective function and the second objective function; storing the non-dominated solution of each particle through an external storage library, calculating an entropy change value, a probability threshold value, a probability value and a random value of the external storage library, and determining a global optimal particle; updating each particle according to the global optimal particle, the entropy change value, the probability threshold and the constraint condition to obtain a non-dominated solution set; and selecting a compromise solution in the non-dominated solution set as a production scheduling optimization result through an approximate ideal solution sorting method. The method can reduce the subjectivity of weight setting, does not need repeated trial and error, improves the production efficiency and intelligent level of automobile production scheduling, and can be widely applied to the technical field of production scheduling.

The present application provides a server testing system. The server testing system includes an electronic device being connected to a touch screen configured to display a test item menu bar and being connected to a server through a universal serial bus (USB) port and I2C and UART ports. The electronic device is configured to generate configuration parameters for the server in response to a selection operation of a user to the test item menu bar; obtain a modified test script by configuring a test script according to the configuration parameters; send the modified test script to the server through the USB port; generate a test result by controlling the server to execute the modified test script; and send the test result to the touch screen for display and save the test result to external storage device.

A method performed by a mura compensation data generation device, the method includes: generating optical information for a plurality of pixels of a display panel operating based on test data; generating, based on the optical information, raw mura compensation data to compensate input video data provided to the display panel; extracting a high spatial frequency component and a low spatial frequency component from the raw mura compensation data; generating a compressed high spatial frequency component, by compressing, based on a first compression algorithm, the high spatial frequency component; generating a compressed low spatial frequency component, by compressing, based on a second compression algorithm, the low spatial frequency component; and storing the compressed high spatial frequency component and the compressed low spatial frequency component in an external storage circuit.

A data processing method and apparatus, and a computing device. The method is executed by a data processing system, after obtaining cache data, when determining that the cache data volume of the cache data is greater than the available memory space capacity of the memory of a locally deployed server cluster, the data processing system can automatically spill out part of the cache data into an external memory, so as to prevent the data processing system from frequently reporting OOM errors, thereby improving the stability of the data processing system.

The invention provides a chip starting method and device, a computer readable storage medium, a computer program product, a chip and computing equipment, and the method comprises the steps: loading and running an initialization program of the chip under the condition that the chip triggers a starting condition; under the condition that chip initialization is completed based on the initialization program, loading and running a hierarchical starting program of the chip; wherein the hierarchical startup program is configured to optimize chip startup in stages, and is matched with the external memory based on the specification information of the external memory. By optimizing a chip starting program in stages, the chip starting time is shortened, and the chip starting efficiency is improved; according to the specification information of different external memories, the starting programs matched with the external memories are generated in a self-adaptive mode, and the compatibility of the external memories of different manufacturers and the flexibility of application of different starting schemes are improved.

The invention relates to a chip security starting method and system, computer equipment and a storage medium. The method comprises the following steps: checking information loaded from an external memory step by step so as to perceive whether a starting program loaded from the external memory is abnormally damaged, and only checking the integrity of engine firmware and encrypted system files loaded from the external memory step by step; after engine firmware and the encryption system file are ensured to be complete and not damaged, decryption and signature verification are carried out on the encryption system file so as to perceive whether the encryption system file is tampered or not, and after decryption and signature verification of the encryption system file are successful, a starting program loaded from an external memory is utilized to start a system-on-chip. Therefore, the trusted state of the starting program loaded from the external memory is ensured, it is ensured that the system-level system can be safely and reliably started, and the problem that the trusted state of the external starting program cannot be sensed in the starting process of an existing SOC chip is solved.

The invention discloses a restart control method and device of a server processor, a storage medium and electronic equipment, and relates to the field of servers, and the method comprises the following steps: detecting the running state of the server processor, and storing a recovery file for the server processor according to the running state of the server processor, then the server processor is controlled to recognize the first controller as an external storage medium, and then the server processor is controlled to restart the external storage medium as a starting item which is preferentially executed in the starting process, so that the server processor can directly obtain a recovery file from the first controller when needing to be restarted; the executive program contained in the recovery file can guide the temporary operating system after the server processor is restarted, and the temporary operating system can provide an operating environment required by system recovery for the server processor, so that the technical problems of poor restarting reliability and the like of the server processor are solved; the technical effect of improving the restart reliability of the server processor is achieved.

The invention discloses a fault recording method and device, an inverter and energy storage equipment, and the fault recording method comprises the steps: controlling a write-in position pointer in a temporary fault buffer area to carry out index number self-increasing in a fault recording process when the execution frequency of an interruption control period reaches a fault recording condition and timestamp information is received, determining a residual wave recording space according to the current write-in index number and the current initial index number of the initial position pointer; and when the target equipment has a fault and the residual wave recording space is smaller than a first preset data volume, stopping fault wave recording, and storing the fault wave recording data through an external storage medium. Through the mode, the operation data of the target equipment in each interruption control period is refreshed in the temporary fault buffer area, and the index numbers of the storage data points are continuously updated, so that the data before and after the fault are efficiently and reliably recorded, and the fault analysis is quickly and effectively carried out.

Systems and methods for a memory architecture for Out-of-Band (OOB) manageability in heterogeneous computing platforms. In some embodiments, an Information Handling System (IHS) may include: a heterogeneous computing platform having a plurality of devices, and an OOB Microcontroller Unit (MCU) integrated into the heterogeneous computing platform, where the OOB MCU is configured to: identify a command in an OOB packet received while a host processor is in a low-power state, and determine, based at least in part upon the command, whether to wake up an external memory device coupled to the heterogeneous computing platform.