The invention discloses a cryptographic
algorithm adaptation and hardware
encryption and decryption acceleration method suitable for a gateway protocol,
deep integration of a cryptographic
algorithm is realized through
protocol stack-level native transformation,
software and hardware
collaborative design is adopted, and through innovative mechanisms such as multi-thread concurrent
encryption, asynchronous interrupt
processing and DMA data interaction, the hardware
encryption and decryption acceleration of the cryptographic
algorithm is realized. The
processing capability in a high
throughput scene is improved; an intelligent strategy engine is introduced to realize data packet dynamic classification and encrypted resource optimization scheduling, and the
system performance is maximized while the security is ensured; according to the technical scheme, key full-life-cycle management and control are achieved through the HSM, the requirement for equal insurance 2.0 is met, multi-platform deployment is supported by adopting
modular design, and compared with the prior art, the method can be flexibly adapted to various application scenes such as various domestic
chip architectures, embedded devices, security gateways and industrial controllers, and the method is suitable for large-scale popularization and application. The problems of high platform dependence, difficulty in
transplantation and the like existing in national secret
IPSec implementation are solved, and a better
secure communication solution is provided for a localized environment.